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Searched refs:ENABLE (Results 1 – 25 of 71) sorted by relevance

123

/third_party/curl/packages/vms/
Dcurl_crtl_init.c79 #define ENABLE "ENABLE" macro
83 #define ENABLE TRUE macro
211 set_feature_default("DECC$ACL_ACCESS_CHECK", ENABLE); in set_features()
214 set_feature_default ("DECC$ARGV_PARSE_STYLE" , ENABLE); in set_features()
224 set_feature_default ("DECC$EFS_CHARSET", ENABLE); in set_features()
225 set_feature_default ("DECC$EFS_CASE_PRESERVE", ENABLE); in set_features()
228 set_feature_default ("DECC$EFS_FILE_TIMESTAMPS", ENABLE); in set_features()
231 set_feature_default ("DECC$ENABLE_GETENV_CACHE", ENABLE); in set_features()
241 set_feature_default ("DECC$READDIR_DROPDOTNOTYPE", ENABLE); in set_features()
245 set_feature_default ("DECC$STDIO_CTX_EOL", ENABLE); in set_features()
[all …]
/third_party/uboot/u-boot-2020.01/drivers/mtd/spi/hifmc100/
Dhifmc100_spi_mx25l25635e.c55 hifmc100_op_reg(spi, SPI_CMD_WRSR, sizeof(unsigned short), fmc_op_write_data_en(ENABLE)); in clear_dtr_mode()
77 regval = fmc_op_cmd1_en(ENABLE) | fmc_op_write_data_en(ENABLE) | in spi_mx25l25635e_set_cmd()
157 regval = fmc_op_cmd1_en(ENABLE) | in spi_mxic_set_reg()
158 fmc_op_write_data_en(ENABLE) | in spi_mxic_set_reg()
201 if (dtr_en == ENABLE) { in spi_mxic_output_driver_strength_set()
256 regval = fmc_op_dummy_en(ENABLE) | in spi_mxic_check_spi_dtr_support()
257 fmc_op_cmd1_en(ENABLE) | in spi_mxic_check_spi_dtr_support()
258 fmc_op_addr_en(ENABLE) | in spi_mxic_check_spi_dtr_support()
259 fmc_op_read_data_en(ENABLE) | in spi_mxic_check_spi_dtr_support()
Dhifmc100_spi_general.c33 host->set_system_clock(NULL, ENABLE); in spi_general_get_flash_register()
41 reg = fmc_op_read_status_en(ENABLE) | FMC_OP_REG_OP_START; in spi_general_get_flash_register()
52 reg = fmc_op_cmd1_en(ENABLE) | fmc_op_read_data_en(ENABLE) | in spi_general_get_flash_register()
133 reg = fmc_op_cmd1_en(ENABLE) | FMC_OP_REG_OP_START; in spi_general_write_enable()
193 reg = fmc_op_cmd1_en(ENABLE) | FMC_OP_REG_OP_START; in spi_general_entry_4addr()
259 reg = fmc_op_cmd1_en(ENABLE) | in spi_general_set_cmd()
260 fmc_op_write_data_en(ENABLE) | in spi_general_set_cmd()
380 regval = fmc_op_cmd1_en(ENABLE) | in spi_nor_reset_pin_enable()
381 fmc_op_write_data_en(ENABLE) | in spi_nor_reset_pin_enable()
Dhifmc100.c195 host->set_system_clock(spi->read, ENABLE); in hifmc100_reg_read()
208 host->set_system_clock(spi->read, ENABLE); in hifmc100_reg_read()
271 host->set_system_clock(op, ENABLE); in dma_cycle_op()
319 host->set_system_clock(spi->read, ENABLE); in hifmc100_dma_read()
360 reg = fmc_op_cmd1_en(ENABLE) | in hifmc100_read_ids()
361 fmc_op_read_data_en(ENABLE) | in hifmc100_read_ids()
391 host->set_system_clock(spi->erase, ENABLE); in hifmc100_reg_erase_one_block()
409 regval = fmc_op_cmd1_en(ENABLE) | in hifmc100_reg_erase_one_block()
410 fmc_op_addr_en(ENABLE) | in hifmc100_reg_erase_one_block()
460 host->set_system_clock(spi->write, ENABLE); in hifmc100_dma_write()
[all …]
Dhifmc100_spi_w25q256fv.c46 regval = fmc_op_cmd1_en(ENABLE) | FMC_OP_REG_OP_START; in spi_w25q256fv_set_cmd()
123 regval = fmc_op_cmd1_en(ENABLE) | in spi_w25q256fv_set_op()
124 fmc_op_write_data_en(ENABLE) | in spi_w25q256fv_set_op()
184 spi_nor_reset_pin_enable(spi, ENABLE); in spi_w25q256fv_qe_enable()
Dhifmc100_spi_gd25qxxx.c47 regval = fmc_op_cmd1_en(ENABLE) | in set_cmd()
48 fmc_op_write_data_en(ENABLE) | in set_cmd()
176 spi_nor_reset_pin_enable(spi, ENABLE); in spi_gd25qxxx_qe_enable()
Dhifmc100_spi_puya.c79 regval = fmc_op_cmd1_en(ENABLE) | in spi_puya_qe_enable()
80 fmc_op_write_data_en(ENABLE) | FMC_OP_REG_OP_START; in spi_puya_qe_enable()
Dhifmc100_spi_issi.c46 reg = fmc_op_cmd1_en(ENABLE) | in spi_issi_set_cmd()
47 fmc_op_write_data_en(ENABLE) | in spi_issi_set_cmd()
Dhifmc100_spi_s25fl256s.c55 regval = fmc_op_cmd1_en(ENABLE) in spi_s25fl256s_set_cmd()
56 | fmc_op_write_data_en(ENABLE) in spi_s25fl256s_set_cmd()
Dhifmc100_spi_xtx.c45 regval = fmc_op_cmd1_en(ENABLE) | fmc_op_write_data_en(ENABLE) | in spi_xtx_set_op()
/third_party/uboot/u-boot-2020.01/drivers/mtd/nand/raw/hifmc100_nand/
Dhifmc100_nand.c73 reg = fmc_op_read_data_en(ENABLE) | fmc_op_write_data_en(ENABLE); in hifmc100_dma_transfer()
115 host->enable_ecc_randomizer(host, ENABLE, ENABLE); in hifmc100_send_cmd_write()
141 host->enable_ecc_randomizer(host, ENABLE, ENABLE); in hifmc100_send_cmd_write()
159 host->enable_ecc_randomizer(host, ENABLE, ENABLE); in hifmc100_send_cmd_read()
196 host->enable_ecc_randomizer(host, ENABLE, ENABLE); in hifmc100_send_cmd_read()
225 reg = fmc_op_wait_ready_en(ENABLE) | in hifmc100_send_cmd_erase()
226 fmc_op_cmd1_en(ENABLE) | in hifmc100_send_cmd_erase()
227 fmc_op_cmd2_en(ENABLE) | in hifmc100_send_cmd_erase()
228 fmc_op_addr_en(ENABLE) | in hifmc100_send_cmd_erase()
292 regval = fmc_op_read_status_en(ENABLE) | FMC_OP_REG_OP_START; in hifmc100_send_cmd_status()
[all …]
/third_party/uboot/u-boot-2020.01/drivers/mtd/nand/raw/hifmc100/
Dhifmc100_spi_general.c48 reg = fmc_op_cmd1_en(ENABLE) | fmc_op_addr_en(ENABLE) | in spi_nand_set_cmd()
52 reg |= fmc_op_write_data_en(ENABLE); in spi_nand_set_cmd()
57 reg |= fmc_op_read_data_en(ENABLE); in spi_nand_set_cmd()
80 reg = fmc_op_read_status_en(ENABLE) | FMC_OP_REG_OP_START; in spi_nand_feature_op()
94 hifmc100_ecc0_switch(host, ENABLE); in spi_nand_feature_op()
181 reg = fmc_op_cmd1_en(ENABLE) | FMC_OP_REG_OP_START; in spi_general_write_enable()
247 if (op == ENABLE) in spi_general_qe_enable()
Dhifmc100.c51 if (op == ENABLE) { in hifmc100_ecc0_switch()
197 host->set_system_clock(spi->write, ENABLE); in hifmc100_send_cmd_pageprog()
200 hifmc100_ecc0_switch(host, ENABLE); in hifmc100_send_cmd_pageprog()
256 host->set_system_clock(spi->read, ENABLE); in hifmc100_send_cmd_readstart()
259 hifmc100_ecc0_switch(host, ENABLE); in hifmc100_send_cmd_readstart()
324 host->set_system_clock(spi->erase, ENABLE); in hifmc100_send_cmd_erase()
347 reg = fmc_op_cmd1_en(ENABLE) | fmc_op_addr_en(ENABLE) | in hifmc100_send_cmd_erase()
398 hifmc100_ecc0_switch(host, ENABLE); in hifmc100_send_cmd_readid()
417 reg = fmc_op_cmd1_en(ENABLE) | fmc_op_addr_en(ENABLE) | in hifmc100_send_cmd_readid()
418 fmc_op_read_data_en(ENABLE) | FMC_OP_REG_OP_START; in hifmc100_send_cmd_readid()
[all …]
/third_party/uboot/u-boot-2020.01/board/nvidia/dalmore/
Dpinmux-config-dalmore.h124 I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
125 I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
137 I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
138 I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
216 I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
217 I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
244 I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
245 I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
272 USB_PINMUX(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
/third_party/uboot/u-boot-2020.01/board/nvidia/nyan-big/
Dpinmux-config-nyan-big.h104 PINCFG(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
105 PINCFG(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
148 PINCFG(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
149 PINCFG(USB_VBUS_EN1_PN5, USB, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
193 PINCFG(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
194 PINCFG(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
233 PINCFG(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
234 PINCFG(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
244 PINCFG(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
245 PINCFG(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
[all …]
/third_party/uboot/u-boot-2020.01/board/nvidia/venice2/
Dpinmux-config-venice2.h115 PINCFG(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
116 PINCFG(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
159 PINCFG(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
160 PINCFG(USB_VBUS_EN1_PN5, USB, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
204 PINCFG(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
205 PINCFG(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
244 PINCFG(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
245 PINCFG(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
255 PINCFG(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
256 PINCFG(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
[all …]
/third_party/uboot/u-boot-2020.01/board/avionic-design/common/
Dpinmux-config-tamonten-ng.h95 I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
96 I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
99 I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
100 I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
103 I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
104 I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
107 I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
108 I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
111 I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
112 I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
/third_party/uboot/u-boot-2020.01/board/nvidia/cardhu/
Dpinmux-config-cardhu.h90 I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
91 I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
94 I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
95 I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
98 I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
99 I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
102 I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
103 I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
106 I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
107 I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
/third_party/uboot/u-boot-2020.01/board/toradex/apalis-tk1/
Dpinmux-config-apalis-tk1.h88 PINCFG(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
89 PINCFG(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
112 PINCFG(PI5, RSVD2, UP, TRISTATE, INPUT, ENABLE, DEFAULT),
115 PINCFG(PJ0, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT),
116 PINCFG(PJ2, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT),
122 PINCFG(PK2, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT),
217 PINCFG(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
218 PINCFG(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
228 PINCFG(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
229 PINCFG(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
/third_party/skia/third_party/externals/swiftshader/src/Reactor/
DTraits.hpp67 template<typename T, typename ENABLE = void>
150 template<typename T, typename ENABLE = void>
243 template<typename T, typename ENABLE = void>
DTraits.inl22 template<typename T, typename ENABLE>
23 Pointer<Byte> CToReactorPtr<T, ENABLE>::cast(const T *v)
/third_party/uboot/u-boot-2020.01/board/toradex/apalis_t30/
Dpinmux-config-apalis_t30.h92 I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
93 I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
100 I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, TRISTATE, INPUT, DISABLE, ENABLE),
101 I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, TRISTATE, INPUT, DISABLE, ENABLE),
104 I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
105 I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
108 I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
109 I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
/third_party/uboot/u-boot-2020.01/board/toradex/colibri_t30/
Dpinmux-config-colibri_t30.h90 I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
91 I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
98 I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, TRISTATE, INPUT, DISABLE, ENABLE),
99 I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, TRISTATE, INPUT, DISABLE, ENABLE),
102 I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
103 I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
106 I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
107 I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
/third_party/jsframework/runtime/main/extend/systemplugin/napi/
Dohos_batteryInfo.js25 ENABLE: '[PC preview] unknow ENABLE', property
/third_party/uboot/u-boot-2020.01/board/cei/cei-tk1-som/
Dpinmux-config-cei-tk1-som.h100 PINCFG(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
101 PINCFG(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
189 PINCFG(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
190 PINCFG(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
229 PINCFG(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
230 PINCFG(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
240 PINCFG(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
241 PINCFG(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),

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