Searched refs:HID0 (Results 1 – 7 of 7) sorted by relevance
/third_party/uboot/u-boot-2020.01/arch/powerpc/cpu/mpc86xx/ |
D | cache.S | 36 mfspr r3,HID0 38 mtspr HID0,r3 46 mfspr r3,HID0 48 mtspr HID0,r3 175 mfspr r3, HID0 180 mtspr HID0, r5 181 mtspr HID0, r3 193 mfspr r3, HID0 197 mtspr HID0, r3 205 mfspr r3, HID0 [all …]
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D | release.S | 58 mfspr r0, HID0 61 mtspr HID0, r0 100 mfspr r3, HID0 103 mtspr HID0, r3 /* no invalidate, unlock */ 106 mtspr HID0, r5 /* enable + invalidate */ 107 mtspr HID0, r3 /* enable */ 119 mfspr r3, HID0 124 mtspr HID0, r5 125 mtspr HID0, r3 130 mfspr r4, HID0 [all …]
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D | start.S | 145 mtspr HID0, r0 866 mfspr r0, HID0 869 mtspr HID0, r0 917 mfspr r0, HID0 920 mtspr HID0, r0 953 mfspr r0, HID0 959 mtspr HID0, r0 978 mtspr HID0, r0
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/third_party/uboot/u-boot-2020.01/arch/powerpc/cpu/mpc83xx/ |
D | start.S | 542 mtspr HID0, r3 547 mtspr HID0, r3 733 mfspr r3, HID0 739 mtspr HID0, r4 /* sets enable and invalidate, clears lock */ 741 mtspr HID0, r3 /* clears invalidate */ 746 mfspr r3, HID0 751 mtspr HID0, r3 /* clears invalidate, enable and lock */ 756 mfspr r3, HID0 763 mfspr r3, HID0 768 mtspr HID0, r3 /* enable, no invalidate */ [all …]
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/third_party/uboot/u-boot-2020.01/arch/powerpc/cpu/mpc83xx/hid/ |
D | Kconfig | 3 menu "HID0 initial" 18 prompt "HID0 clock configuration" 84 menu "HID0 final" 99 prompt "HID0 clock configuration"
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/third_party/uboot/u-boot-2020.01/arch/powerpc/include/asm/ |
D | processor.h | 625 #define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */ macro
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/third_party/uboot/u-boot-2020.01/arch/powerpc/cpu/mpc85xx/ |
D | start.S | 311 mtspr HID0,r0
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