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Searched refs:I2C_ADAP_HWNR (Results 1 – 4 of 4) sorted by relevance

/third_party/uboot/u-boot-2020.01/include/configs/
Dstrider.h281 #define I2C_SDA_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0200 : 0x0040)
282 #define I2C_SCL_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0100 : 0x0020)
283 #define I2C_FPGA_IDX ((I2C_ADAP_HWNR > 3) ? \
284 (I2C_ADAP_HWNR - 4) : I2C_ADAP_HWNR)
286 #define I2C_SDA_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0040 : 0x0200)
287 #define I2C_SCL_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0020 : 0x0100)
288 #define I2C_FPGA_IDX (I2C_ADAP_HWNR % 4)
292 #define I2C_FPGA_IDX I2C_ADAP_HWNR
298 if (I2C_ADAP_HWNR > 7) \
Dhrcon.h259 #define I2C_SDA_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0040 : 0x0200)
260 #define I2C_SCL_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0020 : 0x0100)
261 #define I2C_FPGA_IDX (I2C_ADAP_HWNR % 4)
266 if (I2C_ADAP_HWNR > 7) \
/third_party/uboot/u-boot-2020.01/drivers/i2c/
Dihs_i2c.c45 if (I2C_ADAP_HWNR & 0x10) \
46 FPGA_SET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
48 FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
52 FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
58 if (I2C_ADAP_HWNR & 0x10) \
59 FPGA_GET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
61 FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
65 FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
/third_party/uboot/u-boot-2020.01/include/
Di2c.h589 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) macro