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Searched refs:MX6_MMDC_P0_MPZQHWCTRL (Results 1 – 21 of 21) sorted by relevance

/third_party/uboot/u-boot-2020.01/board/boundary/nitrogen6x/
D800mhz_4x128mx16.cfg21 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
D800mhz_2x256mx16.cfg21 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
D800mhz_2x128mx16.cfg21 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
D800mhz_4x256mx16.cfg21 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
D1066mhz_4x128mx16.cfg21 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
D1066mhz_4x256mx16.cfg21 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
/third_party/uboot/u-boot-2020.01/board/aristainetos/
Dnt5cc256m16cp.cfg6 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003
Dmt41j128M.cfg6 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003
/third_party/uboot/u-boot-2020.01/board/advantech/dms-ba16/
Dmicron-1g.cfg3 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003
Dsamsung-2g.cfg3 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003
/third_party/uboot/u-boot-2020.01/board/logicpd/imx6/
Dimx6logic.c245 MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003,
/third_party/uboot/u-boot-2020.01/board/tqc/tqma6/
Dtqma6dl.cfg75 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
Dtqma6q.cfg75 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
Dtqma6s.cfg75 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
/third_party/uboot/u-boot-2020.01/board/tbs/tbs2910/
Dtbs2910.cfg57 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
/third_party/uboot/u-boot-2020.01/board/ge/bx50v3/
Dbx50v3.cfg64 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003
/third_party/uboot/u-boot-2020.01/board/seco/mx6quq7/
Dmx6quq7-2g.cfg145 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003
/third_party/uboot/u-boot-2020.01/board/barco/titanium/
Dimximage.cfg131 DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1380003
/third_party/uboot/u-boot-2020.01/board/toradex/colibri_imx6/
Dcolibri_imx6.c851 MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003,
984 MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003,
/third_party/uboot/u-boot-2020.01/board/toradex/apalis_imx6/
Dapalis_imx6.c889 MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003,
1008 MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003,
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-mx6/
Dmx6-ddr.h487 #define MX6_MMDC_P0_MPZQHWCTRL 0x021b0800 macro