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Searched refs:PCI_BASE_ADDRESS_3 (Results 1 – 7 of 7) sorted by relevance

/third_party/uboot/u-boot-2020.01/board/freescale/common/
Dcds_via.c52 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_3, 0x1fe4); in mpc85xx_config_via_usbide()
/third_party/uboot/u-boot-2020.01/drivers/misc/
Dswap_case.c138 case PCI_BASE_ADDRESS_3: in sandbox_swap_case_read_config()
/third_party/uboot/u-boot-2020.01/test/dm/
Dpci.c287 bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_3, 0); in dm_test_pci_ea()
/third_party/uboot/u-boot-2020.01/drivers/pci/
Dpcie_layerscape.c384 writel(0, bar_base + PCI_BASE_ADDRESS_3); in ls_pcie_ep_setup_bar()
/third_party/uboot/u-boot-2020.01/cmd/
Dpci.c189 { "base address 3", PCI_SIZE_32, PCI_BASE_ADDRESS_3 },
/third_party/uboot/u-boot-2020.01/drivers/ata/
Dsata_sil3114.c657 pci_read_config_dword (devno, PCI_BASE_ADDRESS_3, &iobase[3]); in init_sata()
/third_party/uboot/u-boot-2020.01/include/
Dpci.h203 #define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */ macro