Searched refs:PLL_MODE_MASK (Results 1 – 4 of 4) sorted by relevance
| /third_party/uboot/u-boot-2020.01/drivers/clk/rockchip/ |
| D | clk_pll.c | 17 #define PLL_MODE_MASK 0x3 macro
305 pll->mode_mask = PLL_MODE_MASK; in rockchip_pll_get_rate()
330 pll->mode_mask = PLL_MODE_MASK; in rockchip_pll_set_rate()
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| D | clk_rk3368.c | 70 switch ((con & PLL_MODE_MASK) >> PLL_MODE_SHIFT) { in rkclk_pll_get_rate()
100 rk_clrsetreg(&pll->con3, PLL_MODE_MASK | PLL_RESET_MASK, in rkclk_set_pll()
122 rk_clrsetreg(&pll->con3, PLL_MODE_MASK, in rkclk_set_pll()
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| D | clk_rk3399.c | 90 PLL_MODE_MASK = 3 << PLL_MODE_SHIFT, enumerator
332 rk_clrsetreg(&pll_con[3], PLL_MODE_MASK, in rkclk_set_pll()
353 rk_clrsetreg(&pll_con[3], PLL_MODE_MASK, in rkclk_set_pll()
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| /third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-rockchip/ |
| D | cru_rk3368.h | 74 PLL_MODE_MASK = GENMASK(9, 8), enumerator
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