| /third_party/uboot/u-boot-2020.01/drivers/clk/sunxi/ |
| D | clk_r40.c | 57 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
58 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
59 [RST_USB_PHY2] = RESET(0x0cc, BIT(2)),
61 [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)),
62 [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)),
63 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
64 [RST_BUS_MMC3] = RESET(0x2c0, BIT(11)),
65 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
66 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
67 [RST_BUS_SPI2] = RESET(0x2c0, BIT(22)),
[all …]
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| D | clk_a31.c | 53 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
54 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
55 [RST_USB_PHY2] = RESET(0x0cc, BIT(2)),
57 [RST_AHB1_MMC0] = RESET(0x2c0, BIT(8)),
58 [RST_AHB1_MMC1] = RESET(0x2c0, BIT(9)),
59 [RST_AHB1_MMC2] = RESET(0x2c0, BIT(10)),
60 [RST_AHB1_MMC3] = RESET(0x2c0, BIT(11)),
61 [RST_AHB1_EMAC] = RESET(0x2c0, BIT(17)),
62 [RST_AHB1_SPI0] = RESET(0x2c0, BIT(20)),
63 [RST_AHB1_SPI1] = RESET(0x2c0, BIT(21)),
[all …]
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| D | clk_h3.c | 53 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
54 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
55 [RST_USB_PHY2] = RESET(0x0cc, BIT(2)),
56 [RST_USB_PHY3] = RESET(0x0cc, BIT(3)),
58 [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)),
59 [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)),
60 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
61 [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)),
62 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
63 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
[all …]
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| D | clk_h6.c | 50 [RST_BUS_MMC0] = RESET(0x84c, BIT(16)),
51 [RST_BUS_MMC1] = RESET(0x84c, BIT(17)),
52 [RST_BUS_MMC2] = RESET(0x84c, BIT(18)),
53 [RST_BUS_UART0] = RESET(0x90c, BIT(16)),
54 [RST_BUS_UART1] = RESET(0x90c, BIT(17)),
55 [RST_BUS_UART2] = RESET(0x90c, BIT(18)),
56 [RST_BUS_UART3] = RESET(0x90c, BIT(19)),
58 [RST_BUS_SPI0] = RESET(0x96c, BIT(16)),
59 [RST_BUS_SPI1] = RESET(0x96c, BIT(17)),
61 [RST_BUS_EMAC] = RESET(0x97c, BIT(16)),
[all …]
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| D | clk_a64.c | 46 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
47 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
48 [RST_USB_HSIC] = RESET(0x0cc, BIT(2)),
50 [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)),
51 [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)),
52 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
53 [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)),
54 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
55 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
56 [RST_BUS_OTG] = RESET(0x2c0, BIT(23)),
[all …]
|
| D | clk_a83t.c | 44 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
45 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
46 [RST_USB_HSIC] = RESET(0x0cc, BIT(2)),
48 [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)),
49 [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)),
50 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
51 [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)),
52 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
53 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
54 [RST_BUS_OTG] = RESET(0x2c0, BIT(24)),
[all …]
|
| D | clk_a23.c | 42 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
43 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
44 [RST_USB_HSIC] = RESET(0x0cc, BIT(2)),
46 [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)),
47 [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)),
48 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
49 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
50 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
51 [RST_BUS_OTG] = RESET(0x2c0, BIT(24)),
52 [RST_BUS_EHCI] = RESET(0x2c0, BIT(26)),
[all …]
|
| D | clk_a80.c | 36 [RST_BUS_MMC] = RESET(0x5a0, BIT(8)),
37 [RST_BUS_SPI0] = RESET(0x5a0, BIT(20)),
38 [RST_BUS_SPI1] = RESET(0x5a0, BIT(21)),
39 [RST_BUS_SPI2] = RESET(0x5a0, BIT(22)),
40 [RST_BUS_SPI3] = RESET(0x5a0, BIT(23)),
42 [RST_BUS_UART0] = RESET(0x5b4, BIT(16)),
43 [RST_BUS_UART1] = RESET(0x5b4, BIT(17)),
44 [RST_BUS_UART2] = RESET(0x5b4, BIT(18)),
45 [RST_BUS_UART3] = RESET(0x5b4, BIT(19)),
46 [RST_BUS_UART4] = RESET(0x5b4, BIT(20)),
[all …]
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| D | clk_v3s.c | 32 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
34 [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)),
35 [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)),
36 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
37 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
38 [RST_BUS_OTG] = RESET(0x2c0, BIT(24)),
40 [RST_BUS_UART0] = RESET(0x2d8, BIT(16)),
41 [RST_BUS_UART1] = RESET(0x2d8, BIT(17)),
42 [RST_BUS_UART2] = RESET(0x2d8, BIT(18)),
|
| D | clk_a10.c | 54 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
55 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
56 [RST_USB_PHY2] = RESET(0x0cc, BIT(2)),
|
| D | clk_a10s.c | 42 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
43 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
|
| /third_party/uboot/u-boot-2020.01/arch/arm/mach-exynos/ |
| D | sec_boot.S | 88 .word 0x1 @ CPU0_STATE : RESET
89 .word 0x2 @ CPU1_STATE : SECONDARY RESET
90 .word 0x2 @ CPU2_STATE : SECONDARY RESET
91 .word 0x2 @ CPU3_STATE : SECONDARY RESET
|
| /third_party/uboot/u-boot-2020.01/tools/patman/ |
| D | terminal.py | 99 RESET = '\033[0m' variable in Color
138 return self.RESET
161 return start + text + self.RESET
|
| /third_party/boost/libs/locale/test/ |
| D | test_date_time.cpp | 27 #define RESET() do { time_point = base_time_point; ss.str(""); } while(0) macro
28 #define TESTR(X) do { TEST(X); RESET(); } while(0)
109 RESET(); in main()
177 RESET(); in main()
242 RESET(); in main()
251 RESET(); in main()
265 RESET(); in main()
|
| /third_party/pulseaudio/src/modules/ |
| D | module-lirc.c | 97 RESET, in io_callback() enumerator
112 volchange = RESET; in io_callback()
139 case RESET: in io_callback()
|
| /third_party/uboot/u-boot-2020.01/drivers/fpga/ |
| D | ivm_core.c | 251 { RESET, RESET, 0xFC, 6 }, /* Transitions from RESET */
252 { RESET, IDLE, 0x00, 1 },
253 { RESET, DRPAUSE, 0x50, 5 },
254 { RESET, IRPAUSE, 0x68, 6 },
255 { IDLE, RESET, 0xE0, 3 }, /* Transitions from IDLE */
258 { DRPAUSE, RESET, 0xF8, 5 }, /* Transitions from DRPAUSE */
262 { IRPAUSE, RESET, 0xF8, 5 }, /* Transitions from IRPAUSE */
333 case RESET: in GetState()
2441 (cNextJTAGState != RESET)) { in ispVMStateMachine()
2496 ispVMStateMachine(RESET); /*step devices to RESET state*/ in ispVMStart()
[all …]
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| /third_party/uboot/u-boot-2020.01/drivers/rtc/ |
| D | ds1302.c | 18 #define RESET rtc_go_low(RST), rtc_go_low(SCLK) macro
164 RESET; in read_ser_drv()
184 RESET; in write_ser_drv()
|
| /third_party/uboot/u-boot-2020.01/board/freescale/mx28evk/ |
| D | README | 20 * JTAG PSWITCH RESET: To the right (reset disabled)
29 * JTAG PSWITCH RESET: To the right (reset disabled)
|
| /third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-sunxi/ |
| D | ccu.h | 51 #define RESET(_off, _bit) { \ macro
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
| D | raw_ostream.h | 86 RESET, enumerator
98 static const Colors RESET = Colors::RESET; variable
|
| /third_party/jerryscript/targets/particle/ |
| D | README.md | 42 …, put your Photon in DFU mode: hold down both the SETUP and RESET buttons. Then release RESET, but…
|
| /third_party/node/src/ |
| D | histogram.h | 154 RESET enumerator
199 void OnStart(StartFlags flags = StartFlags::RESET);
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| /third_party/uboot/u-boot-2020.01/board/rockchip/evb_rk3399/ |
| D | README | 106 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
114 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
|
| /third_party/ffmpeg/ |
| D | Makefile | 83 define RESET macro
89 $(foreach V,$(SUBDIR_VARS),$(eval $(call RESET,$(V))))
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| /third_party/uboot/u-boot-2020.01/board/rockchip/evb_rv1108/ |
| D | README | 17 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
|