| /third_party/FreeBSD/sys/crypto/sha2/ |
| D | sha256c.c | 105 #define ROTR(x, n) ((x >> n) | (x << (32 - n))) macro
106 #define S0(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
107 #define S1(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
108 #define s0(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHR(x, 3))
109 #define s1(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHR(x, 10))
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| /third_party/uboot/u-boot-2020.01/lib/libavb/ |
| D | avb_sha256.c | 14 #define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n))) macro
19 #define SHA256_F1(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
20 #define SHA256_F2(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
21 #define SHA256_F3(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHFR(x, 3))
22 #define SHA256_F4(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHFR(x, 10))
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| D | avb_sha512.c | 14 #define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n))) macro
19 #define SHA512_F1(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
20 #define SHA512_F2(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
21 #define SHA512_F3(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHFR(x, 7))
22 #define SHA512_F4(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHFR(x, 6))
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| /third_party/boringssl/src/crypto/fipsmodule/sha/ |
| D | sha512.c | 320 #define ROTR(a, n) \ macro
327 #define ROTR(a, n) \ macro
334 #define ROTR(a, n) \ macro
343 #define ROTR(a, n) _rotr64((a), n) macro
346 #ifndef ROTR
347 #define ROTR(x, s) (((x) >> s) | (x) << (64 - s)) macro
356 #define Sigma0(x) (ROTR((x), 28) ^ ROTR((x), 34) ^ ROTR((x), 39))
357 #define Sigma1(x) (ROTR((x), 14) ^ ROTR((x), 18) ^ ROTR((x), 41))
358 #define sigma0(x) (ROTR((x), 1) ^ ROTR((x), 8) ^ ((x) >> 7))
359 #define sigma1(x) (ROTR((x), 19) ^ ROTR((x), 61) ^ ((x) >> 6))
[all …]
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| /third_party/openssl/crypto/sha/asm/ |
| D | sha512-mips.pl | 99 $ROTR="drotr";
114 $ROTR="rotr";
189 $ROTR $tmp0,$e,@Sigma1[0]
191 $ROTR $tmp1,$e,@Sigma1[1]
193 $ROTR $h,$e,@Sigma1[2]
195 $ROTR $tmp1,$a,@Sigma0[0]
199 $ROTR $h,$a,@Sigma0[1]
203 $ROTR $tmp1,$a,@Sigma0[2]
262 $ROTR $tmp0,@X[1],@sigma0[1]
265 $ROTR $tmp0,@X[1],@sigma0[2]
[all …]
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| /third_party/mbedtls/library/ |
| D | sha512.c | 256 #define ROTR(x,n) (SHR((x),(n)) | ((x) << (64 - (n)))) in mbedtls_internal_sha512_process() macro
258 #define S0(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHR(x, 7)) in mbedtls_internal_sha512_process()
259 #define S1(x) (ROTR(x,19) ^ ROTR(x,61) ^ SHR(x, 6)) in mbedtls_internal_sha512_process()
261 #define S2(x) (ROTR(x,28) ^ ROTR(x,34) ^ ROTR(x,39)) in mbedtls_internal_sha512_process()
262 #define S3(x) (ROTR(x,14) ^ ROTR(x,18) ^ ROTR(x,41)) in mbedtls_internal_sha512_process()
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| D | sha256.c | 201 #define ROTR(x,n) (SHR(x,n) | ((x) << (32 - (n)))) macro
203 #define S0(x) (ROTR(x, 7) ^ ROTR(x,18) ^ SHR(x, 3))
204 #define S1(x) (ROTR(x,17) ^ ROTR(x,19) ^ SHR(x,10))
206 #define S2(x) (ROTR(x, 2) ^ ROTR(x,13) ^ ROTR(x,22))
207 #define S3(x) (ROTR(x, 6) ^ ROTR(x,11) ^ ROTR(x,25))
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| /third_party/uboot/u-boot-2020.01/lib/ |
| D | sha256.c | 82 #define ROTR(x,n) (SHR(x,n) | (x << (32 - n))) in sha256_process() macro
84 #define S0(x) (ROTR(x, 7) ^ ROTR(x,18) ^ SHR(x, 3)) in sha256_process()
85 #define S1(x) (ROTR(x,17) ^ ROTR(x,19) ^ SHR(x,10)) in sha256_process()
87 #define S2(x) (ROTR(x, 2) ^ ROTR(x,13) ^ ROTR(x,22)) in sha256_process()
88 #define S3(x) (ROTR(x, 6) ^ ROTR(x,11) ^ ROTR(x,25)) in sha256_process()
|
| /third_party/openssl/crypto/sha/ |
| D | sha512.c | 402 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro
432 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro
437 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro
452 # define ROTR(a,n) _rotr64((a),n) macro
485 # ifndef ROTR
486 # define ROTR(x,s) (((x)>>s) | (x)<<(64-s)) macro
488 # define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
489 # define Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
490 # define sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
491 # define sigma1(x) (ROTR((x),19) ^ ROTR((x),61) ^ ((x)>>6))
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| /third_party/glib/glib/ |
| D | gchecksum.c | 874 #define ROTR(x,n) (SHR (x,n) | (x << (32 - n))) in sha256_transform() macro
876 #define S0(x) (ROTR (x, 7) ^ ROTR (x,18) ^ SHR (x, 3)) in sha256_transform()
877 #define S1(x) (ROTR (x,17) ^ ROTR (x,19) ^ SHR (x,10)) in sha256_transform()
878 #define S2(x) (ROTR (x, 2) ^ ROTR (x,13) ^ ROTR (x,22)) in sha256_transform()
879 #define S3(x) (ROTR (x, 6) ^ ROTR (x,11) ^ ROTR (x,25)) in sha256_transform()
967 #undef ROTR in sha256_transform()
1102 #define ROTR(n,x) (SHR (n, x) | (x << (64 - n))) macro
1103 #define SIGMA0(x) (ROTR (28, x) ^ ROTR (34, x) ^ ROTR (39, x))
1104 #define SIGMA1(x) (ROTR (14, x) ^ ROTR (18, x) ^ ROTR (41, x))
1105 #define sigma0(x) (ROTR ( 1, x) ^ ROTR ( 8, x) ^ SHR ( 7, x))
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMSelectionDAGInfo.h | 29 case ISD::ROTR: return ARM_AM::ror; in getShiftOpcForNode()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 2300 { ISD::ROTR, MVT::v8i64, 1 }, in getIntrinsicInstrCost()
2301 { ISD::ROTR, MVT::v4i64, 1 }, in getIntrinsicInstrCost()
2302 { ISD::ROTR, MVT::v2i64, 1 }, in getIntrinsicInstrCost()
2303 { ISD::ROTR, MVT::v16i32, 1 }, in getIntrinsicInstrCost()
2304 { ISD::ROTR, MVT::v8i32, 1 }, in getIntrinsicInstrCost()
2305 { ISD::ROTR, MVT::v4i32, 1 } in getIntrinsicInstrCost()
2317 { ISD::ROTR, MVT::v4i64, 6 }, in getIntrinsicInstrCost()
2318 { ISD::ROTR, MVT::v8i32, 6 }, in getIntrinsicInstrCost()
2319 { ISD::ROTR, MVT::v16i16, 6 }, in getIntrinsicInstrCost()
2320 { ISD::ROTR, MVT::v32i8, 6 }, in getIntrinsicInstrCost()
[all …]
|
| D | X86InstrShiftRotate.td | 862 // Convert a ROTL shamt to a ROTR shamt on 32-bit integer.
867 // Convert a ROTL shamt to a ROTR shamt on 64-bit integer.
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 471 SHL, SRA, SRL, ROTL, ROTR, FSHL, FSHR, enumerator
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 144 setOperationAction(ISD::ROTR, MVT::i32, Expand); in Mips16TargetLowering()
145 setOperationAction(ISD::ROTR, MVT::i64, Expand); in Mips16TargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 93 setOperationAction(ISD::ROTR, MVT::i8, Custom); in AVRTargetLowering()
94 setOperationAction(ISD::ROTR, MVT::i16, Expand); in AVRTargetLowering()
300 case ISD::ROTR: in LowerShifts()
319 case ISD::ROTR: in LowerShifts()
691 case ISD::ROTR: in LowerOperation()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 70 defm ROTR : BinaryInt<rotr, "rotr", 0x78, 0x8a>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 245 case ISD::ROTR: return "rotr"; in getOperationName()
|
| D | LegalizeVectorOps.cpp | 391 case ISD::ROTR: in LegalizeOp()
921 case ISD::ROTR: in Expand()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 94 setOperationAction(ISD::ROTR, VT, Expand); in BPFTargetLowering()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| D | ARCISelLowering.cpp | 104 setOperationAction(ISD::ROTR, MVT::i32, Legal); in ARCTargetLowering()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 83 setOperationAction(ISD::ROTR, MVT::i8, Expand); in MSP430TargetLowering()
85 setOperationAction(ISD::ROTR, MVT::i16, Expand); in MSP430TargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1429 ISD::SDIVREM, ISD::UDIVREM, ISD::ROTL, ISD::ROTR, in HexagonTargetLowering()
1478 ISD::AND, ISD::OR, ISD::XOR, ISD::ROTL, ISD::ROTR, in HexagonTargetLowering()
1617 setOperationAction(ISD::ROTR, MVT::i32, Legal); in HexagonTargetLowering()
1618 setOperationAction(ISD::ROTR, MVT::i64, Legal); in HexagonTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 425 setOperationAction(ISD::ROTR, MVT::i64, Legal); in NVPTXTargetLowering()
427 setOperationAction(ISD::ROTR, MVT::i32, Legal); in NVPTXTargetLowering()
430 setOperationAction(ISD::ROTR, MVT::i16, Expand); in NVPTXTargetLowering()
432 setOperationAction(ISD::ROTR, MVT::i8, Expand); in NVPTXTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenFastISel.inc | 1920 // FastEmit functions for ISD::ROTR.
3418 case ISD::ROTR: return fastEmit_ISD_ROTR_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3606 // FastEmit functions for ISD::ROTR.
3615 return fastEmitInst_ri(Mips::ROTR, &Mips::GPR32RegClass, Op0, Op0IsKill, imm1);
3703 case ISD::ROTR: return fastEmit_ISD_ROTR_ri_Predicate_immZExt5(VT, RetVT, Op0, Op0IsKill, imm1);
3711 // FastEmit functions for ISD::ROTR.
3787 case ISD::ROTR: return fastEmit_ISD_ROTR_ri_Predicate_immZExt6(VT, RetVT, Op0, Op0IsKill, imm1);
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