| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 757 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
770 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
795 ArrayRef<MachineOperand> Cond, unsigned TrueReg, in insertSelect() argument
803 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in insertSelect()
855 unsigned FirstReg = SwapOps ? FalseReg : TrueReg, in insertSelect()
856 SecondReg = SwapOps ? TrueReg : FalseReg; in insertSelect()
2224 unsigned TrueReg, unsigned FalseReg, in selectReg() argument
2231 return Imm1 < Imm2 ? TrueReg : FalseReg; in selectReg()
2233 return Imm1 > Imm2 ? TrueReg : FalseReg; in selectReg()
2235 return Imm1 == Imm2 ? TrueReg : FalseReg; in selectReg()
[all …]
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| D | PPCMIPeephole.cpp | 459 unsigned TrueReg = in simplifyCode() local
461 if (!Register::isVirtualRegister(TrueReg)) in simplifyCode()
463 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode()
522 unsigned TrueReg = in simplifyCode() local
524 if (!Register::isVirtualRegister(TrueReg)) in simplifyCode()
526 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode()
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| D | PPCInstrInfo.h | 279 ArrayRef<MachineOperand> Cond, unsigned TrueReg,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 789 auto TrueReg = MIB->getOperand(2).getReg(); in selectSelect() local
791 assert(validOpRegPair(MRI, ResReg, TrueReg, 32, ARM::GPRRegBankID) && in selectSelect()
792 validOpRegPair(MRI, TrueReg, FalseReg, 32, ARM::GPRRegBankID) && in selectSelect()
796 .addUse(TrueReg) in selectSelect()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 535 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
547 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
570 unsigned TrueReg, in insertSelect() argument
590 BuildMI(MBB, I, DL, get(TargetOpcode::COPY), TReg).addReg(TrueReg); in insertSelect()
592 TrueReg = TReg; in insertSelect()
604 .addReg(FalseReg).addReg(TrueReg) in insertSelect()
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| D | SystemZInstrInfo.h | 228 ArrayRef<MachineOperand> Cond, unsigned TrueReg,
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| D | SystemZISelLowering.cpp | 6814 Register TrueReg = MI->getOperand(1).getReg(); in createPHIsForSelects() local
6821 std::swap(TrueReg, FalseReg); in createPHIsForSelects()
6823 if (RegRewriteTable.find(TrueReg) != RegRewriteTable.end()) in createPHIsForSelects()
6824 TrueReg = RegRewriteTable[TrueReg].first; in createPHIsForSelects()
6831 .addReg(TrueReg).addMBB(TrueMBB) in createPHIsForSelects()
6835 RegRewriteTable[DestReg] = std::make_pair(TrueReg, FalseReg); in createPHIsForSelects()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 895 unsigned TrueReg = getRegForValue(Select->getTrueValue()); in selectSelect() local
896 if (TrueReg == 0) in selectSelect()
904 std::swap(TrueReg, FalseReg); in selectSelect()
938 .addReg(TrueReg) in selectSelect()
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| D | WebAssemblyISelLowering.cpp | 387 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg; in LowerFPToInt() local
393 TrueReg = MRI.createVirtualRegister(MRI.getRegClass(OutReg)); in LowerFPToInt()
427 BuildMI(TrueMBB, DL, TII.get(IConst), TrueReg).addImm(Substitute); in LowerFPToInt()
431 .addReg(TrueReg) in LowerFPToInt()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.h | 297 unsigned TrueReg, unsigned FalseReg,
304 unsigned TrueReg, unsigned FalseReg) const override;
309 unsigned TrueReg, unsigned FalseReg) const;
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| D | SIInstrInfo.cpp | 823 unsigned TrueReg, in insertVectorSelect() argument
841 .addReg(TrueReg) in insertVectorSelect()
856 .addReg(TrueReg) in insertVectorSelect()
870 .addReg(TrueReg) in insertVectorSelect()
884 .addReg(TrueReg) in insertVectorSelect()
896 .addReg(TrueReg) in insertVectorSelect()
916 .addReg(TrueReg) in insertVectorSelect()
934 .addReg(TrueReg) in insertVectorSelect()
2128 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
2135 const TargetRegisterClass *RC = MRI.getRegClass(TrueReg); in canInsertSelect()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.h | 197 ArrayRef<MachineOperand> Cond, unsigned TrueReg,
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| D | AArch64InstrInfo.cpp | 499 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
505 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
519 if (canFoldIntoCSel(MRI, TrueReg)) in canInsertSelect()
543 unsigned TrueReg, unsigned FalseReg) const { in insertSelect() argument
646 unsigned FoldedOpc = canFoldIntoCSel(MRI, TrueReg, &NewVReg); in insertSelect()
651 TrueReg = FalseReg; in insertSelect()
665 MRI.constrainRegClass(TrueReg, RC); in insertSelect()
670 .addReg(TrueReg) in insertSelect()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 847 ArrayRef<MachineOperand> Cond, unsigned TrueReg, in canInsertSelect() argument
871 unsigned TrueReg, unsigned FalseReg) const { in insertSelect() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 312 ArrayRef<MachineOperand> Cond, unsigned TrueReg,
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| D | X86InstrInfo.cpp | 2832 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
2846 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
2869 ArrayRef<MachineOperand> Cond, unsigned TrueReg, in insertSelect() argument
2879 .addReg(TrueReg) in insertSelect()
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