/third_party/uboot/u-boot-2020.01/arch/arm/mach-sunxi/ |
D | clock_sun4i.c | 121 int axi, ahb, apb0; in clock_set_pll1() local 134 axi = DIV_ROUND_UP(hz, 432000000); /* Max 450MHz */ in clock_set_pll1() 135 ahb = DIV_ROUND_UP(hz/axi, 204000000); /* Max 250MHz */ in clock_set_pll1() 138 printf("CPU: %uHz, AXI/AHB/APB: %d/%d/%d\n", hz, axi, ahb, apb0); in clock_set_pll1() 141 axi = axi - 1; in clock_set_pll1() 162 writel(axi << AXI_DIV_SHIFT | in clock_set_pll1() 173 writel(axi << AXI_DIV_SHIFT | in clock_set_pll1()
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/third_party/uboot/u-boot-2020.01/arch/arm/dts/ |
D | imx6qp.dtsi | 27 clock-names = "axi"; 36 clock-names = "axi"; 45 clock-names = "axi"; 54 clock-names = "axi"; 63 clock-names = "ipg", "axi"; 72 clock-names = "ipg", "axi";
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D | socfpga_arria10.dtsi | 428 socfpga_axi_setup: stmmac-axi-config { 450 snps,axi-config = <&socfpga_axi_setup>; 470 snps,axi-config = <&socfpga_axi_setup>; 490 snps,axi-config = <&socfpga_axi_setup>;
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D | imx6sx.dtsi | 1122 clock-names = "disp-axi", "csi_mclk", "dcic"; 1131 clock-names = "pxp-axi", "disp-axi"; 1141 clock-names = "disp-axi", "csi_mclk", "dcic"; 1152 clock-names = "pix", "axi", "disp_axi"; 1163 clock-names = "pix", "axi", "disp_axi";
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D | imx6sll.dtsi | 627 clock-names = "disp-axi", "csi_mclk", "disp_dcic"; 670 clock-names = "pix", "axi", "disp_axi";
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D | imx7ulp.dtsi | 473 clock-names = "axi", "pix", "disp_axi";
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D | rk3288.dtsi | 664 reset-names = "axi", "ahb", "dclk"; 708 reset-names = "axi", "ahb", "dclk";
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D | stm32mp157c.dtsi | 1392 stmmac_axi_config_0: stmmac-axi-config { 1417 snps,axi-config = <&stmmac_axi_config_0>;
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/third_party/uboot/u-boot-2020.01/drivers/axi/ |
D | Makefile | 7 obj-$(CONFIG_AXI) += axi-uclass.o 9 obj-$(CONFIG_SANDBOX) += axi-emul-uclass.o
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D | axi-uclass.c | 33 UCLASS_DRIVER(axi) = {
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/third_party/boost/libs/histogram/benchmark/ |
D | plot_benchmarks.py | 80 for axi in ax.flatten(): 81 axi.format_coord = format_coord 99 for axi in ax.flatten(): 100 for artist in axi.get_children():
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/third_party/uboot/u-boot-2020.01/drivers/pci/ |
D | pci_tegra.c | 803 unsigned long fpci, axi, size; local 810 axi = pcie->cs.start; 812 afi_writel(pcie, axi, AFI_AXI_BAR0_START); 823 axi = io->phys_start; 825 afi_writel(pcie, axi, AFI_AXI_BAR1_START); 832 axi = pref->phys_start; 834 afi_writel(pcie, axi, AFI_AXI_BAR2_START); 841 axi = mem->phys_start; 843 afi_writel(pcie, axi, AFI_AXI_BAR3_START);
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/third_party/uboot/u-boot-2020.01/arch/mips/dts/ |
D | img,boston.dts | 49 compatible = "xlnx,axi-pcie-host-1.00.a"; 78 compatible = "xlnx,axi-pcie-host-1.00.a"; 106 compatible = "xlnx,axi-pcie-host-1.00.a";
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D | nexys4ddr.dts | 36 xlnx,s-axi-id-width = <0x1>;
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/third_party/uboot/u-boot-2020.01/arch/sandbox/dts/ |
D | sandbox.dtsi | 313 axi: axi@0 { label 314 compatible = "sandbox,axi";
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D | sandbox64.dts | 14 axi0 = &axi;
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D | sandbox.dts | 14 axi0 = &axi;
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D | test.dts | 41 axi0 = &axi; 764 axi: axi@0 { label 765 compatible = "sandbox,axi";
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/third_party/uboot/u-boot-2020.01/board/aristainetos/ |
D | aristainetos2.cfg | 33 #include "axi.cfg"
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/third_party/uboot/u-boot-2020.01/test/dm/ |
D | Makefile | 58 obj-$(CONFIG_AXI) += axi.o
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/third_party/uboot/u-boot-2020.01/drivers/ |
D | Kconfig | 11 source "drivers/axi/Kconfig"
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D | Makefile | 112 obj-y += axi/
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/third_party/uboot/u-boot-2020.01/cmd/ |
D | axi.c | 349 U_BOOT_CMD(axi, 7, 1, do_ihs_axi,
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D | Makefile | 167 obj-$(CONFIG_CMD_AXI) += axi.o
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/third_party/uboot/u-boot-2020.01/arch/arc/dts/ |
D | hsdk.dts | 48 "apb-clk", "axi-clk",
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