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Searched refs:ddrca_val (Results 1 – 2 of 2) sorted by relevance

/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3535av100/
Dlowlevel_init_v300.c162 unsigned int ddrca_val[4] = {0, 0, 0, 0}; in ddr_scramb() local
194 ddrca_val[0] = reg_get(REG_BASE_DDRC + 0x8164); in ddr_scramb()
195 reg_set(REG_BASE_DDRC + 0x8184, ddrca_val[0]); in ddr_scramb()
197 ddrca_val[1] = reg_get(REG_BASE_DDRC + 0x8168); in ddr_scramb()
198 reg_set(REG_BASE_DDRC + 0x8188, ddrca_val[1]); in ddr_scramb()
200 ddrca_val[2] = reg_get(REG_BASE_DDRC + 0x816c); in ddr_scramb()
201 reg_set(REG_BASE_DDRC + 0x8048, ddrca_val[2]); in ddr_scramb()
205 ddrca_val[0] = reg_get(REG_BASE_DDRC + 0x9164); in ddr_scramb()
206 reg_set(REG_BASE_DDRC + 0x9184, ddrca_val[0]); in ddr_scramb()
208 ddrca_val[1] = reg_get(REG_BASE_DDRC + 0x9168); in ddr_scramb()
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/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3531dv200/
Dlowlevel_init_v300.c162 unsigned int ddrca_val[4] = {0, 0, 0, 0}; in ddr_scramb() local
194 ddrca_val[0] = reg_get(REG_BASE_DDRC + 0x8164); in ddr_scramb()
195 reg_set(REG_BASE_DDRC + 0x8184, ddrca_val[0]); in ddr_scramb()
197 ddrca_val[1] = reg_get(REG_BASE_DDRC + 0x8168); in ddr_scramb()
198 reg_set(REG_BASE_DDRC + 0x8188, ddrca_val[1]); in ddr_scramb()
200 ddrca_val[2] = reg_get(REG_BASE_DDRC + 0x816c); in ddr_scramb()
201 reg_set(REG_BASE_DDRC + 0x8048, ddrca_val[2]); in ddr_scramb()
205 ddrca_val[0] = reg_get(REG_BASE_DDRC + 0x9164); in ddr_scramb()
206 reg_set(REG_BASE_DDRC + 0x9184, ddrca_val[0]); in ddr_scramb()
208 ddrca_val[1] = reg_get(REG_BASE_DDRC + 0x9168); in ddr_scramb()
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