| /third_party/uboot/u-boot-2020.01/drivers/ram/ |
| D | mpc83xx_sdram.c | 365 dso = dev_read_u32_default(dev, "driver_software_override", 0); in mpc83xx_sdram_probe()
372 pz_override = dev_read_u32_default(dev, "p_impedance_override", 0); in mpc83xx_sdram_probe()
387 nz_override = dev_read_u32_default(dev, "n_impedance_override", 0); in mpc83xx_sdram_probe()
402 odt_term = dev_read_u32_default(dev, "odt_termination_value", 0); in mpc83xx_sdram_probe()
409 ddr_type = dev_read_u32_default(dev, "ddr_type", 0); in mpc83xx_sdram_probe()
416 mvref_sel = dev_read_u32_default(dev, "mvref_sel", 0); in mpc83xx_sdram_probe()
423 m_odr = dev_read_u32_default(dev, "m_odr", 0); in mpc83xx_sdram_probe()
476 clock_adjust = dev_read_u32_default(dev, "clock_adjust", 0); in mpc83xx_sdram_probe()
492 ext_refresh_rec = dev_read_u32_default(dev, "ext_refresh_rec", 0); in mpc83xx_sdram_probe()
527 read_to_write = dev_read_u32_default(dev, "read_to_write", 0); in mpc83xx_sdram_probe()
[all …]
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| /third_party/uboot/u-boot-2020.01/drivers/gpio/ |
| D | xilinx_gpio.c | 272 platdata->bank_max[0] = dev_read_u32_default(dev, in xilinx_gpio_ofdata_to_platdata()
274 platdata->bank_input[0] = dev_read_u32_default(dev, in xilinx_gpio_ofdata_to_platdata()
276 platdata->bank_output[0] = dev_read_u32_default(dev, in xilinx_gpio_ofdata_to_platdata()
278 platdata->dout_default[0] = dev_read_u32_default(dev, in xilinx_gpio_ofdata_to_platdata()
282 is_dual = dev_read_u32_default(dev, "xlnx,is-dual", 0); in xilinx_gpio_ofdata_to_platdata()
284 platdata->bank_max[1] = dev_read_u32_default(dev, in xilinx_gpio_ofdata_to_platdata()
286 platdata->bank_input[1] = dev_read_u32_default(dev, in xilinx_gpio_ofdata_to_platdata()
288 platdata->bank_output[1] = dev_read_u32_default(dev, in xilinx_gpio_ofdata_to_platdata()
290 platdata->dout_default[1] = dev_read_u32_default(dev, in xilinx_gpio_ofdata_to_platdata()
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| D | hsdk-creg-gpio.c | 85 gpio_count = dev_read_u32_default(dev, "gpio-count", 1); in hsdk_creg_gpio_probe()
86 shift = dev_read_u32_default(dev, "gpio-first-shift", 0); in hsdk_creg_gpio_probe()
87 bit_per_gpio = dev_read_u32_default(dev, "gpio-bit-per-line", 1); in hsdk_creg_gpio_probe()
88 activate = dev_read_u32_default(dev, "gpio-activate-val", 1); in hsdk_creg_gpio_probe()
89 deactivate = dev_read_u32_default(dev, "gpio-deactivate-val", 0); in hsdk_creg_gpio_probe()
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| D | mscc_sgpio.c | 210 priv->ports = dev_read_u32_default(dev, "mscc,sgpio-ports", 0xFFFFFFFF); in mscc_sgpio_probe()
211 priv->clock = dev_read_u32_default(dev, "mscc,sgpio-frequency", in mscc_sgpio_probe()
219 uc_priv->gpio_count = dev_read_u32_default(dev, "ngpios", in mscc_sgpio_probe()
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| /third_party/uboot/u-boot-2020.01/drivers/sysreset/ |
| D | sysreset_syscon.c | 50 priv->offset = dev_read_u32_default(dev, "offset", 0); in syscon_reboot_probe()
51 priv->mask = dev_read_u32_default(dev, "mask", 0); in syscon_reboot_probe()
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| /third_party/uboot/u-boot-2020.01/drivers/clk/ |
| D | clk_fixed_factor.c | 50 ff->div = dev_read_u32_default(dev, "clock-div", 1); in clk_fixed_factor_ofdata_to_platdata()
51 ff->mult = dev_read_u32_default(dev, "clock-mult", 1); in clk_fixed_factor_ofdata_to_platdata()
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| D | clk_fixed_rate.c | 25 dev_read_u32_default(dev, "clock-frequency", 0); in clk_fixed_rate_ofdata_to_platdata()
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| /third_party/uboot/u-boot-2020.01/drivers/power/regulator/ |
| D | regulator_common.c | 37 dev_pdata->startup_delay_us = dev_read_u32_default(dev, in regulator_common_ofdata_to_platdata()
40 dev_read_u32_default(dev, "u-boot,off-on-delay-us", 0); in regulator_common_ofdata_to_platdata()
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| D | regulator-uclass.c | 430 uc_pdata->min_uV = dev_read_u32_default(dev, "regulator-min-microvolt", in regulator_pre_probe()
432 uc_pdata->max_uV = dev_read_u32_default(dev, "regulator-max-microvolt", in regulator_pre_probe()
434 uc_pdata->init_uV = dev_read_u32_default(dev, "regulator-init-microvolt", in regulator_pre_probe()
436 uc_pdata->min_uA = dev_read_u32_default(dev, "regulator-min-microamp", in regulator_pre_probe()
438 uc_pdata->max_uA = dev_read_u32_default(dev, "regulator-max-microamp", in regulator_pre_probe()
442 uc_pdata->ramp_delay = dev_read_u32_default(dev, "regulator-ramp-delay", in regulator_pre_probe()
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| /third_party/uboot/u-boot-2020.01/drivers/ram/stm32mp1/ |
| D | stm32mp1_ram.c | 89 config.info.speed = dev_read_u32_default(dev, "st,mem-speed", 0); in stm32mp1_ddr_setup()
90 config.info.size = dev_read_u32_default(dev, "st,mem-size", 0); in stm32mp1_ddr_setup()
166 priv->info.size = dev_read_u32_default(dev, "st,mem-size", 0); in stm32mp1_ddr_probe()
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| /third_party/uboot/u-boot-2020.01/drivers/mmc/ |
| D | rockchip_dw_mmc.c | 59 host->buswidth = dev_read_u32_default(dev, "bus-width", 4); in rockchip_dwmmc_ofdata_to_platdata()
69 priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); in rockchip_dwmmc_ofdata_to_platdata()
85 int val = dev_read_u32_default(dev, "max-frequency", -EINVAL); in rockchip_dwmmc_ofdata_to_platdata()
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| D | rockchip_sdhci.c | 50 max_frequency = dev_read_u32_default(dev, "max-frequency", 0); in arasan_sdhci_probe()
90 host->bus_width = dev_read_u32_default(dev, "bus-width", 4); in arasan_sdhci_ofdata_to_platdata()
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| D | zynq_sdhci.c | 277 priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1); in arasan_sdhci_ofdata_to_platdata()
278 priv->bank = dev_read_u32_default(dev, "xlnx,mio_bank", -1); in arasan_sdhci_ofdata_to_platdata()
281 plat->f_max = dev_read_u32_default(dev, "max-frequency", in arasan_sdhci_ofdata_to_platdata()
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| /third_party/uboot/u-boot-2020.01/drivers/spi/ |
| D | spi-uclass.c | 166 spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0); in spi_post_probe()
423 plat->cs = dev_read_u32_default(dev, "reg", -1); in spi_slave_ofdata_to_platdata()
424 plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency", in spi_slave_ofdata_to_platdata()
438 value = dev_read_u32_default(dev, "spi-tx-bus-width", 1); in spi_slave_ofdata_to_platdata()
453 value = dev_read_u32_default(dev, "spi-rx-bus-width", 1); in spi_slave_ofdata_to_platdata()
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| D | cadence_qspi.c | 304 plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128); in cadence_spi_ofdata_to_platdata()
305 plat->fifo_width = dev_read_u32_default(bus, "cdns,fifo-width", 4); in cadence_spi_ofdata_to_platdata()
306 plat->trigger_address = dev_read_u32_default(bus, in cadence_spi_ofdata_to_platdata()
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| D | rk_spi.c | 210 dev_read_u32_default(bus, "spi-max-frequency", 50000000); in rockchip_spi_ofdata_to_platdata()
212 dev_read_u32_default(bus, "spi-deactivate-delay", 0); in rockchip_spi_ofdata_to_platdata()
214 dev_read_u32_default(bus, "spi-activate-delay", 0); in rockchip_spi_ofdata_to_platdata()
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| /third_party/uboot/u-boot-2020.01/drivers/serial/ |
| D | serial_omap.c | 114 plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0); in omap_serial_ofdata_to_platdata()
128 plat->clock = dev_read_u32_default(dev, "clock-frequency", in omap_serial_ofdata_to_platdata()
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| D | ns16550.c | 453 plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0); in ns16550_serial_ofdata_to_platdata()
454 plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0); in ns16550_serial_ofdata_to_platdata()
455 plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1); in ns16550_serial_ofdata_to_platdata()
468 plat->clock = dev_read_u32_default(dev, "clock-frequency", in ns16550_serial_ofdata_to_platdata()
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| /third_party/uboot/u-boot-2020.01/drivers/remoteproc/ |
| D | ti_k3_arm64_rproc.c | 133 tsp->proc_id = dev_read_u32_default(dev, "ti,sci-proc-id", INVALID_ID); in ti_sci_proc_of_to_priv()
138 tsp->host_id = dev_read_u32_default(dev, "ti,sci-host-id", INVALID_ID); in ti_sci_proc_of_to_priv()
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| D | ti_k3_r5f_rproc.c | 624 tsp->dev_id = dev_read_u32_default(dev, "ti,sci-dev-id", in ti_sci_proc_of_to_priv()
640 core->atcm_enable = dev_read_u32_default(core->dev, "atcm-enable", 0); in k3_r5f_of_to_priv()
641 core->btcm_enable = dev_read_u32_default(core->dev, "btcm-enable", 1); in k3_r5f_of_to_priv()
642 core->loczrama = dev_read_u32_default(core->dev, "loczrama", 1); in k3_r5f_of_to_priv()
790 cluster->mode = dev_read_u32_default(dev, "lockstep-mode", in k3_r5f_cluster_probe()
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| /third_party/uboot/u-boot-2020.01/drivers/led/ |
| D | led_bcm6358.c | 128 clk_div = dev_read_u32_default(dev, "brcm,clk-div", in bcm6358_led_probe()
157 pin = dev_read_u32_default(dev, "reg", LEDS_MAX); in bcm6358_led_probe()
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| /third_party/uboot/u-boot-2020.01/drivers/input/ |
| D | cros_ec_keyb.c | 167 config->key_rows = dev_read_u32_default(dev, "keypad,num-rows", 0); in cros_ec_keyb_decode_fdt()
168 config->key_cols = dev_read_u32_default(dev, "keypad,num-columns", 0); in cros_ec_keyb_decode_fdt()
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| /third_party/uboot/u-boot-2020.01/include/ |
| D | wdt.h | 134 timeout = dev_read_u32_default(gd->watchdog_dev, "timeout-sec", in initr_watchdog()
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| /third_party/uboot/u-boot-2020.01/drivers/net/ |
| D | gmac_rockchip.c | 65 pdata->tx_delay = dev_read_u32_default(dev, "tx_delay", -ENOENT); in gmac_rockchip_ofdata_to_platdata()
66 pdata->rx_delay = dev_read_u32_default(dev, "rx_delay", -ENOENT); in gmac_rockchip_ofdata_to_platdata()
70 pdata->tx_delay = dev_read_u32_default(dev, "tx-delay", 0x30); in gmac_rockchip_ofdata_to_platdata()
72 pdata->rx_delay = dev_read_u32_default(dev, "rx-delay", 0x10); in gmac_rockchip_ofdata_to_platdata()
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| /third_party/uboot/u-boot-2020.01/drivers/bootcount/ |
| D | rtc.c | 67 priv->offset = dev_read_u32_default(dev, "offset", 0); in bootcount_rtc_probe()
|