Home
last modified time | relevance | path

Searched refs:dimm (Results 1 – 14 of 14) sorted by relevance

/third_party/uboot/u-boot-2020.01/doc/device-tree-bindings/misc/
Dintel,baytrail-fsp.txt70 - fsp,dimm-0-enable
71 - fsp,dimm-1-enable
77 - fsp,dimm-width
78 - fsp,dimm-density
79 - fsp,dimm-bus-width
80 - fsp,dimm-sides
81 - fsp,dimm-tcl
82 - fsp,dimm-trpt-rcd
83 - fsp,dimm-twr
84 - fsp,dimm-twtr
[all …]
/third_party/uboot/u-boot-2020.01/arch/x86/dts/
Dconga-qeval20-qa3-e3845.dts283 fsp,dimm-0-enable;
284 fsp,dimm-1-enable;
285 fsp,dimm-width = <DIMM_WIDTH_X16>;
286 fsp,dimm-density = <DIMM_DENSITY_4GBIT>;
287 fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>;
288 fsp,dimm-sides = <DIMM_SIDES_1RANKS>;
291 fsp,dimm-tcl = <8>;
292 fsp,dimm-trpt-rcd = <8>;
293 fsp,dimm-twr = <8>;
294 fsp,dimm-twtr = <4>;
[all …]
Dminnowmax.dts303 fsp,dimm-0-enable;
304 fsp,dimm-width = <DIMM_WIDTH_X16>;
305 fsp,dimm-density = <DIMM_DENSITY_4GBIT>;
306 fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>;
307 fsp,dimm-sides = <DIMM_SIDES_1RANKS>;
308 fsp,dimm-tcl = <0xb>;
309 fsp,dimm-trpt-rcd = <0xb>;
310 fsp,dimm-twr = <0xc>;
311 fsp,dimm-twtr = <6>;
312 fsp,dimm-trrd = <6>;
[all …]
Ddfi-bt700.dtsi302 fsp,dimm-0-enable;
303 fsp,dimm-width = <DIMM_WIDTH_X16>;
304 fsp,dimm-density = <DIMM_DENSITY_8GBIT>;
305 fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>;
306 fsp,dimm-sides = <DIMM_SIDES_1RANKS>;
309 fsp,dimm-tcl = <8>;
310 fsp,dimm-trpt-rcd = <8>;
311 fsp,dimm-twr = <8>;
312 fsp,dimm-twtr = <4>;
313 fsp,dimm-trrd = <6>;
[all …]
/third_party/uboot/u-boot-2020.01/drivers/ddr/marvell/axp/
Dddr3_spd.c183 u32 dimm);
506 int ddr3_spd_sum_init(MV_DIMM_INFO *info, MV_DIMM_INFO *sum_info, u32 dimm) in ddr3_spd_sum_init() argument
508 if (dimm == 0) { in ddr3_spd_sum_init()
585 __maybe_unused u32 dimm_cnt, cs_count, dimm; local
625 for (dimm = 0; dimm < dimm_num; dimm++) {
626 status = ddr3_spd_init(&dimm_info[dimm], dimm_addr[dimm],
630 status = ddr3_spd_sum_init(&dimm_info[dimm], &sum_info, dimm);
643 for (dimm = 0; dimm < dimm_num; dimm++)
644 cs_num += dimm_info[dimm].num_of_module_ranks;
658 dimm = 0;
[all …]
/third_party/uboot/u-boot-2020.01/drivers/ddr/fsl/
Doptions.c1328 struct dimm_params_s *dimm; in check_interleaving_options() local
1344 dimm = &pinfo->dimm_params[i][0]; in check_interleaving_options()
1347 } else if (((check_rank_density != dimm->rank_density) || in check_interleaving_options()
1348 (check_n_ranks != dimm->n_ranks) || in check_interleaving_options()
1349 (check_n_row_addr != dimm->n_row_addr) || in check_interleaving_options()
1350 (check_n_col_addr != dimm->n_col_addr) || in check_interleaving_options()
Dinteractive.c1812 #define DATA_OPTIONS(name, step, dimm) {#name, step, dimm} argument
/third_party/uboot/u-boot-2020.01/arch/x86/include/asm/
Dglobal_data.h41 struct dimm_info dimm[8]; member
/third_party/uboot/u-boot-2020.01/arch/arm/dts/
Dzynqmp-g-a2197-00-revA.dts300 i2c@6 { /* ddr dimm */
/third_party/mingw-w64/mingw-w64-headers/
DMakefile.am89 include/dimm.idl \
DMakefile.in391 @HAVE_WIDL_TRUE@ include/dimm.idl \
/third_party/uboot/u-boot-2020.01/doc/
DREADME.fsl-ddr295 type command "copy" with arguments to copy controller/dimm settings
/third_party/mingw-w64/mingw-w64-doc/headers-ref/
Dheader_doc.txt51 dhtmldid.h dhtmled.h dhtmliid.h digitalv.h dimm.h dir.h direct.h dirent.h diskguid.h dispatch.h dis…
/third_party/mingw-w64/mingw-w64-headers/include/
Dmshtml.idl12 import "dimm.idl";