| /third_party/uboot/u-boot-2020.01/doc/device-tree-bindings/video/ |
| D | intel-gma.txt | 9 - compatible : "intel,gma";
12 - intel,dp-hotplug : values for digital port hotplug, one cell per value for
14 - intel,panel-port-select : output port to use: 0=LVDS 1=DP_B 2=DP_C 3=DP_D
15 - intel,panel-power-cycle-delay : T4 time sequence (6 = 500ms)
18 - intel,panel-power-up-delay : T1+T2 time sequence
19 - intel,panel-power-down-delay : T3 time sequence
20 - intel,panel-power-backlight-on-delay : T5 time sequence
21 - intel,panel-power-backlight-off-delay : Tx time sequence
23 - intel,cpu-backlight : Value for CPU Backlight PWM
24 - intel,pch-backlight : Value for PCH Backlight PWM
[all …]
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| /third_party/uboot/u-boot-2020.01/arch/x86/dts/ |
| D | cougarcanyon2.dts | 8 #include <dt-bindings/interrupt-router/intel-irq.h>
19 compatible = "intel,cougarcanyon2", "intel,chiefriver";
39 compatible = "intel,core-gen3";
41 intel,apic-id = <0>;
46 compatible = "intel,core-gen3";
48 intel,apic-id = <1>;
53 compatible = "intel,core-gen3";
55 intel,apic-id = <2>;
60 compatible = "intel,core-gen3";
62 intel,apic-id = <3>;
[all …]
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| D | chromebook_samus.dts | 20 compatible = "google,samus", "intel,broadwell";
39 compatible = "intel,core-i3-gen5";
41 intel,apic-id = <0>;
42 intel,slow-ramp = <3>;
47 compatible = "intel,core-i3-gen5";
49 intel,apic-id = <1>;
54 compatible = "intel,core-i3-gen5";
56 intel,apic-id = <2>;
61 compatible = "intel,core-i3-gen5";
63 intel,apic-id = <3>;
[all …]
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| D | bayleybay.dts | 10 #include <dt-bindings/interrupt-router/intel-irq.h>
21 compatible = "intel,bayleybay", "intel,baytrail";
42 compatible = "intel,baytrail-cpu";
44 intel,apic-id = <0>;
49 compatible = "intel,baytrail-cpu";
51 intel,apic-id = <2>;
56 compatible = "intel,baytrail-cpu";
58 intel,apic-id = <4>;
63 compatible = "intel,baytrail-cpu";
65 intel,apic-id = <6>;
[all …]
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| D | baytrail_som-db5800-som-6867.dts | 11 #include <dt-bindings/interrupt-router/intel-irq.h>
21 compatible = "advantech,som-db5800-som-6867", "intel,baytrail";
33 compatible = "intel,x86-pinctrl";
85 compatible = "intel,baytrail-cpu";
87 intel,apic-id = <0>;
92 compatible = "intel,baytrail-cpu";
94 intel,apic-id = <2>;
99 compatible = "intel,baytrail-cpu";
101 intel,apic-id = <4>;
106 compatible = "intel,baytrail-cpu";
[all …]
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| D | chromebook_link.dts | 16 compatible = "google,link", "intel,celeron-ivybridge";
34 compatible = "intel,core-gen3";
36 intel,apic-id = <0>;
41 compatible = "intel,core-gen3";
43 intel,apic-id = <1>;
48 compatible = "intel,core-gen3";
50 intel,apic-id = <2>;
55 compatible = "intel,core-gen3";
57 intel,apic-id = <3>;
67 intel,duplicate-por;
[all …]
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| D | edison.dts | 9 #include <dt-bindings/interrupt-router/intel-irq.h>
17 compatible = "intel,edison";
37 intel,apic-id = <0>;
44 intel,apic-id = <2>;
59 compatible = "intel,mid-uart";
67 compatible = "intel,mid-uart";
75 compatible = "intel,mid-uart";
83 compatible = "intel,sdhci-tangier";
88 compatible = "intel,sdhci-tangier";
93 compatible = "intel,pmu-mid";
[all …]
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| D | conga-qeval20-qa3-e3845.dts | 11 #include <dt-bindings/interrupt-router/intel-irq.h>
21 compatible = "congatec,qeval20-qa3-e3845", "intel,baytrail";
33 compatible = "intel,x86-pinctrl";
73 compatible = "intel,baytrail-cpu";
75 intel,apic-id = <0>;
80 compatible = "intel,baytrail-cpu";
82 intel,apic-id = <2>;
87 compatible = "intel,baytrail-cpu";
89 intel,apic-id = <4>;
94 compatible = "intel,baytrail-cpu";
[all …]
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| D | dfi-bt700.dtsi | 9 #include <dt-bindings/interrupt-router/intel-irq.h>
22 compatible = "intel,x86-pinctrl";
71 compatible = "intel,baytrail-cpu";
73 intel,apic-id = <0>;
78 compatible = "intel,baytrail-cpu";
80 intel,apic-id = <2>;
85 compatible = "intel,baytrail-cpu";
87 intel,apic-id = <4>;
92 compatible = "intel,baytrail-cpu";
94 intel,apic-id = <6>;
[all …]
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| D | galileo.dts | 9 #include <dt-bindings/interrupt-router/intel-irq.h>
18 compatible = "intel,galileo", "intel,quark";
40 intel,apic-id = <0>;
49 compatible = "intel,quark-mrc";
96 compatible = "intel,pch7";
101 compatible = "intel,irq-router";
102 intel,pirq-config = "pci";
103 intel,actl-addr = <0x58>;
104 intel,pirq-link = <0x60 8>;
105 intel,pirq-mask = <0xdef8>;
[all …]
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| D | cherryhill.dts | 9 #include <dt-bindings/interrupt-router/intel-irq.h>
19 compatible = "intel,cherryhill", "intel,braswell";
42 intel,apic-id = <0>;
49 intel,apic-id = <2>;
56 intel,apic-id = <4>;
63 intel,apic-id = <6>;
78 compatible = "intel,pch9";
81 compatible = "intel,irq-router";
82 intel,pirq-config = "ibase";
83 intel,ibase-offset = <0x50>;
[all …]
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| D | minnowmax.dts | 10 #include <dt-bindings/interrupt-router/intel-irq.h>
20 compatible = "intel,minnowmax", "intel,baytrail";
32 compatible = "intel,x86-pinctrl";
99 compatible = "intel,baytrail-cpu";
101 intel,apic-id = <0>;
106 compatible = "intel,baytrail-cpu";
108 intel,apic-id = <4>;
114 compatible = "intel,pci-baytrail", "pci-x86";
124 compatible = "pci8086,0f1c", "intel,pch9";
129 compatible = "intel,irq-router";
[all …]
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| D | qemu-x86_q35.dts | 8 #include <dt-bindings/interrupt-router/intel-irq.h>
50 intel,apic-id = <0>;
69 compatible = "intel,pch9";
73 compatible = "intel,irq-router";
75 intel,pirq-config = "pci";
76 intel,actl-8bit;
77 intel,actl-addr = <0x44>;
78 intel,pirq-link = <0x60 8>;
79 intel,pirq-mask = <0x0e40>;
80 intel,pirq-routing = <
|
| D | qemu-x86_i440fx.dts | 8 #include <dt-bindings/interrupt-router/intel-irq.h>
39 intel,apic-id = <0>;
58 compatible = "intel,pch7";
62 compatible = "intel,irq-router";
64 intel,pirq-config = "pci";
65 intel,pirq-link = <0x60 4>;
66 intel,pirq-mask = <0x0e40>;
67 intel,pirq-routing = <
|
| /third_party/boost/tools/build/src/tools/ |
| D | intel-darwin.jam | 7 import intel ;
17 feature.extend-subfeature toolset intel : platform : darwin ;
19 toolset.inherit-generators intel-darwin
20 <toolset>intel <toolset-intel:platform>darwin
27 generators.override intel-darwin.prebuilt : builtin.lib-generator ;
28 generators.override intel-darwin.prebuilt : builtin.prebuilt ;
29 generators.override intel-darwin.searched-lib-generator : searched-lib-generator ;
31 toolset.inherit-rules intel-darwin : gcc ;
32 toolset.inherit-flags intel-darwin : gcc
46 # Initializes the intel-darwin toolset
[all …]
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| D | intel-vxworks.jam | 6 import intel ;
16 feature.extend-subfeature toolset intel : platform : vxworks ;
18 toolset.inherit-generators intel-vxworks
19 <toolset>intel <toolset-intel:platform>vxworks
26 generators.override intel-vxworks.prebuilt : builtin.lib-generator ;
27 generators.override intel-vxworks.prebuilt : builtin.prebuilt ;
28 generators.override intel-vxworks.searched-lib-generator : searched-lib-generator ;
30 toolset.inherit-rules intel-vxworks : gcc ;
31 toolset.inherit-flags intel-vxworks : gcc
45 # Initializes the intel-vxworks toolset
[all …]
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| D | intel-linux.jam | 12 import intel ;
20 feature.extend-subfeature toolset intel : platform : linux ;
22 toolset.inherit-generators intel-linux
23 <toolset>intel <toolset-intel:platform>linux : gcc : gcc.mingw.link gcc.mingw.link.dll ;
24 generators.override intel-linux.prebuilt : builtin.lib-generator ;
25 generators.override intel-linux.prebuilt : builtin.prebuilt ;
26 generators.override intel-linux.searched-lib-generator : searched-lib-generator ;
29 generators.override intel-linux.compile.c.pch : pch.default-c-pch-generator ;
30 generators.override intel-linux.compile.c++.pch : pch.default-cpp-pch-generator ;
32 type.set-generated-target-suffix PCH : <toolset>intel <toolset-intel:platform>linux : pchi ;
[all …]
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| D | intel-win.jam | 11 import intel ;
20 feature.extend-subfeature toolset intel : platform : win ;
22 toolset.inherit-generators intel-win <toolset>intel <toolset-intel:platform>win : msvc ;
23 toolset.inherit-flags intel-win : msvc : : YLOPTION ;
24 toolset.inherit-rules intel-win : msvc ;
27 generators.override intel-win.compile.c.pch : pch.default-c-pch-generator ;
28 generators.override intel-win.compile.c++.pch : pch.default-cpp-pch-generator ;
29 generators.override intel-win.compile.rc : rc.compile.resource ;
30 generators.override intel-win.compile.mc : mc.compile ;
32 toolset.flags intel-win.compile PCH_SOURCE <pch>on : <pch-source> ;
[all …]
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| /third_party/boost/tools/build/src/engine/ |
| D | build.sh | 83 … intel-darwin) ( ${CXX:=icc} -xc++ check_cxx11.cpp && rm -f a.out ) 1>/dev/null 2>/dev/null ;;
84 … intel-linux) ( ${CXX:=icc} -xc++ check_cxx11.cpp && rm -f a.out ) 1>/dev/null 2>/dev/null ;;
127 elif test_path icc && test_cxx11 intel-linux ; then B2_TOOLSET=intel-linux
128 elif test -r /opt/intel/cc/9.0/bin/iccvars.sh && test_cxx11 intel-linux ; then
129 B2_TOOLSET=intel-linux
130 B2_TOOLSET_ROOT=/opt/intel/cc/9.0
131 elif test -r /opt/intel_cc_80/bin/iccvars.sh && test_cxx11 intel-linux ; then
132 B2_TOOLSET=intel-linux
134 elif test -r /opt/intel/compiler70/ia32/bin/iccvars.sh && test_cxx11 intel-linux ; then
135 B2_TOOLSET=intel-linux
[all …]
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| /third_party/boost/libs/numeric/odeint/performance/ |
| D | Makefile | 22 bin/intel:
23 mkdir -p bin/intel
34 bin/intel/odeint_rk4_array: odeint_rk4_array.cpp bin/intel
35 icpc ${ICCFLAGS} ${INCLUDES} -o bin/intel/odeint_rk4_array odeint_rk4_array.cpp
37 bin/intel/c_lorenz: c_lorenz.c bin/intel
38 icc -std=c99 -Ofast -xHost -ansi-alias -o bin/intel/c_lorenz c_lorenz.c
43 all: bin/gcc/odeint_rk4_array bin/intel/odeint_rk4_array bin/gcc/c_lorenz bin/intel/c_lorenz bin/gf…
|
| /third_party/uboot/u-boot-2020.01/doc/device-tree-bindings/ata/ |
| D | intel-sata.txt | 8 - compatible = "intel,pantherpoint-ahci"
9 - intel,sata-mode : string, one of:
13 - intel,sata-port-map : Which SATA ports are enabled, bit 0=enable first port,
15 - intel,sata-port0-gen3-tx : Value for the IOBP_SP0G3IR register
16 - intel,sata-port1-gen3-tx : Value for the IOBP_SP1G3IR register
22 compatible = "intel,pantherpoint-ahci";
23 intel,sata-mode = "ahci";
24 intel,sata-port-map = <1>;
25 intel,sata-port0-gen3-tx = <0x00880a7f>;
|
| /third_party/uboot/u-boot-2020.01/doc/device-tree-bindings/misc/ |
| D | intel,irq-router.txt | 10 - compatible = "intel,irq-router"
11 - intel,pirq-config : Specifies the IRQ routing register programming mechanism.
15 - intel,ibase-offset : IBASE register offset in the interrupt router's PCI
16 configuration space, required only if intel,pirq-config = "ibase".
17 - intel,actl-8bit : If ACTL (ACPI control) register width is 8-bit, this must
20 - intel,actl-addr : ACTL (ACPI control) register offset. ACTL can be either
22 - intel,pirq-link : Specifies the PIRQ link information with two cells. The
25 - intel,pirq-regmap : Specifies PIRQ routing register offset of all PIRQ links,
30 link, as specified by the first cell of intel,pirq-link.
31 - intel,pirq-mask : Specifies the IRQ mask representing the 16 IRQs in the
[all …]
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| D | intel-lpc.txt | 8 - compatible = "intel,lpc"
9 - intel,alt-gp-smi-enable : Enable SMI sources. This cell is written to the
11 - intel,gen-dec : Specifies the values for the gen-dec registers. Up to four
15 - intel,gpi-routing : Specifies the GPI routing. There are 16 cells, valid
20 - intel,pirq-routing : Speciffies the routing IRQ number for each of PIRQA-H,
46 compatible = "intel,lpc";
49 intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
51 intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
60 intel,gpi-routing = <0 0 0 0 0 0 0 2
63 intel,alt-gp-smi-enable = <0x0100>;
|
| /third_party/ltp/testcases/open_posix_testsuite/ |
| D | AUTHORS | 1 geoffrey.r.gustafson REMOVE-THIS AT intel DOT com
2 inaky.perez-gonzalez REMOVE-THIS AT intel DOT com
3 julie.n.fleischer REMOVE-THIS AT intel DOT com
4 majid.awad REMOVE-THIS AT intel DOT com
5 rolla.n.selbak REMOVE-THIS AT intel DOT com
6 rusty.lynch REMOVE-THIS AT intel DOT com
7 salwan.searty REMOVE-THIS AT intel DOT com
|
| D | ChangeLog | 21 07-05-2004 adam.li@intel.com
25 07-01-2004 adam.li@intel.com
30 06-29-2004 adam.li@intel.com
34 06-28-2004 adam.li@intel.com
37 06-22-2004 adam.li@intel.com
41 06-15-2004 adam.li@intel.com
46 06-11-2004 adam.li@intel.com
48 06-07-2004 adam.li@intel.com
54 06-04-2004 adam.li@intel.com
58 06-02-2004 adam.li@intel.com
[all …]
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