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Searched refs:mainqspiclk (Results 1 – 2 of 2) sorted by relevance

/third_party/uboot/u-boot-2020.01/arch/arm/mach-socfpga/include/mach/
Dclock_manager_gen5.h17 u32 mainqspiclk; member
54 u32 mainqspiclk; member
/third_party/uboot/u-boot-2020.01/arch/arm/mach-socfpga/
Dclock_manager_gen5.c170 writel(cfg->mainqspiclk, &clock_manager_base->main_pll.mainqspiclk); in cm_basic_init()
483 reg = readl(&clock_manager_base->main_pll.mainqspiclk); in cm_get_qspi_controller_clk_hz()