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Searched refs:pcw_reg (Results 1 – 6 of 6) sorted by relevance

/third_party/uboot/u-boot-2020.01/drivers/clk/mediatek/
Dclk-mtk.c124 if (pll->pd_reg != pll->pcw_reg) { in mtk_pll_set_rate_regs()
126 val = readl(priv->base + pll->pcw_reg); in mtk_pll_set_rate_regs()
133 writel(val, priv->base + pll->pcw_reg); in mtk_pll_set_rate_regs()
136 writel(val, priv->base + pll->pcw_reg); in mtk_pll_set_rate_regs()
195 pcw = readl(priv->base + pll->pcw_reg) >> pll->pcw_shift; in mtk_apmixedsys_get_rate()
Dclk-mtk.h40 u32 pcw_reg; member
Dclk-mt7629.c43 .pcw_reg = _pcw_reg, \
Dclk-mt8516.c32 .pcw_reg = _pcw_reg, \
Dclk-mt7623.c39 .pcw_reg = _pcw_reg, \
Dclk-mt8518.c32 .pcw_reg = _pcw_reg, \