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Searched refs:rtt_wr (Results 1 – 25 of 39) sorted by relevance

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/third_party/uboot/u-boot-2020.01/drivers/ddr/marvell/a38x/
Dmv_ddr_topology.c320 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
323 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
325 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
327 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
330 return rtt_wr; in mv_ddr_rtt_wr_get()
Dddr_topology_def.h73 enum mv_ddr_rtt_wr_evalue rtt_wr[MAX_CS_NUM]; member
/third_party/uboot/u-boot-2020.01/board/udoo/
Dudoo_spl.c188 .rtt_wr = 2,
217 mem_qdl.rtt_wr = 1; in spl_dram_init()
224 mem_qdl.rtt_wr = 2; in spl_dram_init()
/third_party/uboot/u-boot-2020.01/board/engicam/common/
Dspl.c242 .rtt_wr = 2,
274 .rtt_wr = 1,
291 .rtt_wr = 1,
338 .rtt_wr = 2,
/third_party/uboot/u-boot-2020.01/drivers/ddr/fsl/
Dctrl_regs.c984 unsigned int rtt_wr = 0; /* Rtt_WR - dynamic ODT off */ in set_ddr_sdram_mode_2() local
992 rtt_wr = popts->rtt_wr_override_value; in set_ddr_sdram_mode_2()
994 rtt_wr = popts->cs_local_opts[0].odt_rtt_wr; in set_ddr_sdram_mode_2()
1001 | ((rtt_wr & 0x3) << 9) in set_ddr_sdram_mode_2()
1025 rtt_wr = popts->rtt_wr_override_value; in set_ddr_sdram_mode_2()
1027 rtt_wr = popts->cs_local_opts[i].odt_rtt_wr; in set_ddr_sdram_mode_2()
1030 esdmode2 |= (rtt_wr & 0x3) << 9; in set_ddr_sdram_mode_2()
1071 unsigned int rtt_wr = 0; /* Rtt_WR - dynamic ODT off */ in set_ddr_sdram_mode_2() local
1078 rtt_wr = popts->rtt_wr_override_value; in set_ddr_sdram_mode_2()
1080 rtt_wr = popts->cs_local_opts[0].odt_rtt_wr; in set_ddr_sdram_mode_2()
[all …]
/third_party/uboot/u-boot-2020.01/board/compulab/cm_fx6/
Dspl.c101 .rtt_wr = 0,
168 .rtt_wr = 0,
/third_party/uboot/u-boot-2020.01/board/wandboard/
Dspl.c230 .rtt_wr = 0,
273 .rtt_wr = 0,
292 .rtt_wr = 0,
/third_party/uboot/u-boot-2020.01/board/bachmann/ot1200/
Dot1200_spl.c77 .rtt_wr = 1, /* DDR3_RTT_60_OHM - RTT_Wr = RZQ/4 */
/third_party/uboot/u-boot-2020.01/board/ccv/xpress/
Dspl.c53 .rtt_wr = 2,
/third_party/uboot/u-boot-2020.01/board/liebherr/mccmon6/
Dspl.c182 .rtt_wr = 0,
223 .rtt_wr = 0,
240 .rtt_wr = 0,
/third_party/uboot/u-boot-2020.01/board/barco/platinum/
Dspl_picon.c125 .rtt_wr = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Wr = RZQ/4 */ in spl_dram_init()
Dspl_titanium.c128 .rtt_wr = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Wr = RZQ/4 */ in spl_dram_init()
/third_party/uboot/u-boot-2020.01/board/sks-kinkel/sksimx6/
Dsksimx6.c329 .rtt_wr = 1,
358 mem_qdl.rtt_wr = 1; in spl_dram_init()
/third_party/uboot/u-boot-2020.01/board/bticino/mamoj/
Dspl.c121 .rtt_wr = 1,
/third_party/uboot/u-boot-2020.01/arch/arm/mach-imx/mx6/
Dlitesom.c121 .rtt_wr = 2,
Dopos6ul.c123 .rtt_wr = 2,
/third_party/uboot/u-boot-2020.01/board/technexion/pico-imx6ul/
Dspl.c71 .rtt_wr = 0,
/third_party/uboot/u-boot-2020.01/board/phytec/pcl063/
Dspl.c58 .rtt_wr = 1,
/third_party/uboot/u-boot-2020.01/board/freescale/mx6ul_14x14_evk/
Dmx6ul_14x14_evk.c588 .rtt_wr = 0, /* LPDDR2 does not need rtt_wr rtt_nom */
624 .rtt_wr = 2,
/third_party/uboot/u-boot-2020.01/board/k+p/kp_imx6q_tpc/
Dkp_imx6q_tpc_spl.c164 .rtt_wr = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Wr = RZQ/4 */ in spl_dram_init()
/third_party/uboot/u-boot-2020.01/board/variscite/dart_6ul/
Dspl.c67 .rtt_wr = 2,
/third_party/uboot/u-boot-2020.01/board/dhelectronics/dh_imx6/
Ddh_imx6_spl.c244 .rtt_wr = 1, /* DDR3_RTT_60_OHM, RTT_Wr = RZQ/4 */
263 .rtt_wr = 1, /* DDR3_RTT_60_OHM, RTT_Wr = RZQ/4 */
/third_party/uboot/u-boot-2020.01/board/technexion/pico-imx6/
Dspl.c189 .rtt_wr = 0,
/third_party/uboot/u-boot-2020.01/board/liebherr/display5/
Dspl.c248 .rtt_wr = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Wr = RZQ/4 */ in spl_dram_init()
/third_party/uboot/u-boot-2020.01/board/freescale/mx6slevk/
Dmx6slevk.c381 .rtt_wr = 0, /* LPDDR2 does not need rtt_wr rtt_nom */ in spl_dram_init()

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