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Searched refs:tmr (Results 1 – 23 of 23) sorted by relevance

/third_party/uboot/u-boot-2020.01/arch/nds32/cpu/n1213/ag101/
Dtimer.c22 struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE; in timer_init() local
28 writel(0, &tmr->cr); in timer_init()
36 writel(TIMER_LOAD_VAL, &tmr->timer3_load); in timer_init()
37 writel(TIMER_LOAD_VAL, &tmr->timer3_counter); in timer_init()
38 writel(0, &tmr->timer3_match1); in timer_init()
39 writel(0, &tmr->timer3_match2); in timer_init()
45 &tmr->interrupt_mask); in timer_init()
47 cr = readl(&tmr->cr); in timer_init()
52 writel(cr, &tmr->cr); in timer_init()
69 struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE; in reset_timer_masked() local
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/third_party/uboot/u-boot-2020.01/arch/microblaze/cpu/
Dtimer.c17 microblaze_timer_t *tmr; variable
21 if (tmr) in get_timer()
30 if (tmr) { in __udelay()
41 tmr->control = tmr->control | TIMER_INTERRUPT; in timer_isr()
67 tmr = (microblaze_timer_t *)base; in timer_init()
83 if (tmr && preload && irq >= 0) { in timer_init()
84 tmr->loadreg = preload; in timer_init()
85 tmr->control = TIMER_INTERRUPT | TIMER_RESET; in timer_init()
86 tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\ in timer_init()
89 ret = install_interrupt_handler (irq, timer_isr, (void *)tmr); in timer_init()
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/third_party/ltp/testcases/kernel/syscalls/timerfd/
Dtimerfd01.c44 static void settime(int tfd, struct itimerspec *tmr, int tflags, in settime() argument
47 tmr->it_value = tst_timespec_from_us(tvalue); in settime()
48 tmr->it_interval = tst_timespec_from_us(tinterval); in settime()
50 SAFE_TIMERFD_SETTIME(tfd, tflags, tmr, NULL); in settime()
84 struct itimerspec tmr; in run() local
92 settime(tfd, &tmr, 0, 100 * 1000, 0); in run()
97 settime(tfd, &tmr, TFD_TIMER_ABSTIME, tnow + 100 * 1000, 0); in run()
102 settime(tfd, &tmr, TFD_TIMER_ABSTIME, tnow + 50 * 1000, 50 * 1000); in run()
104 memset(&tmr, 0, sizeof(tmr)); in run()
105 if (timerfd_gettime(tfd, &tmr)) in run()
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/third_party/boost/libs/filesystem/test/
Dpath_times.cpp46 boost::timer::auto_cpu_timer tmr; in time_ctor() local
54 boost::timer::cpu_times elapsed = tmr.elapsed(); in time_ctor()
60 boost::timer::auto_cpu_timer tmr; in time_loop() local
67 boost::timer::cpu_times elapsed = tmr.elapsed(); in time_loop()
/third_party/uboot/u-boot-2020.01/arch/m68k/lib/
Dtime.c48 timerp->tmr = DTIM_DTMR_RST_RST; in __udelay()
51 timerp->tmr = in __udelay()
89 timerp->tmr = DTIM_DTMR_RST_RST; in timer_init()
100 timerp->tmr = CONFIG_SYS_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 | in timer_init()
/third_party/ltp/testcases/open_posix_testsuite/conformance/interfaces/fork/
D18-1.c67 timer_t tmr; in main() local
84 ret = timer_create(CLOCK_REALTIME, &se, &tmr); in main()
99 ret = timer_settime(tmr, 0, &it, NULL); in main()
/third_party/uboot/u-boot-2020.01/arch/arm/mach-orion5x/
Dtimer.c26 struct orion5x_tmr_val tmr[2]; member
38 #define CNTMR_RELOAD_REG(tmrnum) (&orion5x_tmr_regs->tmr[tmrnum].reload)
39 #define CNTMR_VAL_REG(tmrnum) (&orion5x_tmr_regs->tmr[tmrnum].val)
/third_party/uboot/u-boot-2020.01/arch/m68k/include/asm/
Dtimer.h21 u16 tmr; /* 0x00 Mode register */ member
33 u16 tmr; /* 0x00 Mode register */
/third_party/uboot/u-boot-2020.01/drivers/usb/cdns3/
Ddrd.h29 __le32 tmr; member
50 __le32 tmr; member
/third_party/lwip/src/core/
Dtcp.c1320 if ((u32_t)(tcp_ticks - pcb->tmr) > in tcp_slowtmr()
1332 if ((u32_t)(tcp_ticks - pcb->tmr) > in tcp_slowtmr()
1340 } else if ((u32_t)(tcp_ticks - pcb->tmr) > in tcp_slowtmr()
1355 (tcp_ticks - pcb->tmr >= (u32_t)pcb->rto * TCP_OOSEQ_TIMEOUT)) { in tcp_slowtmr()
1363 if ((u32_t)(tcp_ticks - pcb->tmr) > in tcp_slowtmr()
1372 if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { in tcp_slowtmr()
1445 if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { in tcp_slowtmr()
1734 ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) { in tcp_kill_prio()
1735 inactivity = tcp_ticks - pcb->tmr; in tcp_kill_prio()
1765 if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { in tcp_kill_state()
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Ddns.c231 u8_t tmr; member
1126 entry->tmr = 1; in dns_check_entry()
1137 if (--entry->tmr == 0) { in dns_check_entry()
1146 entry->tmr = 1; in dns_check_entry()
1158 entry->tmr = entry->retries; in dns_check_entry()
1345 entry->tmr = 1; in dns_recv()
Dtcp_out.c2091 tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent)); in tcp_keepalive()
2136 tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent)); in tcp_zero_window_probe()
Dtcp_in.c765 pcb->tmr = tcp_ticks;
845 pcb->tmr = tcp_ticks;
/third_party/boost/libs/chrono/test/
Drun_timer_test.cpp35 bool check_report( run_timer & tmr, std::stringstream & ss, in check_report() argument
39 tmr.test_report(r,u,s); in check_report()
/third_party/uboot/u-boot-2020.01/arch/arm/mach-sunxi/
Ddram_sunxi_dw.c140 writel(399, &mctl_com->tmr); in mctl_set_master_priority_a64()
167 writel(399, &mctl_com->tmr); in mctl_set_master_priority_h5()
195 writel(399, &mctl_com->tmr); in mctl_set_master_priority_r40()
Ddram_sun50i_h6.c128 writel(399, &mctl_com->tmr); in mctl_set_master_priority()
/third_party/ltp/testcases/open_posix_testsuite/Documentation/
DCOVERAGE.timers2 Area-Code: tmr
DHOWTO_Coverage51 such as "tmr" or "sig".
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-sunxi/
Ddram_sunxi_dw.h21 u32 tmr; /* 0x0c (unused on H3) */ member
Ddram_sun50i_h6.h34 u32 tmr; /* 0x00c timer register */ member
/third_party/uboot/u-boot-2020.01/doc/device-tree-bindings/clock/
Dnvidia,tegra20-car.txt33 5 tmr
/third_party/lwip/src/include/lwip/
Dtcp.h280 u32_t tmr; member
/third_party/uboot/u-boot-2020.01/
DREADME4316 …tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0…
4323 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
4326 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
4329 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
4332 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0