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1STMicroelectronics STM32 Peripheral Reset Clock Controller
2==========================================================
3
4The RCC IP is both a reset and a clock controller.
5
6RCC makes also power management (resume/supend and wakeup interrupt).
7
8Please also refer to reset.txt for common reset controller binding usage.
9
10Please also refer to clock-bindings.txt for common clock controller
11binding usage.
12
13
14Required properties:
15- compatible: "st,stm32mp1-rcc", "syscon"
16- reg: should be register base and length as documented in the datasheet
17- #clock-cells: 1, device nodes should specify the clock in their
18  "clocks" property, containing a phandle to the clock device node,
19  an index specifying the clock to use.
20- #reset-cells: Shall be 1
21- interrupts: Should contain a general interrupt line and a interrupt line
22  to the wake-up of processor (CSTOP).
23
24Example:
25	rcc: rcc@50000000 {
26		compatible = "st,stm32mp1-rcc", "syscon";
27		reg = <0x50000000 0x1000>;
28		#clock-cells = <1>;
29		#reset-cells = <1>;
30		interrupts = <GIC_SPI 5 IRQ_TYPE_NONE>,
31			     <GIC_SPI 145 IRQ_TYPE_NONE>;
32	};
33
34Specifying clocks
35=================
36
37All available clocks are defined as preprocessor macros in
38dt-bindings/clock/stm32mp1-clks.h header and can be used in device
39tree sources.
40
41Specifying softreset control of devices
42=======================================
43
44Device nodes should specify the reset channel required in their "resets"
45property, containing a phandle to the reset device node and an index specifying
46which channel to use.
47The index is the bit number within the RCC registers bank, starting from RCC
48base address.
49It is calculated as: index = register_offset / 4 * 32 + bit_offset.
50Where bit_offset is the bit offset within the register.
51
52For example on STM32MP1, for LTDC reset:
53 ltdc = APB4_RSTSETR_offset / 4 * 32 + LTDC_bit_offset
54      = 0x180 / 4 * 32 + 0 = 3072
55
56The list of valid indices for STM32MP1 is available in:
57include/dt-bindings/reset-controller/stm32mp1-resets.h
58
59This file implements defines like:
60#define LTDC_R	3072
61