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1* Renesas R-Car generation 2 USB PHY
2
3This file provides information on what the device node for the R-Car generation
42 USB PHY contains.
5
6Required properties:
7- compatible: "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.
8	      "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.
9	      "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
10	      "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
11	      "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.
12	      "renesas,rcar-gen2-usb-phy" for a generic R-Car Gen2 or
13					  RZ/G1 compatible device.
14
15	      When compatible with the generic version, nodes must list the
16	      SoC-specific version corresponding to the platform first
17	      followed by the generic version.
18
19- reg: offset and length of the register block.
20- #address-cells: number of address cells for the USB channel subnodes, must
21		  be <1>.
22- #size-cells: number of size cells for the USB channel subnodes, must be <0>.
23- clocks: clock phandle and specifier pair.
24- clock-names: string, clock input name, must be "usbhs".
25
26The USB PHY device tree node should have the subnodes corresponding to the USB
27channels. These subnodes must contain the following properties:
28- reg: the USB controller selector; see the table below for the values.
29- #phy-cells: see phy-bindings.txt in the same directory, must be <1>.
30
31The phandle's argument in the PHY specifier is the USB controller selector for
32the USB channel; see the selector meanings below:
33
34+-----------+---------------+---------------+
35|\ Selector |               |               |
36+ --------- +       0       |       1       |
37| Channel  \|               |               |
38+-----------+---------------+---------------+
39| 0         | PCI EHCI/OHCI | HS-USB        |
40| 2         | PCI EHCI/OHCI | xHCI          |
41+-----------+---------------+---------------+
42
43Example (Lager board):
44
45	usb-phy@e6590100 {
46		compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy";
47		reg = <0 0xe6590100 0 0x100>;
48		#address-cells = <1>;
49		#size-cells = <0>;
50		clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
51		clock-names = "usbhs";
52
53		usb-channel@0 {
54			reg = <0>;
55			#phy-cells = <1>;
56		};
57		usb-channel@2 {
58			reg = <2>;
59			#phy-cells = <1>;
60		};
61	};
62