1Allwinner sun4i USB PHY 2----------------------- 3 4Required properties: 5- compatible : should be one of 6 * allwinner,sun4i-a10-usb-phy 7 * allwinner,sun5i-a13-usb-phy 8 * allwinner,sun6i-a31-usb-phy 9 * allwinner,sun7i-a20-usb-phy 10 * allwinner,sun8i-a23-usb-phy 11 * allwinner,sun8i-a33-usb-phy 12 * allwinner,sun8i-a83t-usb-phy 13 * allwinner,sun8i-h3-usb-phy 14 * allwinner,sun8i-r40-usb-phy 15 * allwinner,sun8i-v3s-usb-phy 16 * allwinner,sun50i-a64-usb-phy 17- reg : a list of offset + length pairs 18- reg-names : 19 * "phy_ctrl" 20 * "pmu0" for H3, V3s and A64 21 * "pmu1" 22 * "pmu2" for sun4i, sun6i, sun7i, sun8i-a83t or sun8i-h3 23 * "pmu3" for sun8i-h3 24- #phy-cells : from the generic phy bindings, must be 1 25- clocks : phandle + clock specifier for the phy clocks 26- clock-names : 27 * "usb_phy" for sun4i, sun5i or sun7i 28 * "usb0_phy", "usb1_phy" and "usb2_phy" for sun6i 29 * "usb0_phy", "usb1_phy" for sun8i 30 * "usb0_phy", "usb1_phy", "usb2_phy" and "usb2_hsic_12M" for sun8i-a83t 31 * "usb0_phy", "usb1_phy", "usb2_phy" and "usb3_phy" for sun8i-h3 32- resets : a list of phandle + reset specifier pairs 33- reset-names : 34 * "usb0_reset" 35 * "usb1_reset" 36 * "usb2_reset" for sun4i, sun6i, sun7i, sun8i-a83t or sun8i-h3 37 * "usb3_reset" for sun8i-h3 38 39Optional properties: 40- usb0_id_det-gpios : gpio phandle for reading the otg id pin value 41- usb0_vbus_det-gpios : gpio phandle for detecting the presence of usb0 vbus 42- usb0_vbus_power-supply: power-supply phandle for usb0 vbus presence detect 43- usb0_vbus-supply : regulator phandle for controller usb0 vbus 44- usb1_vbus-supply : regulator phandle for controller usb1 vbus 45- usb2_vbus-supply : regulator phandle for controller usb2 vbus 46- usb3_vbus-supply : regulator phandle for controller usb3 vbus 47 48Example: 49 usbphy: phy@01c13400 { 50 #phy-cells = <1>; 51 compatible = "allwinner,sun4i-a10-usb-phy"; 52 /* phy base regs, phy1 pmu reg, phy2 pmu reg */ 53 reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>; 54 reg-names = "phy_ctrl", "pmu1", "pmu2"; 55 clocks = <&usb_clk 8>; 56 clock-names = "usb_phy"; 57 resets = <&usb_clk 0>, <&usb_clk 1>, <&usb_clk 2>; 58 reset-names = "usb0_reset", "usb1_reset", "usb2_reset"; 59 pinctrl-names = "default"; 60 pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; 61 usb0_id_det-gpios = <&pio 7 19 GPIO_ACTIVE_HIGH>; /* PH19 */ 62 usb0_vbus_det-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ 63 usb0_vbus-supply = <®_usb0_vbus>; 64 usb1_vbus-supply = <®_usb1_vbus>; 65 usb2_vbus-supply = <®_usb2_vbus>; 66 }; 67