1Ingenic jz47xx pin controller 2 3Please refer to pinctrl-bindings.txt in this directory for details of the 4common pinctrl bindings used by client devices, including the meaning of the 5phrase "pin configuration node". 6 7For the jz47xx SoCs, pin control is tightly bound with GPIO ports. All pins may 8be used as GPIOs, multiplexed device functions are configured within the 9GPIO port configuration registers and it is typical to refer to pins using the 10naming scheme "PxN" where x is a character identifying the GPIO port with 11which the pin is associated and N is an integer from 0 to 31 identifying the 12pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and 13PB31 is the last pin in GPIO port B. The jz4740 contains 4 GPIO ports, PA to 14PD, for a total of 128 pins. The jz4780 contains 6 GPIO ports, PA to PF, for a 15total of 192 pins. 16 17 18Required properties: 19-------------------- 20 21 - compatible: One of: 22 - "ingenic,jz4740-pinctrl" 23 - "ingenic,jz4770-pinctrl" 24 - "ingenic,jz4780-pinctrl" 25 - reg: Address range of the pinctrl registers. 26 27 28GPIO sub-nodes 29-------------- 30 31The pinctrl node can have optional sub-nodes for the Ingenic GPIO driver; 32please refer to ../gpio/ingenic,gpio.txt. 33 34 35Example: 36-------- 37 38pinctrl: pin-controller@10010000 { 39 compatible = "ingenic,jz4740-pinctrl"; 40 reg = <0x10010000 0x400>; 41}; 42