1* Renesas Pin Function Controller (GPIO and Pin Mux/Config) 2 3The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0, 4R8A73A4 and R8A7740 it also acts as a GPIO controller. 5 6 7Pin Control 8----------- 9 10Required Properties: 11 12 - compatible: should be one of the following. 13 - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller. 14 - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller. 15 - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller. 16 - "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller. 17 - "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller. 18 - "renesas,pfc-r8a77470": for R8A77470 (RZ/G1C) compatible pin-controller. 19 - "renesas,pfc-r8a7778": for R8A7778 (R-Car M1) compatible pin-controller. 20 - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller. 21 - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller. 22 - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller. 23 - "renesas,pfc-r8a7792": for R8A7792 (R-Car V2H) compatible pin-controller. 24 - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller. 25 - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller. 26 - "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller. 27 - "renesas,pfc-r8a7796": for R8A7796 (R-Car M3-W) compatible pin-controller. 28 - "renesas,pfc-r8a77965": for R8A77965 (R-Car M3-N) compatible pin-controller. 29 - "renesas,pfc-r8a77970": for R8A77970 (R-Car V3M) compatible pin-controller. 30 - "renesas,pfc-r8a77980": for R8A77980 (R-Car V3H) compatible pin-controller. 31 - "renesas,pfc-r8a77990": for R8A77990 (R-Car E3) compatible pin-controller. 32 - "renesas,pfc-r8a77995": for R8A77995 (R-Car D3) compatible pin-controller. 33 - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller. 34 35 - reg: Base address and length of each memory resource used by the pin 36 controller hardware module. 37 38Optional properties: 39 40 - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden 41 otherwise. Should be 3. 42 43 - interrupts-extended: Specify the interrupts associated with external 44 IRQ pins. This property is mandatory when the PFC handles GPIOs and 45 forbidden otherwise. When specified, it must contain one interrupt per 46 external IRQ, sorted by external IRQ number. 47 48The PFC node also acts as a container for pin configuration nodes. Please refer 49to pinctrl-bindings.txt in this directory for the definition of the term "pin 50configuration node" and for the common pinctrl bindings used by client devices. 51 52Each pin configuration node represents a desired configuration for a pin, a 53pin group, or a list of pins or pin groups. The configuration can include the 54function to select on those pin(s) and pin configuration parameters (such as 55pull-up and pull-down). 56 57Pin configuration nodes contain pin configuration properties, either directly 58or grouped in child subnodes. Both pin muxing and configuration parameters can 59be grouped in that way and referenced as a single pin configuration node by 60client devices. 61 62A configuration node or subnode must reference at least one pin (through the 63pins or pin groups properties) and contain at least a function or one 64configuration parameter. When the function is present only pin groups can be 65used to reference pins. 66 67All pin configuration nodes and subnodes names are ignored. All of those nodes 68are parsed through phandles and processed purely based on their content. 69 70Pin Configuration Node Properties: 71 72- pins : An array of strings, each string containing the name of a pin. 73- groups : An array of strings, each string containing the name of a pin 74 group. 75 76- function: A string containing the name of the function to mux to the pin 77 group(s) specified by the groups property. 78 79 Valid values for pin, group and function names can be found in the group and 80 function arrays of the PFC data file corresponding to the SoC 81 (drivers/pinctrl/sh-pfc/pfc-*.c) 82 83The pin configuration parameters use the generic pinconf bindings defined in 84pinctrl-bindings.txt in this directory. The supported parameters are 85bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. For 86pins that have a configurable I/O voltage, the power-source value should be the 87nominal I/O voltage in millivolts. 88 89 90GPIO 91---- 92 93On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node. 94 95Required Properties: 96 97 - gpio-controller: Marks the device node as a gpio controller. 98 99 - #gpio-cells: Should be 2. The first cell is the GPIO number and the second 100 cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the 101 GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. 102 103The syntax of the gpio specifier used by client nodes should be the following 104with values derived from the SoC user manual. 105 106 <[phandle of the gpio controller node] 107 [pin number within the gpio controller] 108 [flags]> 109 110On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver. 111Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt 112for documentation of the GPIO device tree bindings on those platforms. 113 114 115Examples 116-------- 117 118Example 1: SH73A0 (SH-Mobile AG5) pin controller node 119 120 pfc: pin-controller@e6050000 { 121 compatible = "renesas,pfc-sh73a0"; 122 reg = <0xe6050000 0x8000>, 123 <0xe605801c 0x1c>; 124 gpio-controller; 125 #gpio-cells = <2>; 126 interrupts-extended = 127 <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, 128 <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, 129 <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>, 130 <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>, 131 <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>, 132 <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>, 133 <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>, 134 <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>; 135 }; 136 137Example 2: A GPIO LED node that references a GPIO 138 139 #include <dt-bindings/gpio/gpio.h> 140 141 leds { 142 compatible = "gpio-leds"; 143 led1 { 144 gpios = <&pfc 20 GPIO_ACTIVE_LOW>; 145 }; 146 }; 147 148Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps 149 for the MMCIF and SCIFA4 devices 150 151 &pfc { 152 pinctrl-0 = <&scifa4_pins>; 153 pinctrl-names = "default"; 154 155 mmcif_pins: mmcif { 156 mux { 157 groups = "mmc0_data8_0", "mmc0_ctrl_0"; 158 function = "mmc0"; 159 }; 160 cfg { 161 groups = "mmc0_data8_0"; 162 pins = "PORT279"; 163 bias-pull-up; 164 }; 165 }; 166 167 scifa4_pins: scifa4 { 168 groups = "scifa4_data", "scifa4_ctrl"; 169 function = "scifa4"; 170 }; 171 }; 172 173Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device 174 175 &mmcif { 176 pinctrl-0 = <&mmcif_pins>; 177 pinctrl-names = "default"; 178 179 bus-width = <8>; 180 vmmc-supply = <®_1p8v>; 181 }; 182