1 /*
2 * Copyright 2016,2017 IBM Corporation.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9 #ifndef __XIVE_INTERNAL_H
10 #define __XIVE_INTERNAL_H
11
12 /*
13 * A "disabled" interrupt should never fire, to catch problems
14 * we set its logical number to this
15 */
16 #define XIVE_BAD_IRQ 0x7fffffff
17 #define XIVE_MAX_IRQ (XIVE_BAD_IRQ - 1)
18
19 /* Each CPU carry one of these with various per-CPU state */
20 struct xive_cpu {
21 #ifdef CONFIG_SMP
22 /* HW irq number and data of IPI */
23 u32 hw_ipi;
24 struct xive_irq_data ipi_data;
25 #endif /* CONFIG_SMP */
26
27 int chip_id;
28
29 /* Queue datas. Only one is populated */
30 #define XIVE_MAX_QUEUES 8
31 struct xive_q queue[XIVE_MAX_QUEUES];
32
33 /*
34 * Pending mask. Each bit corresponds to a priority that
35 * potentially has pending interrupts.
36 */
37 u8 pending_prio;
38
39 /* Cache of HW CPPR */
40 u8 cppr;
41 };
42
43 /* Backend ops */
44 struct xive_ops {
45 int (*populate_irq_data)(u32 hw_irq, struct xive_irq_data *data);
46 int (*configure_irq)(u32 hw_irq, u32 target, u8 prio, u32 sw_irq);
47 int (*setup_queue)(unsigned int cpu, struct xive_cpu *xc, u8 prio);
48 void (*cleanup_queue)(unsigned int cpu, struct xive_cpu *xc, u8 prio);
49 void (*setup_cpu)(unsigned int cpu, struct xive_cpu *xc);
50 void (*teardown_cpu)(unsigned int cpu, struct xive_cpu *xc);
51 bool (*match)(struct device_node *np);
52 void (*shutdown)(void);
53
54 void (*update_pending)(struct xive_cpu *xc);
55 void (*eoi)(u32 hw_irq);
56 void (*sync_source)(u32 hw_irq);
57 u64 (*esb_rw)(u32 hw_irq, u32 offset, u64 data, bool write);
58 #ifdef CONFIG_SMP
59 int (*get_ipi)(unsigned int cpu, struct xive_cpu *xc);
60 void (*put_ipi)(unsigned int cpu, struct xive_cpu *xc);
61 #endif
62 const char *name;
63 };
64
65 bool xive_core_init(const struct xive_ops *ops, void __iomem *area, u32 offset,
66 u8 max_prio);
67 __be32 *xive_queue_page_alloc(unsigned int cpu, u32 queue_shift);
68
xive_alloc_order(u32 queue_shift)69 static inline u32 xive_alloc_order(u32 queue_shift)
70 {
71 return (queue_shift > PAGE_SHIFT) ? (queue_shift - PAGE_SHIFT) : 0;
72 }
73
74 extern bool xive_cmdline_disabled;
75
76 #endif /* __XIVE_INTERNAL_H */
77