1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 */
17
18 #include "cx23885.h"
19
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/delay.h>
24 #include <media/drv-intf/cx25840.h>
25 #include <linux/firmware.h>
26 #include <misc/altera.h>
27
28 #include "tuner-xc2028.h"
29 #include "netup-eeprom.h"
30 #include "netup-init.h"
31 #include "altera-ci.h"
32 #include "xc4000.h"
33 #include "xc5000.h"
34 #include "cx23888-ir.h"
35
36 static unsigned int netup_card_rev = 4;
37 module_param(netup_card_rev, int, 0644);
38 MODULE_PARM_DESC(netup_card_rev,
39 "NetUP Dual DVB-T/C CI card revision");
40 static unsigned int enable_885_ir;
41 module_param(enable_885_ir, int, 0644);
42 MODULE_PARM_DESC(enable_885_ir,
43 "Enable integrated IR controller for supported\n"
44 "\t\t CX2388[57] boards that are wired for it:\n"
45 "\t\t\tHVR-1250 (reported safe)\n"
46 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
47 "\t\t\tTeVii S470 (reported unsafe)\n"
48 "\t\t This can cause an interrupt storm with some cards.\n"
49 "\t\t Default: 0 [Disabled]");
50
51 /* ------------------------------------------------------------------ */
52 /* board config info */
53
54 struct cx23885_board cx23885_boards[] = {
55 [CX23885_BOARD_UNKNOWN] = {
56 .name = "UNKNOWN/GENERIC",
57 /* Ensure safe default for unknown boards */
58 .clk_freq = 0,
59 .input = {{
60 .type = CX23885_VMUX_COMPOSITE1,
61 .vmux = 0,
62 }, {
63 .type = CX23885_VMUX_COMPOSITE2,
64 .vmux = 1,
65 }, {
66 .type = CX23885_VMUX_COMPOSITE3,
67 .vmux = 2,
68 }, {
69 .type = CX23885_VMUX_COMPOSITE4,
70 .vmux = 3,
71 } },
72 },
73 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
74 .name = "Hauppauge WinTV-HVR1800lp",
75 .portc = CX23885_MPEG_DVB,
76 .input = {{
77 .type = CX23885_VMUX_TELEVISION,
78 .vmux = 0,
79 .gpio0 = 0xff00,
80 }, {
81 .type = CX23885_VMUX_DEBUG,
82 .vmux = 0,
83 .gpio0 = 0xff01,
84 }, {
85 .type = CX23885_VMUX_COMPOSITE1,
86 .vmux = 1,
87 .gpio0 = 0xff02,
88 }, {
89 .type = CX23885_VMUX_SVIDEO,
90 .vmux = 2,
91 .gpio0 = 0xff02,
92 } },
93 },
94 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
95 .name = "Hauppauge WinTV-HVR1800",
96 .porta = CX23885_ANALOG_VIDEO,
97 .portb = CX23885_MPEG_ENCODER,
98 .portc = CX23885_MPEG_DVB,
99 .tuner_type = TUNER_PHILIPS_TDA8290,
100 .tuner_addr = 0x42, /* 0x84 >> 1 */
101 .tuner_bus = 1,
102 .input = {{
103 .type = CX23885_VMUX_TELEVISION,
104 .vmux = CX25840_VIN7_CH3 |
105 CX25840_VIN5_CH2 |
106 CX25840_VIN2_CH1,
107 .amux = CX25840_AUDIO8,
108 .gpio0 = 0,
109 }, {
110 .type = CX23885_VMUX_COMPOSITE1,
111 .vmux = CX25840_VIN7_CH3 |
112 CX25840_VIN4_CH2 |
113 CX25840_VIN6_CH1,
114 .amux = CX25840_AUDIO7,
115 .gpio0 = 0,
116 }, {
117 .type = CX23885_VMUX_SVIDEO,
118 .vmux = CX25840_VIN7_CH3 |
119 CX25840_VIN4_CH2 |
120 CX25840_VIN8_CH1 |
121 CX25840_SVIDEO_ON,
122 .amux = CX25840_AUDIO7,
123 .gpio0 = 0,
124 } },
125 },
126 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
127 .name = "Hauppauge WinTV-HVR1250",
128 .porta = CX23885_ANALOG_VIDEO,
129 .portc = CX23885_MPEG_DVB,
130 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
131 .tuner_type = TUNER_PHILIPS_TDA8290,
132 .tuner_addr = 0x42, /* 0x84 >> 1 */
133 .tuner_bus = 1,
134 #endif
135 .force_bff = 1,
136 .input = {{
137 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
138 .type = CX23885_VMUX_TELEVISION,
139 .vmux = CX25840_VIN7_CH3 |
140 CX25840_VIN5_CH2 |
141 CX25840_VIN2_CH1,
142 .amux = CX25840_AUDIO8,
143 .gpio0 = 0xff00,
144 }, {
145 #endif
146 .type = CX23885_VMUX_COMPOSITE1,
147 .vmux = CX25840_VIN7_CH3 |
148 CX25840_VIN4_CH2 |
149 CX25840_VIN6_CH1,
150 .amux = CX25840_AUDIO7,
151 .gpio0 = 0xff02,
152 }, {
153 .type = CX23885_VMUX_SVIDEO,
154 .vmux = CX25840_VIN7_CH3 |
155 CX25840_VIN4_CH2 |
156 CX25840_VIN8_CH1 |
157 CX25840_SVIDEO_ON,
158 .amux = CX25840_AUDIO7,
159 .gpio0 = 0xff02,
160 } },
161 },
162 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
163 .name = "DViCO FusionHDTV5 Express",
164 .portb = CX23885_MPEG_DVB,
165 },
166 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
167 .name = "Hauppauge WinTV-HVR1500Q",
168 .portc = CX23885_MPEG_DVB,
169 },
170 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
171 .name = "Hauppauge WinTV-HVR1500",
172 .porta = CX23885_ANALOG_VIDEO,
173 .portc = CX23885_MPEG_DVB,
174 .tuner_type = TUNER_XC2028,
175 .tuner_addr = 0x61, /* 0xc2 >> 1 */
176 .input = {{
177 .type = CX23885_VMUX_TELEVISION,
178 .vmux = CX25840_VIN7_CH3 |
179 CX25840_VIN5_CH2 |
180 CX25840_VIN2_CH1,
181 .gpio0 = 0,
182 }, {
183 .type = CX23885_VMUX_COMPOSITE1,
184 .vmux = CX25840_VIN7_CH3 |
185 CX25840_VIN4_CH2 |
186 CX25840_VIN6_CH1,
187 .gpio0 = 0,
188 }, {
189 .type = CX23885_VMUX_SVIDEO,
190 .vmux = CX25840_VIN7_CH3 |
191 CX25840_VIN4_CH2 |
192 CX25840_VIN8_CH1 |
193 CX25840_SVIDEO_ON,
194 .gpio0 = 0,
195 } },
196 },
197 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
198 .name = "Hauppauge WinTV-HVR1200",
199 .portc = CX23885_MPEG_DVB,
200 },
201 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
202 .name = "Hauppauge WinTV-HVR1700",
203 .portc = CX23885_MPEG_DVB,
204 },
205 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
206 .name = "Hauppauge WinTV-HVR1400",
207 .portc = CX23885_MPEG_DVB,
208 },
209 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
210 .name = "DViCO FusionHDTV7 Dual Express",
211 .portb = CX23885_MPEG_DVB,
212 .portc = CX23885_MPEG_DVB,
213 },
214 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
215 .name = "DViCO FusionHDTV DVB-T Dual Express",
216 .portb = CX23885_MPEG_DVB,
217 .portc = CX23885_MPEG_DVB,
218 },
219 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
220 .name = "Leadtek Winfast PxDVR3200 H",
221 .portc = CX23885_MPEG_DVB,
222 },
223 [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
224 .name = "Leadtek Winfast PxPVR2200",
225 .porta = CX23885_ANALOG_VIDEO,
226 .tuner_type = TUNER_XC2028,
227 .tuner_addr = 0x61,
228 .tuner_bus = 1,
229 .input = {{
230 .type = CX23885_VMUX_TELEVISION,
231 .vmux = CX25840_VIN2_CH1 |
232 CX25840_VIN5_CH2,
233 .amux = CX25840_AUDIO8,
234 .gpio0 = 0x704040,
235 }, {
236 .type = CX23885_VMUX_COMPOSITE1,
237 .vmux = CX25840_COMPOSITE1,
238 .amux = CX25840_AUDIO7,
239 .gpio0 = 0x704040,
240 }, {
241 .type = CX23885_VMUX_SVIDEO,
242 .vmux = CX25840_SVIDEO_LUMA3 |
243 CX25840_SVIDEO_CHROMA4,
244 .amux = CX25840_AUDIO7,
245 .gpio0 = 0x704040,
246 }, {
247 .type = CX23885_VMUX_COMPONENT,
248 .vmux = CX25840_VIN7_CH1 |
249 CX25840_VIN6_CH2 |
250 CX25840_VIN8_CH3 |
251 CX25840_COMPONENT_ON,
252 .amux = CX25840_AUDIO7,
253 .gpio0 = 0x704040,
254 } },
255 },
256 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
257 .name = "Leadtek Winfast PxDVR3200 H XC4000",
258 .porta = CX23885_ANALOG_VIDEO,
259 .portc = CX23885_MPEG_DVB,
260 .tuner_type = TUNER_XC4000,
261 .tuner_addr = 0x61,
262 .radio_type = UNSET,
263 .radio_addr = ADDR_UNSET,
264 .input = {{
265 .type = CX23885_VMUX_TELEVISION,
266 .vmux = CX25840_VIN2_CH1 |
267 CX25840_VIN5_CH2 |
268 CX25840_NONE0_CH3,
269 }, {
270 .type = CX23885_VMUX_COMPOSITE1,
271 .vmux = CX25840_COMPOSITE1,
272 }, {
273 .type = CX23885_VMUX_SVIDEO,
274 .vmux = CX25840_SVIDEO_LUMA3 |
275 CX25840_SVIDEO_CHROMA4,
276 }, {
277 .type = CX23885_VMUX_COMPONENT,
278 .vmux = CX25840_VIN7_CH1 |
279 CX25840_VIN6_CH2 |
280 CX25840_VIN8_CH3 |
281 CX25840_COMPONENT_ON,
282 } },
283 },
284 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
285 .name = "Compro VideoMate E650F",
286 .portc = CX23885_MPEG_DVB,
287 },
288 [CX23885_BOARD_TBS_6920] = {
289 .name = "TurboSight TBS 6920",
290 .portb = CX23885_MPEG_DVB,
291 },
292 [CX23885_BOARD_TBS_6980] = {
293 .name = "TurboSight TBS 6980",
294 .portb = CX23885_MPEG_DVB,
295 .portc = CX23885_MPEG_DVB,
296 },
297 [CX23885_BOARD_TBS_6981] = {
298 .name = "TurboSight TBS 6981",
299 .portb = CX23885_MPEG_DVB,
300 .portc = CX23885_MPEG_DVB,
301 },
302 [CX23885_BOARD_TEVII_S470] = {
303 .name = "TeVii S470",
304 .portb = CX23885_MPEG_DVB,
305 },
306 [CX23885_BOARD_DVBWORLD_2005] = {
307 .name = "DVBWorld DVB-S2 2005",
308 .portb = CX23885_MPEG_DVB,
309 },
310 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
311 .ci_type = 1,
312 .name = "NetUP Dual DVB-S2 CI",
313 .portb = CX23885_MPEG_DVB,
314 .portc = CX23885_MPEG_DVB,
315 },
316 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
317 .name = "Hauppauge WinTV-HVR1270",
318 .portc = CX23885_MPEG_DVB,
319 },
320 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
321 .name = "Hauppauge WinTV-HVR1275",
322 .portc = CX23885_MPEG_DVB,
323 },
324 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
325 .name = "Hauppauge WinTV-HVR1255",
326 .porta = CX23885_ANALOG_VIDEO,
327 .portc = CX23885_MPEG_DVB,
328 .tuner_type = TUNER_ABSENT,
329 .tuner_addr = 0x42, /* 0x84 >> 1 */
330 .force_bff = 1,
331 .input = {{
332 .type = CX23885_VMUX_TELEVISION,
333 .vmux = CX25840_VIN7_CH3 |
334 CX25840_VIN5_CH2 |
335 CX25840_VIN2_CH1 |
336 CX25840_DIF_ON,
337 .amux = CX25840_AUDIO8,
338 }, {
339 .type = CX23885_VMUX_COMPOSITE1,
340 .vmux = CX25840_VIN7_CH3 |
341 CX25840_VIN4_CH2 |
342 CX25840_VIN6_CH1,
343 .amux = CX25840_AUDIO7,
344 }, {
345 .type = CX23885_VMUX_SVIDEO,
346 .vmux = CX25840_VIN7_CH3 |
347 CX25840_VIN4_CH2 |
348 CX25840_VIN8_CH1 |
349 CX25840_SVIDEO_ON,
350 .amux = CX25840_AUDIO7,
351 } },
352 },
353 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
354 .name = "Hauppauge WinTV-HVR1255",
355 .porta = CX23885_ANALOG_VIDEO,
356 .portc = CX23885_MPEG_DVB,
357 .tuner_type = TUNER_ABSENT,
358 .tuner_addr = 0x42, /* 0x84 >> 1 */
359 .force_bff = 1,
360 .input = {{
361 .type = CX23885_VMUX_TELEVISION,
362 .vmux = CX25840_VIN7_CH3 |
363 CX25840_VIN5_CH2 |
364 CX25840_VIN2_CH1 |
365 CX25840_DIF_ON,
366 .amux = CX25840_AUDIO8,
367 }, {
368 .type = CX23885_VMUX_SVIDEO,
369 .vmux = CX25840_VIN7_CH3 |
370 CX25840_VIN4_CH2 |
371 CX25840_VIN8_CH1 |
372 CX25840_SVIDEO_ON,
373 .amux = CX25840_AUDIO7,
374 } },
375 },
376 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
377 .name = "Hauppauge WinTV-HVR1210",
378 .portc = CX23885_MPEG_DVB,
379 },
380 [CX23885_BOARD_MYGICA_X8506] = {
381 .name = "Mygica X8506 DMB-TH",
382 .tuner_type = TUNER_XC5000,
383 .tuner_addr = 0x61,
384 .tuner_bus = 1,
385 .porta = CX23885_ANALOG_VIDEO,
386 .portb = CX23885_MPEG_DVB,
387 .input = {
388 {
389 .type = CX23885_VMUX_TELEVISION,
390 .vmux = CX25840_COMPOSITE2,
391 },
392 {
393 .type = CX23885_VMUX_COMPOSITE1,
394 .vmux = CX25840_COMPOSITE8,
395 },
396 {
397 .type = CX23885_VMUX_SVIDEO,
398 .vmux = CX25840_SVIDEO_LUMA3 |
399 CX25840_SVIDEO_CHROMA4,
400 },
401 {
402 .type = CX23885_VMUX_COMPONENT,
403 .vmux = CX25840_COMPONENT_ON |
404 CX25840_VIN1_CH1 |
405 CX25840_VIN6_CH2 |
406 CX25840_VIN7_CH3,
407 },
408 },
409 },
410 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
411 .name = "Magic-Pro ProHDTV Extreme 2",
412 .tuner_type = TUNER_XC5000,
413 .tuner_addr = 0x61,
414 .tuner_bus = 1,
415 .porta = CX23885_ANALOG_VIDEO,
416 .portb = CX23885_MPEG_DVB,
417 .input = {
418 {
419 .type = CX23885_VMUX_TELEVISION,
420 .vmux = CX25840_COMPOSITE2,
421 },
422 {
423 .type = CX23885_VMUX_COMPOSITE1,
424 .vmux = CX25840_COMPOSITE8,
425 },
426 {
427 .type = CX23885_VMUX_SVIDEO,
428 .vmux = CX25840_SVIDEO_LUMA3 |
429 CX25840_SVIDEO_CHROMA4,
430 },
431 {
432 .type = CX23885_VMUX_COMPONENT,
433 .vmux = CX25840_COMPONENT_ON |
434 CX25840_VIN1_CH1 |
435 CX25840_VIN6_CH2 |
436 CX25840_VIN7_CH3,
437 },
438 },
439 },
440 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
441 .name = "Hauppauge WinTV-HVR1850",
442 .porta = CX23885_ANALOG_VIDEO,
443 .portb = CX23885_MPEG_ENCODER,
444 .portc = CX23885_MPEG_DVB,
445 .tuner_type = TUNER_ABSENT,
446 .tuner_addr = 0x42, /* 0x84 >> 1 */
447 .force_bff = 1,
448 .input = {{
449 .type = CX23885_VMUX_TELEVISION,
450 .vmux = CX25840_VIN7_CH3 |
451 CX25840_VIN5_CH2 |
452 CX25840_VIN2_CH1 |
453 CX25840_DIF_ON,
454 .amux = CX25840_AUDIO8,
455 }, {
456 .type = CX23885_VMUX_COMPOSITE1,
457 .vmux = CX25840_VIN7_CH3 |
458 CX25840_VIN4_CH2 |
459 CX25840_VIN6_CH1,
460 .amux = CX25840_AUDIO7,
461 }, {
462 .type = CX23885_VMUX_SVIDEO,
463 .vmux = CX25840_VIN7_CH3 |
464 CX25840_VIN4_CH2 |
465 CX25840_VIN8_CH1 |
466 CX25840_SVIDEO_ON,
467 .amux = CX25840_AUDIO7,
468 } },
469 },
470 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
471 .name = "Compro VideoMate E800",
472 .portc = CX23885_MPEG_DVB,
473 },
474 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
475 .name = "Hauppauge WinTV-HVR1290",
476 .portc = CX23885_MPEG_DVB,
477 },
478 [CX23885_BOARD_MYGICA_X8558PRO] = {
479 .name = "Mygica X8558 PRO DMB-TH",
480 .portb = CX23885_MPEG_DVB,
481 .portc = CX23885_MPEG_DVB,
482 },
483 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
484 .name = "LEADTEK WinFast PxTV1200",
485 .porta = CX23885_ANALOG_VIDEO,
486 .tuner_type = TUNER_XC2028,
487 .tuner_addr = 0x61,
488 .tuner_bus = 1,
489 .input = {{
490 .type = CX23885_VMUX_TELEVISION,
491 .vmux = CX25840_VIN2_CH1 |
492 CX25840_VIN5_CH2 |
493 CX25840_NONE0_CH3,
494 }, {
495 .type = CX23885_VMUX_COMPOSITE1,
496 .vmux = CX25840_COMPOSITE1,
497 }, {
498 .type = CX23885_VMUX_SVIDEO,
499 .vmux = CX25840_SVIDEO_LUMA3 |
500 CX25840_SVIDEO_CHROMA4,
501 }, {
502 .type = CX23885_VMUX_COMPONENT,
503 .vmux = CX25840_VIN7_CH1 |
504 CX25840_VIN6_CH2 |
505 CX25840_VIN8_CH3 |
506 CX25840_COMPONENT_ON,
507 } },
508 },
509 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
510 .name = "GoTView X5 3D Hybrid",
511 .tuner_type = TUNER_XC5000,
512 .tuner_addr = 0x64,
513 .tuner_bus = 1,
514 .porta = CX23885_ANALOG_VIDEO,
515 .portb = CX23885_MPEG_DVB,
516 .input = {{
517 .type = CX23885_VMUX_TELEVISION,
518 .vmux = CX25840_VIN2_CH1 |
519 CX25840_VIN5_CH2,
520 .gpio0 = 0x02,
521 }, {
522 .type = CX23885_VMUX_COMPOSITE1,
523 .vmux = CX23885_VMUX_COMPOSITE1,
524 }, {
525 .type = CX23885_VMUX_SVIDEO,
526 .vmux = CX25840_SVIDEO_LUMA3 |
527 CX25840_SVIDEO_CHROMA4,
528 } },
529 },
530 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
531 .ci_type = 2,
532 .name = "NetUP Dual DVB-T/C-CI RF",
533 .porta = CX23885_ANALOG_VIDEO,
534 .portb = CX23885_MPEG_DVB,
535 .portc = CX23885_MPEG_DVB,
536 .num_fds_portb = 2,
537 .num_fds_portc = 2,
538 .tuner_type = TUNER_XC5000,
539 .tuner_addr = 0x64,
540 .input = { {
541 .type = CX23885_VMUX_TELEVISION,
542 .vmux = CX25840_COMPOSITE1,
543 } },
544 },
545 [CX23885_BOARD_MPX885] = {
546 .name = "MPX-885",
547 .porta = CX23885_ANALOG_VIDEO,
548 .input = {{
549 .type = CX23885_VMUX_COMPOSITE1,
550 .vmux = CX25840_COMPOSITE1,
551 .amux = CX25840_AUDIO6,
552 .gpio0 = 0,
553 }, {
554 .type = CX23885_VMUX_COMPOSITE2,
555 .vmux = CX25840_COMPOSITE2,
556 .amux = CX25840_AUDIO6,
557 .gpio0 = 0,
558 }, {
559 .type = CX23885_VMUX_COMPOSITE3,
560 .vmux = CX25840_COMPOSITE3,
561 .amux = CX25840_AUDIO7,
562 .gpio0 = 0,
563 }, {
564 .type = CX23885_VMUX_COMPOSITE4,
565 .vmux = CX25840_COMPOSITE4,
566 .amux = CX25840_AUDIO7,
567 .gpio0 = 0,
568 } },
569 },
570 [CX23885_BOARD_MYGICA_X8507] = {
571 .name = "Mygica X8502/X8507 ISDB-T",
572 .tuner_type = TUNER_XC5000,
573 .tuner_addr = 0x61,
574 .tuner_bus = 1,
575 .porta = CX23885_ANALOG_VIDEO,
576 .portb = CX23885_MPEG_DVB,
577 .input = {
578 {
579 .type = CX23885_VMUX_TELEVISION,
580 .vmux = CX25840_COMPOSITE2,
581 .amux = CX25840_AUDIO8,
582 },
583 {
584 .type = CX23885_VMUX_COMPOSITE1,
585 .vmux = CX25840_COMPOSITE8,
586 .amux = CX25840_AUDIO7,
587 },
588 {
589 .type = CX23885_VMUX_SVIDEO,
590 .vmux = CX25840_SVIDEO_LUMA3 |
591 CX25840_SVIDEO_CHROMA4,
592 .amux = CX25840_AUDIO7,
593 },
594 {
595 .type = CX23885_VMUX_COMPONENT,
596 .vmux = CX25840_COMPONENT_ON |
597 CX25840_VIN1_CH1 |
598 CX25840_VIN6_CH2 |
599 CX25840_VIN7_CH3,
600 .amux = CX25840_AUDIO7,
601 },
602 },
603 },
604 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
605 .name = "TerraTec Cinergy T PCIe Dual",
606 .portb = CX23885_MPEG_DVB,
607 .portc = CX23885_MPEG_DVB,
608 },
609 [CX23885_BOARD_TEVII_S471] = {
610 .name = "TeVii S471",
611 .portb = CX23885_MPEG_DVB,
612 },
613 [CX23885_BOARD_PROF_8000] = {
614 .name = "Prof Revolution DVB-S2 8000",
615 .portb = CX23885_MPEG_DVB,
616 },
617 [CX23885_BOARD_HAUPPAUGE_HVR4400] = {
618 .name = "Hauppauge WinTV-HVR4400/HVR5500",
619 .porta = CX23885_ANALOG_VIDEO,
620 .portb = CX23885_MPEG_DVB,
621 .portc = CX23885_MPEG_DVB,
622 .tuner_type = TUNER_NXP_TDA18271,
623 .tuner_addr = 0x60, /* 0xc0 >> 1 */
624 .tuner_bus = 1,
625 },
626 [CX23885_BOARD_HAUPPAUGE_STARBURST] = {
627 .name = "Hauppauge WinTV Starburst",
628 .portb = CX23885_MPEG_DVB,
629 },
630 [CX23885_BOARD_AVERMEDIA_HC81R] = {
631 .name = "AVerTV Hybrid Express Slim HC81R",
632 .tuner_type = TUNER_XC2028,
633 .tuner_addr = 0x61, /* 0xc2 >> 1 */
634 .tuner_bus = 1,
635 .porta = CX23885_ANALOG_VIDEO,
636 .input = {{
637 .type = CX23885_VMUX_TELEVISION,
638 .vmux = CX25840_VIN2_CH1 |
639 CX25840_VIN5_CH2 |
640 CX25840_NONE0_CH3 |
641 CX25840_NONE1_CH3,
642 .amux = CX25840_AUDIO8,
643 }, {
644 .type = CX23885_VMUX_SVIDEO,
645 .vmux = CX25840_VIN8_CH1 |
646 CX25840_NONE_CH2 |
647 CX25840_VIN7_CH3 |
648 CX25840_SVIDEO_ON,
649 .amux = CX25840_AUDIO6,
650 }, {
651 .type = CX23885_VMUX_COMPONENT,
652 .vmux = CX25840_VIN1_CH1 |
653 CX25840_NONE_CH2 |
654 CX25840_NONE0_CH3 |
655 CX25840_NONE1_CH3,
656 .amux = CX25840_AUDIO6,
657 } },
658 },
659 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
660 .name = "DViCO FusionHDTV DVB-T Dual Express2",
661 .portb = CX23885_MPEG_DVB,
662 .portc = CX23885_MPEG_DVB,
663 },
664 [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
665 .name = "Hauppauge ImpactVCB-e",
666 .tuner_type = TUNER_ABSENT,
667 .porta = CX23885_ANALOG_VIDEO,
668 .input = {{
669 .type = CX23885_VMUX_COMPOSITE1,
670 .vmux = CX25840_VIN7_CH3 |
671 CX25840_VIN4_CH2 |
672 CX25840_VIN6_CH1,
673 .amux = CX25840_AUDIO7,
674 }, {
675 .type = CX23885_VMUX_SVIDEO,
676 .vmux = CX25840_VIN7_CH3 |
677 CX25840_VIN4_CH2 |
678 CX25840_VIN8_CH1 |
679 CX25840_SVIDEO_ON,
680 .amux = CX25840_AUDIO7,
681 } },
682 },
683 [CX23885_BOARD_DVBSKY_T9580] = {
684 .name = "DVBSky T9580",
685 .portb = CX23885_MPEG_DVB,
686 .portc = CX23885_MPEG_DVB,
687 },
688 [CX23885_BOARD_DVBSKY_T980C] = {
689 .name = "DVBSky T980C",
690 .portb = CX23885_MPEG_DVB,
691 },
692 [CX23885_BOARD_DVBSKY_S950C] = {
693 .name = "DVBSky S950C",
694 .portb = CX23885_MPEG_DVB,
695 },
696 [CX23885_BOARD_TT_CT2_4500_CI] = {
697 .name = "Technotrend TT-budget CT2-4500 CI",
698 .portb = CX23885_MPEG_DVB,
699 },
700 [CX23885_BOARD_DVBSKY_S950] = {
701 .name = "DVBSky S950",
702 .portb = CX23885_MPEG_DVB,
703 },
704 [CX23885_BOARD_DVBSKY_S952] = {
705 .name = "DVBSky S952",
706 .portb = CX23885_MPEG_DVB,
707 .portc = CX23885_MPEG_DVB,
708 },
709 [CX23885_BOARD_DVBSKY_T982] = {
710 .name = "DVBSky T982",
711 .portb = CX23885_MPEG_DVB,
712 .portc = CX23885_MPEG_DVB,
713 },
714 [CX23885_BOARD_HAUPPAUGE_HVR5525] = {
715 .name = "Hauppauge WinTV-HVR5525",
716 .portb = CX23885_MPEG_DVB,
717 .portc = CX23885_MPEG_DVB,
718 },
719 [CX23885_BOARD_VIEWCAST_260E] = {
720 .name = "ViewCast 260e",
721 .porta = CX23885_ANALOG_VIDEO,
722 .force_bff = 1,
723 .input = {{
724 .type = CX23885_VMUX_COMPOSITE1,
725 .vmux = CX25840_VIN6_CH1,
726 .amux = CX25840_AUDIO7,
727 }, {
728 .type = CX23885_VMUX_SVIDEO,
729 .vmux = CX25840_VIN7_CH3 |
730 CX25840_VIN5_CH1 |
731 CX25840_SVIDEO_ON,
732 .amux = CX25840_AUDIO7,
733 }, {
734 .type = CX23885_VMUX_COMPONENT,
735 .vmux = CX25840_VIN7_CH3 |
736 CX25840_VIN6_CH2 |
737 CX25840_VIN5_CH1 |
738 CX25840_COMPONENT_ON,
739 .amux = CX25840_AUDIO7,
740 } },
741 },
742 [CX23885_BOARD_VIEWCAST_460E] = {
743 .name = "ViewCast 460e",
744 .porta = CX23885_ANALOG_VIDEO,
745 .force_bff = 1,
746 .input = {{
747 .type = CX23885_VMUX_COMPOSITE1,
748 .vmux = CX25840_VIN4_CH1,
749 .amux = CX25840_AUDIO7,
750 }, {
751 .type = CX23885_VMUX_SVIDEO,
752 .vmux = CX25840_VIN7_CH3 |
753 CX25840_VIN6_CH1 |
754 CX25840_SVIDEO_ON,
755 .amux = CX25840_AUDIO7,
756 }, {
757 .type = CX23885_VMUX_COMPONENT,
758 .vmux = CX25840_VIN7_CH3 |
759 CX25840_VIN6_CH1 |
760 CX25840_VIN5_CH2 |
761 CX25840_COMPONENT_ON,
762 .amux = CX25840_AUDIO7,
763 }, {
764 .type = CX23885_VMUX_COMPOSITE2,
765 .vmux = CX25840_VIN6_CH1,
766 .amux = CX25840_AUDIO7,
767 } },
768 },
769 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = {
770 .name = "Hauppauge WinTV-QuadHD-DVB",
771 .portb = CX23885_MPEG_DVB,
772 .portc = CX23885_MPEG_DVB,
773 },
774 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885] = {
775 .name = "Hauppauge WinTV-QuadHD-DVB(885)",
776 .portb = CX23885_MPEG_DVB,
777 .portc = CX23885_MPEG_DVB,
778 },
779 [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = {
780 .name = "Hauppauge WinTV-QuadHD-ATSC",
781 .portb = CX23885_MPEG_DVB,
782 .portc = CX23885_MPEG_DVB,
783 },
784 [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885] = {
785 .name = "Hauppauge WinTV-QuadHD-ATSC(885)",
786 .portb = CX23885_MPEG_DVB,
787 .portc = CX23885_MPEG_DVB,
788 },
789 [CX23885_BOARD_HAUPPAUGE_HVR1265_K4] = {
790 .name = "Hauppauge WinTV-HVR-1265(161111)",
791 .porta = CX23885_ANALOG_VIDEO,
792 .portc = CX23885_MPEG_DVB,
793 .tuner_type = TUNER_ABSENT,
794 .force_bff = 1,
795 .input = {{
796 .type = CX23885_VMUX_COMPOSITE1,
797 .vmux = CX25840_VIN7_CH3 |
798 CX25840_VIN4_CH2 |
799 CX25840_VIN6_CH1,
800 .amux = CX25840_AUDIO7,
801 }, {
802 .type = CX23885_VMUX_SVIDEO,
803 .vmux = CX25840_VIN7_CH3 |
804 CX25840_VIN4_CH2 |
805 CX25840_VIN8_CH1 |
806 CX25840_SVIDEO_ON,
807 .amux = CX25840_AUDIO7,
808 } },
809 },
810 [CX23885_BOARD_HAUPPAUGE_STARBURST2] = {
811 .name = "Hauppauge WinTV-Starburst2",
812 .portb = CX23885_MPEG_DVB,
813 },
814 [CX23885_BOARD_AVERMEDIA_CE310B] = {
815 .name = "AVerMedia CE310B",
816 .porta = CX23885_ANALOG_VIDEO,
817 .force_bff = 1,
818 .input = {{
819 .type = CX23885_VMUX_COMPOSITE1,
820 .vmux = CX25840_VIN1_CH1 |
821 CX25840_NONE_CH2 |
822 CX25840_NONE0_CH3,
823 .amux = CX25840_AUDIO7,
824 }, {
825 .type = CX23885_VMUX_SVIDEO,
826 .vmux = CX25840_VIN8_CH1 |
827 CX25840_NONE_CH2 |
828 CX25840_VIN7_CH3 |
829 CX25840_SVIDEO_ON,
830 .amux = CX25840_AUDIO7,
831 } },
832 },
833 };
834 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
835
836 /* ------------------------------------------------------------------ */
837 /* PCI subsystem IDs */
838
839 struct cx23885_subid cx23885_subids[] = {
840 {
841 .subvendor = 0x0070,
842 .subdevice = 0x3400,
843 .card = CX23885_BOARD_UNKNOWN,
844 }, {
845 .subvendor = 0x0070,
846 .subdevice = 0x7600,
847 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
848 }, {
849 .subvendor = 0x0070,
850 .subdevice = 0x7800,
851 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
852 }, {
853 .subvendor = 0x0070,
854 .subdevice = 0x7801,
855 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
856 }, {
857 .subvendor = 0x0070,
858 .subdevice = 0x7809,
859 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
860 }, {
861 .subvendor = 0x0070,
862 .subdevice = 0x7911,
863 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
864 }, {
865 .subvendor = 0x18ac,
866 .subdevice = 0xd500,
867 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
868 }, {
869 .subvendor = 0x0070,
870 .subdevice = 0x7790,
871 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
872 }, {
873 .subvendor = 0x0070,
874 .subdevice = 0x7797,
875 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
876 }, {
877 .subvendor = 0x0070,
878 .subdevice = 0x7710,
879 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
880 }, {
881 .subvendor = 0x0070,
882 .subdevice = 0x7717,
883 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
884 }, {
885 .subvendor = 0x0070,
886 .subdevice = 0x71d1,
887 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
888 }, {
889 .subvendor = 0x0070,
890 .subdevice = 0x71d3,
891 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
892 }, {
893 .subvendor = 0x0070,
894 .subdevice = 0x8101,
895 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
896 }, {
897 .subvendor = 0x0070,
898 .subdevice = 0x8010,
899 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
900 }, {
901 .subvendor = 0x18ac,
902 .subdevice = 0xd618,
903 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
904 }, {
905 .subvendor = 0x18ac,
906 .subdevice = 0xdb78,
907 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
908 }, {
909 .subvendor = 0x107d,
910 .subdevice = 0x6681,
911 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
912 }, {
913 .subvendor = 0x107d,
914 .subdevice = 0x6f21,
915 .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
916 }, {
917 .subvendor = 0x107d,
918 .subdevice = 0x6f39,
919 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
920 }, {
921 .subvendor = 0x185b,
922 .subdevice = 0xe800,
923 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
924 }, {
925 .subvendor = 0x6920,
926 .subdevice = 0x8888,
927 .card = CX23885_BOARD_TBS_6920,
928 }, {
929 .subvendor = 0x6980,
930 .subdevice = 0x8888,
931 .card = CX23885_BOARD_TBS_6980,
932 }, {
933 .subvendor = 0x6981,
934 .subdevice = 0x8888,
935 .card = CX23885_BOARD_TBS_6981,
936 }, {
937 .subvendor = 0xd470,
938 .subdevice = 0x9022,
939 .card = CX23885_BOARD_TEVII_S470,
940 }, {
941 .subvendor = 0x0001,
942 .subdevice = 0x2005,
943 .card = CX23885_BOARD_DVBWORLD_2005,
944 }, {
945 .subvendor = 0x1b55,
946 .subdevice = 0x2a2c,
947 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
948 }, {
949 .subvendor = 0x0070,
950 .subdevice = 0x2211,
951 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
952 }, {
953 .subvendor = 0x0070,
954 .subdevice = 0x2215,
955 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
956 }, {
957 .subvendor = 0x0070,
958 .subdevice = 0x221d,
959 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
960 }, {
961 .subvendor = 0x0070,
962 .subdevice = 0x2251,
963 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
964 }, {
965 .subvendor = 0x0070,
966 .subdevice = 0x2259,
967 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
968 }, {
969 .subvendor = 0x0070,
970 .subdevice = 0x2291,
971 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
972 }, {
973 .subvendor = 0x0070,
974 .subdevice = 0x2295,
975 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
976 }, {
977 .subvendor = 0x0070,
978 .subdevice = 0x2299,
979 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
980 }, {
981 .subvendor = 0x0070,
982 .subdevice = 0x229d,
983 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
984 }, {
985 .subvendor = 0x0070,
986 .subdevice = 0x22f0,
987 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
988 }, {
989 .subvendor = 0x0070,
990 .subdevice = 0x22f1,
991 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
992 }, {
993 .subvendor = 0x0070,
994 .subdevice = 0x22f2,
995 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
996 }, {
997 .subvendor = 0x0070,
998 .subdevice = 0x22f3,
999 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
1000 }, {
1001 .subvendor = 0x0070,
1002 .subdevice = 0x22f4,
1003 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
1004 }, {
1005 .subvendor = 0x0070,
1006 .subdevice = 0x22f5,
1007 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
1008 }, {
1009 .subvendor = 0x14f1,
1010 .subdevice = 0x8651,
1011 .card = CX23885_BOARD_MYGICA_X8506,
1012 }, {
1013 .subvendor = 0x14f1,
1014 .subdevice = 0x8657,
1015 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
1016 }, {
1017 .subvendor = 0x0070,
1018 .subdevice = 0x8541,
1019 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
1020 }, {
1021 .subvendor = 0x1858,
1022 .subdevice = 0xe800,
1023 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
1024 }, {
1025 .subvendor = 0x0070,
1026 .subdevice = 0x8551,
1027 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
1028 }, {
1029 .subvendor = 0x14f1,
1030 .subdevice = 0x8578,
1031 .card = CX23885_BOARD_MYGICA_X8558PRO,
1032 }, {
1033 .subvendor = 0x107d,
1034 .subdevice = 0x6f22,
1035 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
1036 }, {
1037 .subvendor = 0x5654,
1038 .subdevice = 0x2390,
1039 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
1040 }, {
1041 .subvendor = 0x1b55,
1042 .subdevice = 0xe2e4,
1043 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
1044 }, {
1045 .subvendor = 0x14f1,
1046 .subdevice = 0x8502,
1047 .card = CX23885_BOARD_MYGICA_X8507,
1048 }, {
1049 .subvendor = 0x153b,
1050 .subdevice = 0x117e,
1051 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
1052 }, {
1053 .subvendor = 0xd471,
1054 .subdevice = 0x9022,
1055 .card = CX23885_BOARD_TEVII_S471,
1056 }, {
1057 .subvendor = 0x8000,
1058 .subdevice = 0x3034,
1059 .card = CX23885_BOARD_PROF_8000,
1060 }, {
1061 .subvendor = 0x0070,
1062 .subdevice = 0xc108,
1063 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */
1064 }, {
1065 .subvendor = 0x0070,
1066 .subdevice = 0xc138,
1067 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1068 }, {
1069 .subvendor = 0x0070,
1070 .subdevice = 0xc12a,
1071 .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */
1072 }, {
1073 .subvendor = 0x0070,
1074 .subdevice = 0xc1f8,
1075 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1076 }, {
1077 .subvendor = 0x1461,
1078 .subdevice = 0xd939,
1079 .card = CX23885_BOARD_AVERMEDIA_HC81R,
1080 }, {
1081 .subvendor = 0x0070,
1082 .subdevice = 0x7133,
1083 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
1084 }, {
1085 .subvendor = 0x0070,
1086 .subdevice = 0x7137,
1087 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
1088 }, {
1089 .subvendor = 0x18ac,
1090 .subdevice = 0xdb98,
1091 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
1092 }, {
1093 .subvendor = 0x4254,
1094 .subdevice = 0x9580,
1095 .card = CX23885_BOARD_DVBSKY_T9580,
1096 }, {
1097 .subvendor = 0x4254,
1098 .subdevice = 0x980c,
1099 .card = CX23885_BOARD_DVBSKY_T980C,
1100 }, {
1101 .subvendor = 0x4254,
1102 .subdevice = 0x950c,
1103 .card = CX23885_BOARD_DVBSKY_S950C,
1104 }, {
1105 .subvendor = 0x13c2,
1106 .subdevice = 0x3013,
1107 .card = CX23885_BOARD_TT_CT2_4500_CI,
1108 }, {
1109 .subvendor = 0x4254,
1110 .subdevice = 0x0950,
1111 .card = CX23885_BOARD_DVBSKY_S950,
1112 }, {
1113 .subvendor = 0x4254,
1114 .subdevice = 0x0952,
1115 .card = CX23885_BOARD_DVBSKY_S952,
1116 }, {
1117 .subvendor = 0x4254,
1118 .subdevice = 0x0982,
1119 .card = CX23885_BOARD_DVBSKY_T982,
1120 }, {
1121 .subvendor = 0x0070,
1122 .subdevice = 0xf038,
1123 .card = CX23885_BOARD_HAUPPAUGE_HVR5525,
1124 }, {
1125 .subvendor = 0x1576,
1126 .subdevice = 0x0260,
1127 .card = CX23885_BOARD_VIEWCAST_260E,
1128 }, {
1129 .subvendor = 0x1576,
1130 .subdevice = 0x0460,
1131 .card = CX23885_BOARD_VIEWCAST_460E,
1132 }, {
1133 .subvendor = 0x0070,
1134 .subdevice = 0x6a28,
1135 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */
1136 }, {
1137 .subvendor = 0x0070,
1138 .subdevice = 0x6b28,
1139 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */
1140 }, {
1141 .subvendor = 0x0070,
1142 .subdevice = 0x6a18,
1143 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 1 */
1144 }, {
1145 .subvendor = 0x0070,
1146 .subdevice = 0x6b18,
1147 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 2 */
1148 }, {
1149 .subvendor = 0x0070,
1150 .subdevice = 0x2a18,
1151 .card = CX23885_BOARD_HAUPPAUGE_HVR1265_K4, /* Hauppauge WinTV HVR-1265 (Model 161xx1, Hybrid ATSC/QAM-B) */
1152 }, {
1153 .subvendor = 0x0070,
1154 .subdevice = 0xf02a,
1155 .card = CX23885_BOARD_HAUPPAUGE_STARBURST2,
1156 }, {
1157 .subvendor = 0x1461,
1158 .subdevice = 0x3100,
1159 .card = CX23885_BOARD_AVERMEDIA_CE310B,
1160 },
1161 };
1162 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
1163
cx23885_card_list(struct cx23885_dev * dev)1164 void cx23885_card_list(struct cx23885_dev *dev)
1165 {
1166 int i;
1167
1168 if (0 == dev->pci->subsystem_vendor &&
1169 0 == dev->pci->subsystem_device) {
1170 pr_info("%s: Board has no valid PCIe Subsystem ID and can't\n"
1171 "%s: be autodetected. Pass card=<n> insmod option\n"
1172 "%s: to workaround that. Redirect complaints to the\n"
1173 "%s: vendor of the TV card. Best regards,\n"
1174 "%s: -- tux\n",
1175 dev->name, dev->name, dev->name, dev->name, dev->name);
1176 } else {
1177 pr_info("%s: Your board isn't known (yet) to the driver.\n"
1178 "%s: Try to pick one of the existing card configs via\n"
1179 "%s: card=<n> insmod option. Updating to the latest\n"
1180 "%s: version might help as well.\n",
1181 dev->name, dev->name, dev->name, dev->name);
1182 }
1183 pr_info("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
1184 dev->name);
1185 for (i = 0; i < cx23885_bcount; i++)
1186 pr_info("%s: card=%d -> %s\n",
1187 dev->name, i, cx23885_boards[i].name);
1188 }
1189
viewcast_eeprom(struct cx23885_dev * dev,u8 * eeprom_data)1190 static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1191 {
1192 u32 sn;
1193
1194 /* The serial number record begins with tag 0x59 */
1195 if (*(eeprom_data + 0x00) != 0x59) {
1196 pr_info("%s() eeprom records are undefined, no serial number\n",
1197 __func__);
1198 return;
1199 }
1200
1201 sn = (*(eeprom_data + 0x06) << 24) |
1202 (*(eeprom_data + 0x05) << 16) |
1203 (*(eeprom_data + 0x04) << 8) |
1204 (*(eeprom_data + 0x03));
1205
1206 pr_info("%s: card '%s' sn# MM%d\n",
1207 dev->name,
1208 cx23885_boards[dev->board].name,
1209 sn);
1210 }
1211
hauppauge_eeprom(struct cx23885_dev * dev,u8 * eeprom_data)1212 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1213 {
1214 struct tveeprom tv;
1215
1216 tveeprom_hauppauge_analog(&tv, eeprom_data);
1217
1218 /* Make sure we support the board model */
1219 switch (tv.model) {
1220 case 22001:
1221 /* WinTV-HVR1270 (PCIe, Retail, half height)
1222 * ATSC/QAM and basic analog, IR Blast */
1223 case 22009:
1224 /* WinTV-HVR1210 (PCIe, Retail, half height)
1225 * DVB-T and basic analog, IR Blast */
1226 case 22011:
1227 /* WinTV-HVR1270 (PCIe, Retail, half height)
1228 * ATSC/QAM and basic analog, IR Recv */
1229 case 22019:
1230 /* WinTV-HVR1210 (PCIe, Retail, half height)
1231 * DVB-T and basic analog, IR Recv */
1232 case 22021:
1233 /* WinTV-HVR1275 (PCIe, Retail, half height)
1234 * ATSC/QAM and basic analog, IR Recv */
1235 case 22029:
1236 /* WinTV-HVR1210 (PCIe, Retail, half height)
1237 * DVB-T and basic analog, IR Recv */
1238 case 22101:
1239 /* WinTV-HVR1270 (PCIe, Retail, full height)
1240 * ATSC/QAM and basic analog, IR Blast */
1241 case 22109:
1242 /* WinTV-HVR1210 (PCIe, Retail, full height)
1243 * DVB-T and basic analog, IR Blast */
1244 case 22111:
1245 /* WinTV-HVR1270 (PCIe, Retail, full height)
1246 * ATSC/QAM and basic analog, IR Recv */
1247 case 22119:
1248 /* WinTV-HVR1210 (PCIe, Retail, full height)
1249 * DVB-T and basic analog, IR Recv */
1250 case 22121:
1251 /* WinTV-HVR1275 (PCIe, Retail, full height)
1252 * ATSC/QAM and basic analog, IR Recv */
1253 case 22129:
1254 /* WinTV-HVR1210 (PCIe, Retail, full height)
1255 * DVB-T and basic analog, IR Recv */
1256 case 71009:
1257 /* WinTV-HVR1200 (PCIe, Retail, full height)
1258 * DVB-T and basic analog */
1259 case 71100:
1260 /* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1261 * Basic analog */
1262 case 71359:
1263 /* WinTV-HVR1200 (PCIe, OEM, half height)
1264 * DVB-T and basic analog */
1265 case 71439:
1266 /* WinTV-HVR1200 (PCIe, OEM, half height)
1267 * DVB-T and basic analog */
1268 case 71449:
1269 /* WinTV-HVR1200 (PCIe, OEM, full height)
1270 * DVB-T and basic analog */
1271 case 71939:
1272 /* WinTV-HVR1200 (PCIe, OEM, half height)
1273 * DVB-T and basic analog */
1274 case 71949:
1275 /* WinTV-HVR1200 (PCIe, OEM, full height)
1276 * DVB-T and basic analog */
1277 case 71959:
1278 /* WinTV-HVR1200 (PCIe, OEM, full height)
1279 * DVB-T and basic analog */
1280 case 71979:
1281 /* WinTV-HVR1200 (PCIe, OEM, half height)
1282 * DVB-T and basic analog */
1283 case 71999:
1284 /* WinTV-HVR1200 (PCIe, OEM, full height)
1285 * DVB-T and basic analog */
1286 case 76601:
1287 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1288 channel ATSC and MPEG2 HW Encoder */
1289 case 77001:
1290 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1291 and Basic analog */
1292 case 77011:
1293 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1294 and Basic analog */
1295 case 77041:
1296 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1297 and Basic analog */
1298 case 77051:
1299 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1300 and Basic analog */
1301 case 78011:
1302 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1303 Dual channel ATSC and MPEG2 HW Encoder */
1304 case 78501:
1305 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1306 Dual channel ATSC and MPEG2 HW Encoder */
1307 case 78521:
1308 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1309 Dual channel ATSC and MPEG2 HW Encoder */
1310 case 78531:
1311 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1312 Dual channel ATSC and MPEG2 HW Encoder */
1313 case 78631:
1314 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1315 Dual channel ATSC and MPEG2 HW Encoder */
1316 case 79001:
1317 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1318 ATSC and Basic analog */
1319 case 79101:
1320 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1321 ATSC and Basic analog */
1322 case 79501:
1323 /* WinTV-HVR1250 (PCIe, No IR, half height,
1324 ATSC [at least] and Basic analog) */
1325 case 79561:
1326 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1327 ATSC and Basic analog */
1328 case 79571:
1329 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1330 ATSC and Basic analog */
1331 case 79671:
1332 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1333 ATSC and Basic analog */
1334 case 80019:
1335 /* WinTV-HVR1400 (Express Card, Retail, IR,
1336 * DVB-T and Basic analog */
1337 case 81509:
1338 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1339 * DVB-T and MPEG2 HW Encoder */
1340 case 81519:
1341 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1342 * DVB-T and MPEG2 HW Encoder */
1343 break;
1344 case 85021:
1345 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1346 Dual channel ATSC and MPEG2 HW Encoder */
1347 break;
1348 case 85721:
1349 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1350 Dual channel ATSC and Basic analog */
1351 case 121019:
1352 /* WinTV-HVR4400 (PCIe, DVB-S2, DVB-C/T) */
1353 break;
1354 case 121029:
1355 /* WinTV-HVR5500 (PCIe, DVB-S2, DVB-C/T) */
1356 break;
1357 case 150329:
1358 /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */
1359 break;
1360 case 161111:
1361 /* WinTV-HVR-1265 K4 (PCIe, Analog/ATSC/QAM-B) */
1362 break;
1363 case 166100: /* 888 version, hybrid */
1364 case 166200: /* 885 version, DVB only */
1365 /* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height,
1366 DVB-T/T2/C, DVB-T/T2/C */
1367 break;
1368 case 166101: /* 888 version, hybrid */
1369 case 166201: /* 885 version, DVB only */
1370 /* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
1371 DVB-T/T2/C, DVB-T/T2/C */
1372 break;
1373 case 165100: /* 888 version, hybrid */
1374 case 165200: /* 885 version, digital only */
1375 /* WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height,
1376 * ATSC/QAM-B, ATSC/QAM-B */
1377 break;
1378 case 165101: /* 888 version, hybrid */
1379 case 165201: /* 885 version, digital only */
1380 /* WinTV-QuadHD (ATSC) Tuner Pair 2 (PCIe, IR, half height,
1381 * ATSC/QAM-B, ATSC/QAM-B */
1382 break;
1383 default:
1384 pr_warn("%s: warning: unknown hauppauge model #%d\n",
1385 dev->name, tv.model);
1386 break;
1387 }
1388
1389 pr_info("%s: hauppauge eeprom: model=%d\n",
1390 dev->name, tv.model);
1391 }
1392
1393 /* Some TBS cards require initing a chip using a bitbanged SPI attached
1394 to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1395 doesn't respond to any command. */
tbs_card_init(struct cx23885_dev * dev)1396 static void tbs_card_init(struct cx23885_dev *dev)
1397 {
1398 int i;
1399 static const u8 buf[] = {
1400 0xe0, 0x06, 0x66, 0x33, 0x65,
1401 0x01, 0x17, 0x06, 0xde};
1402
1403 switch (dev->board) {
1404 case CX23885_BOARD_TBS_6980:
1405 case CX23885_BOARD_TBS_6981:
1406 cx_set(GP0_IO, 0x00070007);
1407 usleep_range(1000, 10000);
1408 cx_clear(GP0_IO, 2);
1409 usleep_range(1000, 10000);
1410 for (i = 0; i < 9 * 8; i++) {
1411 cx_clear(GP0_IO, 7);
1412 usleep_range(1000, 10000);
1413 cx_set(GP0_IO,
1414 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1415 usleep_range(1000, 10000);
1416 }
1417 cx_set(GP0_IO, 7);
1418 break;
1419 }
1420 }
1421
cx23885_tuner_callback(void * priv,int component,int command,int arg)1422 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
1423 {
1424 struct cx23885_tsport *port = priv;
1425 struct cx23885_dev *dev = port->dev;
1426 u32 bitmask = 0;
1427
1428 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
1429 return 0;
1430
1431 if (command != 0) {
1432 pr_err("%s(): Unknown command 0x%x.\n",
1433 __func__, command);
1434 return -EINVAL;
1435 }
1436
1437 switch (dev->board) {
1438 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1439 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1440 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1441 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1442 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1443 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1444 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1445 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1446 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1447 /* Tuner Reset Command */
1448 bitmask = 0x04;
1449 break;
1450 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1451 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1452 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1453 /* Two identical tuners on two different i2c buses,
1454 * we need to reset the correct gpio. */
1455 if (port->nr == 1)
1456 bitmask = 0x01;
1457 else if (port->nr == 2)
1458 bitmask = 0x04;
1459 break;
1460 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1461 /* Tuner Reset Command */
1462 bitmask = 0x02;
1463 break;
1464 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1465 altera_ci_tuner_reset(dev, port->nr);
1466 break;
1467 case CX23885_BOARD_AVERMEDIA_HC81R:
1468 /* XC3028L Reset Command */
1469 bitmask = 1 << 2;
1470 break;
1471 }
1472
1473 if (bitmask) {
1474 /* Drive the tuner into reset and back out */
1475 cx_clear(GP0_IO, bitmask);
1476 mdelay(200);
1477 cx_set(GP0_IO, bitmask);
1478 }
1479
1480 return 0;
1481 }
1482
cx23885_gpio_setup(struct cx23885_dev * dev)1483 void cx23885_gpio_setup(struct cx23885_dev *dev)
1484 {
1485 switch (dev->board) {
1486 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1487 /* GPIO-0 cx24227 demodulator reset */
1488 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1489 break;
1490 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1491 /* GPIO-0 cx24227 demodulator */
1492 /* GPIO-2 xc3028 tuner */
1493
1494 /* Put the parts into reset */
1495 cx_set(GP0_IO, 0x00050000);
1496 cx_clear(GP0_IO, 0x00000005);
1497 msleep(5);
1498
1499 /* Bring the parts out of reset */
1500 cx_set(GP0_IO, 0x00050005);
1501 break;
1502 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1503 /* GPIO-0 cx24227 demodulator reset */
1504 /* GPIO-2 xc5000 tuner reset */
1505 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1506 break;
1507 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1508 /* GPIO-0 656_CLK */
1509 /* GPIO-1 656_D0 */
1510 /* GPIO-2 8295A Reset */
1511 /* GPIO-3-10 cx23417 data0-7 */
1512 /* GPIO-11-14 cx23417 addr0-3 */
1513 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1514 /* GPIO-19 IR_RX */
1515
1516 /* CX23417 GPIO's */
1517 /* EIO15 Zilog Reset */
1518 /* EIO14 S5H1409/CX24227 Reset */
1519 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1520
1521 /* Put the demod into reset and protect the eeprom */
1522 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1523 msleep(100);
1524
1525 /* Bring the demod and blaster out of reset */
1526 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1527 msleep(100);
1528
1529 /* Force the TDA8295A into reset and back */
1530 cx23885_gpio_enable(dev, GPIO_2, 1);
1531 cx23885_gpio_set(dev, GPIO_2);
1532 msleep(20);
1533 cx23885_gpio_clear(dev, GPIO_2);
1534 msleep(20);
1535 cx23885_gpio_set(dev, GPIO_2);
1536 msleep(20);
1537 break;
1538 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1539 /* GPIO-0 tda10048 demodulator reset */
1540 /* GPIO-2 tda18271 tuner reset */
1541
1542 /* Put the parts into reset and back */
1543 cx_set(GP0_IO, 0x00050000);
1544 msleep(20);
1545 cx_clear(GP0_IO, 0x00000005);
1546 msleep(20);
1547 cx_set(GP0_IO, 0x00050005);
1548 break;
1549 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1550 /* GPIO-0 TDA10048 demodulator reset */
1551 /* GPIO-2 TDA8295A Reset */
1552 /* GPIO-3-10 cx23417 data0-7 */
1553 /* GPIO-11-14 cx23417 addr0-3 */
1554 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1555
1556 /* The following GPIO's are on the interna AVCore (cx25840) */
1557 /* GPIO-19 IR_RX */
1558 /* GPIO-20 IR_TX 416/DVBT Select */
1559 /* GPIO-21 IIS DAT */
1560 /* GPIO-22 IIS WCLK */
1561 /* GPIO-23 IIS BCLK */
1562
1563 /* Put the parts into reset and back */
1564 cx_set(GP0_IO, 0x00050000);
1565 msleep(20);
1566 cx_clear(GP0_IO, 0x00000005);
1567 msleep(20);
1568 cx_set(GP0_IO, 0x00050005);
1569 break;
1570 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1571 /* GPIO-0 Dibcom7000p demodulator reset */
1572 /* GPIO-2 xc3028L tuner reset */
1573 /* GPIO-13 LED */
1574
1575 /* Put the parts into reset and back */
1576 cx_set(GP0_IO, 0x00050000);
1577 msleep(20);
1578 cx_clear(GP0_IO, 0x00000005);
1579 msleep(20);
1580 cx_set(GP0_IO, 0x00050005);
1581 break;
1582 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1583 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1584 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1585 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1586 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1587
1588 /* Put the parts into reset and back */
1589 cx_set(GP0_IO, 0x000f0000);
1590 msleep(20);
1591 cx_clear(GP0_IO, 0x0000000f);
1592 msleep(20);
1593 cx_set(GP0_IO, 0x000f000f);
1594 break;
1595 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1596 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1597 /* GPIO-0 portb xc3028 reset */
1598 /* GPIO-1 portb zl10353 reset */
1599 /* GPIO-2 portc xc3028 reset */
1600 /* GPIO-3 portc zl10353 reset */
1601
1602 /* Put the parts into reset and back */
1603 cx_set(GP0_IO, 0x000f0000);
1604 msleep(20);
1605 cx_clear(GP0_IO, 0x0000000f);
1606 msleep(20);
1607 cx_set(GP0_IO, 0x000f000f);
1608 break;
1609 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1610 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1611 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1612 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1613 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1614 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1615 /* GPIO-2 xc3028 tuner reset */
1616
1617 /* The following GPIO's are on the internal AVCore (cx25840) */
1618 /* GPIO-? zl10353 demod reset */
1619
1620 /* Put the parts into reset and back */
1621 cx_set(GP0_IO, 0x00040000);
1622 msleep(20);
1623 cx_clear(GP0_IO, 0x00000004);
1624 msleep(20);
1625 cx_set(GP0_IO, 0x00040004);
1626 break;
1627 case CX23885_BOARD_TBS_6920:
1628 case CX23885_BOARD_TBS_6980:
1629 case CX23885_BOARD_TBS_6981:
1630 case CX23885_BOARD_PROF_8000:
1631 cx_write(MC417_CTL, 0x00000036);
1632 cx_write(MC417_OEN, 0x00001000);
1633 cx_set(MC417_RWD, 0x00000002);
1634 msleep(200);
1635 cx_clear(MC417_RWD, 0x00000800);
1636 msleep(200);
1637 cx_set(MC417_RWD, 0x00000800);
1638 msleep(200);
1639 break;
1640 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1641 /* GPIO-0 INTA from CiMax1
1642 GPIO-1 INTB from CiMax2
1643 GPIO-2 reset chips
1644 GPIO-3 to GPIO-10 data/addr for CA
1645 GPIO-11 ~CS0 to CiMax1
1646 GPIO-12 ~CS1 to CiMax2
1647 GPIO-13 ADL0 load LSB addr
1648 GPIO-14 ADL1 load MSB addr
1649 GPIO-15 ~RDY from CiMax
1650 GPIO-17 ~RD to CiMax
1651 GPIO-18 ~WR to CiMax
1652 */
1653 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1654 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1655 cx_clear(GP0_IO, 0x00030004);
1656 msleep(100);/* reset delay */
1657 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1658 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1659 /* GPIO-15 IN as ~ACK, rest as OUT */
1660 cx_write(MC417_OEN, 0x00001000);
1661 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1662 cx_write(MC417_RWD, 0x0000c300);
1663 /* enable irq */
1664 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1665 break;
1666 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1667 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1668 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1669 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1670 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1671 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1672 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1673 /* GPIO-9 Demod reset */
1674
1675 /* Put the parts into reset and back */
1676 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1677 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1678 cx23885_gpio_clear(dev, GPIO_9);
1679 msleep(20);
1680 cx23885_gpio_set(dev, GPIO_9);
1681 break;
1682 case CX23885_BOARD_MYGICA_X8506:
1683 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1684 case CX23885_BOARD_MYGICA_X8507:
1685 /* GPIO-0 (0)Analog / (1)Digital TV */
1686 /* GPIO-1 reset XC5000 */
1687 /* GPIO-2 demod reset */
1688 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1689 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1690 msleep(100);
1691 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1692 msleep(100);
1693 break;
1694 case CX23885_BOARD_MYGICA_X8558PRO:
1695 /* GPIO-0 reset first ATBM8830 */
1696 /* GPIO-1 reset second ATBM8830 */
1697 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1698 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1699 msleep(100);
1700 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1701 msleep(100);
1702 break;
1703 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1704 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1705 /* GPIO-0 656_CLK */
1706 /* GPIO-1 656_D0 */
1707 /* GPIO-2 Wake# */
1708 /* GPIO-3-10 cx23417 data0-7 */
1709 /* GPIO-11-14 cx23417 addr0-3 */
1710 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1711 /* GPIO-19 IR_RX */
1712 /* GPIO-20 C_IR_TX */
1713 /* GPIO-21 I2S DAT */
1714 /* GPIO-22 I2S WCLK */
1715 /* GPIO-23 I2S BCLK */
1716 /* ALT GPIO: EXP GPIO LATCH */
1717
1718 /* CX23417 GPIO's */
1719 /* GPIO-14 S5H1411/CX24228 Reset */
1720 /* GPIO-13 EEPROM write protect */
1721 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1722
1723 /* Put the demod into reset and protect the eeprom */
1724 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1725 msleep(100);
1726
1727 /* Bring the demod out of reset */
1728 mc417_gpio_set(dev, GPIO_14);
1729 msleep(100);
1730
1731 /* CX24228 GPIO */
1732 /* Connected to IF / Mux */
1733 break;
1734 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1735 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1736 break;
1737 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1738 /* GPIO-0 ~INT in
1739 GPIO-1 TMS out
1740 GPIO-2 ~reset chips out
1741 GPIO-3 to GPIO-10 data/addr for CA in/out
1742 GPIO-11 ~CS out
1743 GPIO-12 ADDR out
1744 GPIO-13 ~WR out
1745 GPIO-14 ~RD out
1746 GPIO-15 ~RDY in
1747 GPIO-16 TCK out
1748 GPIO-17 TDO in
1749 GPIO-18 TDI out
1750 */
1751 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1752 /* GPIO-0 as INT, reset & TMS low */
1753 cx_clear(GP0_IO, 0x00010006);
1754 msleep(100);/* reset delay */
1755 cx_set(GP0_IO, 0x00000004); /* reset high */
1756 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1757 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1758 cx_write(MC417_OEN, 0x00005000);
1759 /* ~RD, ~WR high; ADDR low; ~CS high */
1760 cx_write(MC417_RWD, 0x00000d00);
1761 /* enable irq */
1762 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1763 break;
1764 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1765 case CX23885_BOARD_HAUPPAUGE_STARBURST:
1766 /* GPIO-8 tda10071 demod reset */
1767 /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
1768
1769 /* Put the parts into reset and back */
1770 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1771
1772 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1773 msleep(100);
1774 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1775 msleep(100);
1776
1777 break;
1778 case CX23885_BOARD_AVERMEDIA_HC81R:
1779 cx_clear(MC417_CTL, 1);
1780 /* GPIO-0,1,2 setup direction as output */
1781 cx_set(GP0_IO, 0x00070000);
1782 usleep_range(10000, 11000);
1783 /* AF9013 demod reset */
1784 cx_set(GP0_IO, 0x00010001);
1785 usleep_range(10000, 11000);
1786 cx_clear(GP0_IO, 0x00010001);
1787 usleep_range(10000, 11000);
1788 cx_set(GP0_IO, 0x00010001);
1789 usleep_range(10000, 11000);
1790 /* demod tune? */
1791 cx_clear(GP0_IO, 0x00030003);
1792 usleep_range(10000, 11000);
1793 cx_set(GP0_IO, 0x00020002);
1794 usleep_range(10000, 11000);
1795 cx_set(GP0_IO, 0x00010001);
1796 usleep_range(10000, 11000);
1797 cx_clear(GP0_IO, 0x00020002);
1798 /* XC3028L tuner reset */
1799 cx_set(GP0_IO, 0x00040004);
1800 cx_clear(GP0_IO, 0x00040004);
1801 cx_set(GP0_IO, 0x00040004);
1802 msleep(60);
1803 break;
1804 case CX23885_BOARD_DVBSKY_T9580:
1805 case CX23885_BOARD_DVBSKY_S952:
1806 case CX23885_BOARD_DVBSKY_T982:
1807 /* enable GPIO3-18 pins */
1808 cx_write(MC417_CTL, 0x00000037);
1809 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
1810 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
1811 msleep(100);
1812 cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
1813 break;
1814 case CX23885_BOARD_DVBSKY_T980C:
1815 case CX23885_BOARD_DVBSKY_S950C:
1816 case CX23885_BOARD_TT_CT2_4500_CI:
1817 /*
1818 * GPIO-0 INTA from CiMax, input
1819 * GPIO-1 reset CiMax, output, high active
1820 * GPIO-2 reset demod, output, low active
1821 * GPIO-3 to GPIO-10 data/addr for CAM
1822 * GPIO-11 ~CS0 to CiMax1
1823 * GPIO-12 ~CS1 to CiMax2
1824 * GPIO-13 ADL0 load LSB addr
1825 * GPIO-14 ADL1 load MSB addr
1826 * GPIO-15 ~RDY from CiMax
1827 * GPIO-17 ~RD to CiMax
1828 * GPIO-18 ~WR to CiMax
1829 */
1830
1831 cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
1832 cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
1833 msleep(100); /* reset delay */
1834 cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
1835 cx_clear(GP0_IO, 0x00010002);
1836 cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
1837
1838 /* GPIO-15 IN as ~ACK, rest as OUT */
1839 cx_write(MC417_OEN, 0x00001000);
1840
1841 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1842 cx_write(MC417_RWD, 0x0000c300);
1843
1844 /* enable irq */
1845 cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
1846 break;
1847 case CX23885_BOARD_DVBSKY_S950:
1848 cx23885_gpio_enable(dev, GPIO_2, 1);
1849 cx23885_gpio_clear(dev, GPIO_2);
1850 msleep(100);
1851 cx23885_gpio_set(dev, GPIO_2);
1852 break;
1853 case CX23885_BOARD_HAUPPAUGE_HVR5525:
1854 case CX23885_BOARD_HAUPPAUGE_STARBURST2:
1855 /*
1856 * HVR5525 GPIO Details:
1857 * GPIO-00 IR_WIDE
1858 * GPIO-02 wake#
1859 * GPIO-03 VAUX Pres.
1860 * GPIO-07 PROG#
1861 * GPIO-08 SAT_RESN
1862 * GPIO-09 TER_RESN
1863 * GPIO-10 B2_SENSE
1864 * GPIO-11 B1_SENSE
1865 * GPIO-15 IR_LED_STATUS
1866 * GPIO-19 IR_NARROW
1867 * GPIO-20 Blauster1
1868 * ALTGPIO VAUX_SWITCH
1869 * AUX_PLL_CLK : Blaster2
1870 */
1871 /* Put the parts into reset and back */
1872 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1873 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1874 msleep(100);
1875 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1876 msleep(100);
1877 break;
1878 case CX23885_BOARD_VIEWCAST_260E:
1879 case CX23885_BOARD_VIEWCAST_460E:
1880 /* For documentation purposes, it's worth noting that this
1881 * card does not have any GPIO's connected to subcomponents.
1882 */
1883 break;
1884 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
1885 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1886 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
1887 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1888 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
1889 /*
1890 * GPIO-08 TER1_RESN
1891 * GPIO-09 TER2_RESN
1892 */
1893 /* Put the parts into reset and back */
1894 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1895 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1896 msleep(100);
1897 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1898 msleep(100);
1899 break;
1900 }
1901 }
1902
cx23885_ir_init(struct cx23885_dev * dev)1903 int cx23885_ir_init(struct cx23885_dev *dev)
1904 {
1905 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1906 {
1907 .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
1908 .pin = CX23885_PIN_IR_RX_GPIO19,
1909 .function = CX23885_PAD_IR_RX,
1910 .value = 0,
1911 .strength = CX25840_PIN_DRIVE_MEDIUM,
1912 }, {
1913 .flags = BIT(V4L2_SUBDEV_IO_PIN_OUTPUT),
1914 .pin = CX23885_PIN_IR_TX_GPIO20,
1915 .function = CX23885_PAD_IR_TX,
1916 .value = 0,
1917 .strength = CX25840_PIN_DRIVE_MEDIUM,
1918 }
1919 };
1920 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1921
1922 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1923 {
1924 .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
1925 .pin = CX23885_PIN_IR_RX_GPIO19,
1926 .function = CX23885_PAD_IR_RX,
1927 .value = 0,
1928 .strength = CX25840_PIN_DRIVE_MEDIUM,
1929 }
1930 };
1931 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1932
1933 struct v4l2_subdev_ir_parameters params;
1934 int ret = 0;
1935 switch (dev->board) {
1936 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1937 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1938 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1939 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1940 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1941 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1942 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1943 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1944 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1945 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1946 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1947 /* FIXME: Implement me */
1948 break;
1949 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1950 ret = cx23888_ir_probe(dev);
1951 if (ret)
1952 break;
1953 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1954 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1955 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1956 break;
1957 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1958 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1959 ret = cx23888_ir_probe(dev);
1960 if (ret)
1961 break;
1962 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1963 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1964 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1965 /*
1966 * For these boards we need to invert the Tx output via the
1967 * IR controller to have the LED off while idle
1968 */
1969 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms);
1970 params.enable = false;
1971 params.shutdown = false;
1972 params.invert_level = true;
1973 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
1974 params.shutdown = true;
1975 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
1976 break;
1977 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1978 case CX23885_BOARD_TEVII_S470:
1979 case CX23885_BOARD_MYGICA_X8507:
1980 case CX23885_BOARD_TBS_6980:
1981 case CX23885_BOARD_TBS_6981:
1982 case CX23885_BOARD_DVBSKY_T9580:
1983 case CX23885_BOARD_DVBSKY_T980C:
1984 case CX23885_BOARD_DVBSKY_S950C:
1985 case CX23885_BOARD_TT_CT2_4500_CI:
1986 case CX23885_BOARD_DVBSKY_S950:
1987 case CX23885_BOARD_DVBSKY_S952:
1988 case CX23885_BOARD_DVBSKY_T982:
1989 if (!enable_885_ir)
1990 break;
1991 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1992 if (dev->sd_ir == NULL) {
1993 ret = -ENODEV;
1994 break;
1995 }
1996 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1997 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1998 break;
1999 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2000 if (!enable_885_ir)
2001 break;
2002 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
2003 if (dev->sd_ir == NULL) {
2004 ret = -ENODEV;
2005 break;
2006 }
2007 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
2008 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
2009 break;
2010 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
2011 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
2012 request_module("ir-kbd-i2c");
2013 break;
2014 }
2015
2016 return ret;
2017 }
2018
cx23885_ir_fini(struct cx23885_dev * dev)2019 void cx23885_ir_fini(struct cx23885_dev *dev)
2020 {
2021 switch (dev->board) {
2022 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2023 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2024 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2025 cx23885_irq_remove(dev, PCI_MSK_IR);
2026 cx23888_ir_remove(dev);
2027 dev->sd_ir = NULL;
2028 break;
2029 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2030 case CX23885_BOARD_TEVII_S470:
2031 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2032 case CX23885_BOARD_MYGICA_X8507:
2033 case CX23885_BOARD_TBS_6980:
2034 case CX23885_BOARD_TBS_6981:
2035 case CX23885_BOARD_DVBSKY_T9580:
2036 case CX23885_BOARD_DVBSKY_T980C:
2037 case CX23885_BOARD_DVBSKY_S950C:
2038 case CX23885_BOARD_TT_CT2_4500_CI:
2039 case CX23885_BOARD_DVBSKY_S950:
2040 case CX23885_BOARD_DVBSKY_S952:
2041 case CX23885_BOARD_DVBSKY_T982:
2042 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
2043 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
2044 dev->sd_ir = NULL;
2045 break;
2046 }
2047 }
2048
netup_jtag_io(void * device,int tms,int tdi,int read_tdo)2049 static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
2050 {
2051 int data;
2052 int tdo = 0;
2053 struct cx23885_dev *dev = (struct cx23885_dev *)device;
2054 /*TMS*/
2055 data = ((cx_read(GP0_IO)) & (~0x00000002));
2056 data |= (tms ? 0x00020002 : 0x00020000);
2057 cx_write(GP0_IO, data);
2058
2059 /*TDI*/
2060 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
2061 data |= (tdi ? 0x00008000 : 0);
2062 cx_write(MC417_RWD, data);
2063 if (read_tdo)
2064 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
2065
2066 cx_write(MC417_RWD, data | 0x00002000);
2067 udelay(1);
2068 /*TCK*/
2069 cx_write(MC417_RWD, data);
2070
2071 return tdo;
2072 }
2073
cx23885_ir_pci_int_enable(struct cx23885_dev * dev)2074 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
2075 {
2076 switch (dev->board) {
2077 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2078 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2079 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2080 if (dev->sd_ir)
2081 cx23885_irq_add_enable(dev, PCI_MSK_IR);
2082 break;
2083 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2084 case CX23885_BOARD_TEVII_S470:
2085 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2086 case CX23885_BOARD_MYGICA_X8507:
2087 case CX23885_BOARD_TBS_6980:
2088 case CX23885_BOARD_TBS_6981:
2089 case CX23885_BOARD_DVBSKY_T9580:
2090 case CX23885_BOARD_DVBSKY_T980C:
2091 case CX23885_BOARD_DVBSKY_S950C:
2092 case CX23885_BOARD_TT_CT2_4500_CI:
2093 case CX23885_BOARD_DVBSKY_S950:
2094 case CX23885_BOARD_DVBSKY_S952:
2095 case CX23885_BOARD_DVBSKY_T982:
2096 if (dev->sd_ir)
2097 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
2098 break;
2099 }
2100 }
2101
cx23885_card_setup(struct cx23885_dev * dev)2102 void cx23885_card_setup(struct cx23885_dev *dev)
2103 {
2104 struct cx23885_tsport *ts1 = &dev->ts1;
2105 struct cx23885_tsport *ts2 = &dev->ts2;
2106
2107 static u8 eeprom[256];
2108
2109 if (dev->i2c_bus[0].i2c_rc == 0) {
2110 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2111 tveeprom_read(&dev->i2c_bus[0].i2c_client,
2112 eeprom, sizeof(eeprom));
2113 }
2114
2115 switch (dev->board) {
2116 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2117 if (dev->i2c_bus[0].i2c_rc == 0) {
2118 if (eeprom[0x80] != 0x84)
2119 hauppauge_eeprom(dev, eeprom+0xc0);
2120 else
2121 hauppauge_eeprom(dev, eeprom+0x80);
2122 }
2123 break;
2124 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2125 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2126 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2127 if (dev->i2c_bus[0].i2c_rc == 0)
2128 hauppauge_eeprom(dev, eeprom+0x80);
2129 break;
2130 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2131 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2132 case CX23885_BOARD_HAUPPAUGE_HVR1200:
2133 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2134 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2135 case CX23885_BOARD_HAUPPAUGE_HVR1275:
2136 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2137 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2138 case CX23885_BOARD_HAUPPAUGE_HVR1210:
2139 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2140 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2141 case CX23885_BOARD_HAUPPAUGE_HVR4400:
2142 case CX23885_BOARD_HAUPPAUGE_STARBURST:
2143 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2144 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2145 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2146 case CX23885_BOARD_HAUPPAUGE_STARBURST2:
2147 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2148 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
2149 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2150 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
2151 if (dev->i2c_bus[0].i2c_rc == 0)
2152 hauppauge_eeprom(dev, eeprom+0xc0);
2153 break;
2154 case CX23885_BOARD_VIEWCAST_260E:
2155 case CX23885_BOARD_VIEWCAST_460E:
2156 dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1;
2157 tveeprom_read(&dev->i2c_bus[1].i2c_client,
2158 eeprom, sizeof(eeprom));
2159 if (dev->i2c_bus[0].i2c_rc == 0)
2160 viewcast_eeprom(dev, eeprom);
2161 break;
2162 }
2163
2164 switch (dev->board) {
2165 case CX23885_BOARD_AVERMEDIA_HC81R:
2166 /* Defaults for VID B */
2167 ts1->gen_ctrl_val = 0x4; /* Parallel */
2168 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2169 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2170 /* Defaults for VID C */
2171 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2172 ts2->gen_ctrl_val = 0x10e;
2173 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2174 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2175 break;
2176 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
2177 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
2178 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
2179 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2180 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2181 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2182 /* fall-through */
2183 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
2184 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2185 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2186 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2187 break;
2188 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2189 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2190 /* Defaults for VID B - Analog encoder */
2191 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2192 ts1->gen_ctrl_val = 0x10e;
2193 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2194 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2195
2196 /* APB_TSVALERR_POL (active low)*/
2197 ts1->vld_misc_val = 0x2000;
2198 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
2199 cx_write(0x130184, 0xc);
2200
2201 /* Defaults for VID C */
2202 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2203 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2204 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2205 break;
2206 case CX23885_BOARD_TBS_6920:
2207 ts1->gen_ctrl_val = 0x4; /* Parallel */
2208 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2209 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2210 break;
2211 case CX23885_BOARD_TEVII_S470:
2212 case CX23885_BOARD_TEVII_S471:
2213 case CX23885_BOARD_DVBWORLD_2005:
2214 case CX23885_BOARD_PROF_8000:
2215 case CX23885_BOARD_DVBSKY_T980C:
2216 case CX23885_BOARD_DVBSKY_S950C:
2217 case CX23885_BOARD_TT_CT2_4500_CI:
2218 case CX23885_BOARD_DVBSKY_S950:
2219 ts1->gen_ctrl_val = 0x5; /* Parallel */
2220 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2221 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2222 break;
2223 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2224 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2225 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2226 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2227 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2228 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2229 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2230 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2231 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2232 break;
2233 case CX23885_BOARD_TBS_6980:
2234 case CX23885_BOARD_TBS_6981:
2235 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2236 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2237 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2238 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2239 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2240 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2241 tbs_card_init(dev);
2242 break;
2243 case CX23885_BOARD_MYGICA_X8506:
2244 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2245 case CX23885_BOARD_MYGICA_X8507:
2246 ts1->gen_ctrl_val = 0x5; /* Parallel */
2247 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2248 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2249 break;
2250 case CX23885_BOARD_MYGICA_X8558PRO:
2251 ts1->gen_ctrl_val = 0x5; /* Parallel */
2252 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2253 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2254 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2255 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2256 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2257 break;
2258 case CX23885_BOARD_HAUPPAUGE_HVR4400:
2259 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2260 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2261 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2262 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2263 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2264 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2265 break;
2266 case CX23885_BOARD_HAUPPAUGE_STARBURST:
2267 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2268 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2269 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2270 break;
2271 case CX23885_BOARD_DVBSKY_T9580:
2272 case CX23885_BOARD_DVBSKY_T982:
2273 ts1->gen_ctrl_val = 0x5; /* Parallel */
2274 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2275 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2276 ts2->gen_ctrl_val = 0x8; /* Serial bus */
2277 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2278 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2279 break;
2280 case CX23885_BOARD_DVBSKY_S952:
2281 ts1->gen_ctrl_val = 0x5; /* Parallel */
2282 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2283 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2284 ts2->gen_ctrl_val = 0xe; /* Serial bus */
2285 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2286 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2287 break;
2288 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2289 case CX23885_BOARD_HAUPPAUGE_STARBURST2:
2290 ts1->gen_ctrl_val = 0x5; /* Parallel */
2291 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2292 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2293 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2294 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2295 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2296 break;
2297 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2298 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2299 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
2300 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2301 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
2302 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2303 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2304 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2305 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2306 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2307 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2308 break;
2309 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2310 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2311 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2312 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2313 case CX23885_BOARD_HAUPPAUGE_HVR1200:
2314 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2315 case CX23885_BOARD_HAUPPAUGE_HVR1400:
2316 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2317 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2318 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2319 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2320 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2321 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2322 case CX23885_BOARD_HAUPPAUGE_HVR1275:
2323 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2324 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2325 case CX23885_BOARD_HAUPPAUGE_HVR1210:
2326 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2327 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2328 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2329 default:
2330 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2331 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2332 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2333 }
2334
2335 /* Certain boards support analog, or require the avcore to be
2336 * loaded, ensure this happens.
2337 */
2338 switch (dev->board) {
2339 case CX23885_BOARD_TEVII_S470:
2340 /* Currently only enabled for the integrated IR controller */
2341 if (!enable_885_ir)
2342 break;
2343 /* fall-through */
2344 case CX23885_BOARD_HAUPPAUGE_HVR1250:
2345 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2346 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2347 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2348 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2349 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2350 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2351 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2352 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2353 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2354 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2355 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2356 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2357 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2358 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2359 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2360 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2361 case CX23885_BOARD_HAUPPAUGE_HVR1270:
2362 case CX23885_BOARD_HAUPPAUGE_HVR1850:
2363 case CX23885_BOARD_MYGICA_X8506:
2364 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2365 case CX23885_BOARD_HAUPPAUGE_HVR1290:
2366 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
2367 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2368 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2369 case CX23885_BOARD_MPX885:
2370 case CX23885_BOARD_MYGICA_X8507:
2371 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2372 case CX23885_BOARD_AVERMEDIA_HC81R:
2373 case CX23885_BOARD_TBS_6980:
2374 case CX23885_BOARD_TBS_6981:
2375 case CX23885_BOARD_DVBSKY_T9580:
2376 case CX23885_BOARD_DVBSKY_T980C:
2377 case CX23885_BOARD_DVBSKY_S950C:
2378 case CX23885_BOARD_TT_CT2_4500_CI:
2379 case CX23885_BOARD_DVBSKY_S950:
2380 case CX23885_BOARD_DVBSKY_S952:
2381 case CX23885_BOARD_DVBSKY_T982:
2382 case CX23885_BOARD_VIEWCAST_260E:
2383 case CX23885_BOARD_VIEWCAST_460E:
2384 case CX23885_BOARD_AVERMEDIA_CE310B:
2385 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
2386 &dev->i2c_bus[2].i2c_adap,
2387 "cx25840", 0x88 >> 1, NULL);
2388 if (dev->sd_cx25840) {
2389 /* set host data for clk_freq configuration */
2390 v4l2_set_subdev_hostdata(dev->sd_cx25840,
2391 &dev->clk_freq);
2392
2393 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
2394 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
2395 }
2396 break;
2397 }
2398
2399 switch (dev->board) {
2400 case CX23885_BOARD_VIEWCAST_260E:
2401 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2402 &dev->i2c_bus[0].i2c_adap,
2403 "cs3308", 0x82 >> 1, NULL);
2404 break;
2405 case CX23885_BOARD_VIEWCAST_460E:
2406 /* This cs3308 controls the audio from the breakout cable */
2407 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2408 &dev->i2c_bus[0].i2c_adap,
2409 "cs3308", 0x80 >> 1, NULL);
2410 /* This cs3308 controls the audio from the onboard header */
2411 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2412 &dev->i2c_bus[0].i2c_adap,
2413 "cs3308", 0x82 >> 1, NULL);
2414 break;
2415 }
2416
2417 /* AUX-PLL 27MHz CLK */
2418 switch (dev->board) {
2419 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2420 netup_initialize(dev);
2421 break;
2422 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2423 int ret;
2424 const struct firmware *fw;
2425 const char *filename = "dvb-netup-altera-01.fw";
2426 char *action = "configure";
2427 static struct netup_card_info cinfo;
2428 struct altera_config netup_config = {
2429 .dev = dev,
2430 .action = action,
2431 .jtag_io = netup_jtag_io,
2432 };
2433
2434 netup_initialize(dev);
2435
2436 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2437 if (netup_card_rev)
2438 cinfo.rev = netup_card_rev;
2439
2440 switch (cinfo.rev) {
2441 case 0x4:
2442 filename = "dvb-netup-altera-04.fw";
2443 break;
2444 default:
2445 filename = "dvb-netup-altera-01.fw";
2446 break;
2447 }
2448 pr_info("NetUP card rev=0x%x fw_filename=%s\n",
2449 cinfo.rev, filename);
2450
2451 ret = request_firmware(&fw, filename, &dev->pci->dev);
2452 if (ret != 0)
2453 pr_err("did not find the firmware file '%s'. You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware.",
2454 filename);
2455 else
2456 altera_init(&netup_config, fw);
2457
2458 release_firmware(fw);
2459 break;
2460 }
2461 }
2462 }
2463