1config FSL_FMAN 2 tristate "FMan support" 3 depends on FSL_SOC || ARCH_LAYERSCAPE || COMPILE_TEST 4 select GENERIC_ALLOCATOR 5 select PHYLIB 6 default n 7 help 8 Freescale Data-Path Acceleration Architecture Frame Manager 9 (FMan) support 10 11config DPAA_ERRATUM_A050385 12 bool 13 depends on ARM64 && FSL_DPAA 14 default y 15 help 16 DPAA FMan erratum A050385 software workaround implementation: 17 align buffers, data start, SG fragment length to avoid FMan DMA 18 splits. 19 FMAN DMA read or writes under heavy traffic load may cause FMAN 20 internal resource leak thus stopping further packet processing. 21 The FMAN internal queue can overflow when FMAN splits single 22 read or write transactions into multiple smaller transactions 23 such that more than 17 AXI transactions are in flight from FMAN 24 to interconnect. When the FMAN internal queue overflows, it can 25 stall further packet processing. The issue can occur with any 26 one of the following three conditions: 27 1. FMAN AXI transaction crosses 4K address boundary (Errata 28 A010022) 29 2. FMAN DMA address for an AXI transaction is not 16 byte 30 aligned, i.e. the last 4 bits of an address are non-zero 31 3. Scatter Gather (SG) frames have more than one SG buffer in 32 the SG list and any one of the buffers, except the last 33 buffer in the SG list has data size that is not a multiple 34 of 16 bytes, i.e., other than 16, 32, 48, 64, etc. 35 With any one of the above three conditions present, there is 36 likelihood of stalled FMAN packet processing, especially under 37 stress with multiple ports injecting line-rate traffic. 38