1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3
4 #include <linux/kernel.h>
5 #include <linux/module.h>
6 #include <linux/device.h>
7 #include <linux/export.h>
8 #include <linux/err.h>
9 #include <linux/if_link.h>
10 #include <linux/netdevice.h>
11 #include <linux/completion.h>
12 #include <linux/skbuff.h>
13 #include <linux/etherdevice.h>
14 #include <linux/types.h>
15 #include <linux/string.h>
16 #include <linux/gfp.h>
17 #include <linux/random.h>
18 #include <linux/jiffies.h>
19 #include <linux/mutex.h>
20 #include <linux/rcupdate.h>
21 #include <linux/slab.h>
22 #include <linux/workqueue.h>
23 #include <asm/byteorder.h>
24 #include <net/devlink.h>
25 #include <trace/events/devlink.h>
26
27 #include "core.h"
28 #include "item.h"
29 #include "cmd.h"
30 #include "port.h"
31 #include "trap.h"
32 #include "emad.h"
33 #include "reg.h"
34 #include "resources.h"
35
36 static LIST_HEAD(mlxsw_core_driver_list);
37 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
38
39 static const char mlxsw_core_driver_name[] = "mlxsw_core";
40
41 static struct workqueue_struct *mlxsw_wq;
42 static struct workqueue_struct *mlxsw_owq;
43
44 struct mlxsw_core_port {
45 struct devlink_port devlink_port;
46 void *port_driver_priv;
47 u8 local_port;
48 };
49
mlxsw_core_port_driver_priv(struct mlxsw_core_port * mlxsw_core_port)50 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
51 {
52 return mlxsw_core_port->port_driver_priv;
53 }
54 EXPORT_SYMBOL(mlxsw_core_port_driver_priv);
55
mlxsw_core_port_check(struct mlxsw_core_port * mlxsw_core_port)56 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port)
57 {
58 return mlxsw_core_port->port_driver_priv != NULL;
59 }
60
61 struct mlxsw_core {
62 struct mlxsw_driver *driver;
63 const struct mlxsw_bus *bus;
64 void *bus_priv;
65 const struct mlxsw_bus_info *bus_info;
66 struct workqueue_struct *emad_wq;
67 struct list_head rx_listener_list;
68 struct list_head event_listener_list;
69 struct {
70 atomic64_t tid;
71 struct list_head trans_list;
72 spinlock_t trans_list_lock; /* protects trans_list writes */
73 bool use_emad;
74 } emad;
75 struct {
76 u8 *mapping; /* lag_id+port_index to local_port mapping */
77 } lag;
78 struct mlxsw_res res;
79 struct mlxsw_hwmon *hwmon;
80 struct mlxsw_thermal *thermal;
81 struct mlxsw_core_port *ports;
82 unsigned int max_ports;
83 bool reload_fail;
84 bool fw_flash_in_progress;
85 unsigned long driver_priv[0];
86 /* driver_priv has to be always the last item */
87 };
88
89 #define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40
90
mlxsw_ports_init(struct mlxsw_core * mlxsw_core)91 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core)
92 {
93 /* Switch ports are numbered from 1 to queried value */
94 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT))
95 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core,
96 MAX_SYSTEM_PORT) + 1;
97 else
98 mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1;
99
100 mlxsw_core->ports = kcalloc(mlxsw_core->max_ports,
101 sizeof(struct mlxsw_core_port), GFP_KERNEL);
102 if (!mlxsw_core->ports)
103 return -ENOMEM;
104
105 return 0;
106 }
107
mlxsw_ports_fini(struct mlxsw_core * mlxsw_core)108 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core)
109 {
110 kfree(mlxsw_core->ports);
111 }
112
mlxsw_core_max_ports(const struct mlxsw_core * mlxsw_core)113 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core)
114 {
115 return mlxsw_core->max_ports;
116 }
117 EXPORT_SYMBOL(mlxsw_core_max_ports);
118
mlxsw_core_driver_priv(struct mlxsw_core * mlxsw_core)119 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
120 {
121 return mlxsw_core->driver_priv;
122 }
123 EXPORT_SYMBOL(mlxsw_core_driver_priv);
124
125 struct mlxsw_rx_listener_item {
126 struct list_head list;
127 struct mlxsw_rx_listener rxl;
128 void *priv;
129 };
130
131 struct mlxsw_event_listener_item {
132 struct list_head list;
133 struct mlxsw_event_listener el;
134 void *priv;
135 };
136
137 /******************
138 * EMAD processing
139 ******************/
140
141 /* emad_eth_hdr_dmac
142 * Destination MAC in EMAD's Ethernet header.
143 * Must be set to 01:02:c9:00:00:01
144 */
145 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
146
147 /* emad_eth_hdr_smac
148 * Source MAC in EMAD's Ethernet header.
149 * Must be set to 00:02:c9:01:02:03
150 */
151 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
152
153 /* emad_eth_hdr_ethertype
154 * Ethertype in EMAD's Ethernet header.
155 * Must be set to 0x8932
156 */
157 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
158
159 /* emad_eth_hdr_mlx_proto
160 * Mellanox protocol.
161 * Must be set to 0x0.
162 */
163 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
164
165 /* emad_eth_hdr_ver
166 * Mellanox protocol version.
167 * Must be set to 0x0.
168 */
169 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
170
171 /* emad_op_tlv_type
172 * Type of the TLV.
173 * Must be set to 0x1 (operation TLV).
174 */
175 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
176
177 /* emad_op_tlv_len
178 * Length of the operation TLV in u32.
179 * Must be set to 0x4.
180 */
181 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
182
183 /* emad_op_tlv_dr
184 * Direct route bit. Setting to 1 indicates the EMAD is a direct route
185 * EMAD. DR TLV must follow.
186 *
187 * Note: Currently not supported and must not be set.
188 */
189 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
190
191 /* emad_op_tlv_status
192 * Returned status in case of EMAD response. Must be set to 0 in case
193 * of EMAD request.
194 * 0x0 - success
195 * 0x1 - device is busy. Requester should retry
196 * 0x2 - Mellanox protocol version not supported
197 * 0x3 - unknown TLV
198 * 0x4 - register not supported
199 * 0x5 - operation class not supported
200 * 0x6 - EMAD method not supported
201 * 0x7 - bad parameter (e.g. port out of range)
202 * 0x8 - resource not available
203 * 0x9 - message receipt acknowledgment. Requester should retry
204 * 0x70 - internal error
205 */
206 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
207
208 /* emad_op_tlv_register_id
209 * Register ID of register within register TLV.
210 */
211 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
212
213 /* emad_op_tlv_r
214 * Response bit. Setting to 1 indicates Response, otherwise request.
215 */
216 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
217
218 /* emad_op_tlv_method
219 * EMAD method type.
220 * 0x1 - query
221 * 0x2 - write
222 * 0x3 - send (currently not supported)
223 * 0x4 - event
224 */
225 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
226
227 /* emad_op_tlv_class
228 * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
229 */
230 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
231
232 /* emad_op_tlv_tid
233 * EMAD transaction ID. Used for pairing request and response EMADs.
234 */
235 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
236
237 /* emad_reg_tlv_type
238 * Type of the TLV.
239 * Must be set to 0x3 (register TLV).
240 */
241 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
242
243 /* emad_reg_tlv_len
244 * Length of the operation TLV in u32.
245 */
246 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
247
248 /* emad_end_tlv_type
249 * Type of the TLV.
250 * Must be set to 0x0 (end TLV).
251 */
252 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
253
254 /* emad_end_tlv_len
255 * Length of the end TLV in u32.
256 * Must be set to 1.
257 */
258 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
259
260 enum mlxsw_core_reg_access_type {
261 MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
262 MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
263 };
264
265 static inline const char *
mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)266 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
267 {
268 switch (type) {
269 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
270 return "query";
271 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
272 return "write";
273 }
274 BUG();
275 }
276
mlxsw_emad_pack_end_tlv(char * end_tlv)277 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
278 {
279 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
280 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
281 }
282
mlxsw_emad_pack_reg_tlv(char * reg_tlv,const struct mlxsw_reg_info * reg,char * payload)283 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
284 const struct mlxsw_reg_info *reg,
285 char *payload)
286 {
287 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
288 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
289 memcpy(reg_tlv + sizeof(u32), payload, reg->len);
290 }
291
mlxsw_emad_pack_op_tlv(char * op_tlv,const struct mlxsw_reg_info * reg,enum mlxsw_core_reg_access_type type,u64 tid)292 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
293 const struct mlxsw_reg_info *reg,
294 enum mlxsw_core_reg_access_type type,
295 u64 tid)
296 {
297 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
298 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
299 mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
300 mlxsw_emad_op_tlv_status_set(op_tlv, 0);
301 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
302 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
303 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
304 mlxsw_emad_op_tlv_method_set(op_tlv,
305 MLXSW_EMAD_OP_TLV_METHOD_QUERY);
306 else
307 mlxsw_emad_op_tlv_method_set(op_tlv,
308 MLXSW_EMAD_OP_TLV_METHOD_WRITE);
309 mlxsw_emad_op_tlv_class_set(op_tlv,
310 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
311 mlxsw_emad_op_tlv_tid_set(op_tlv, tid);
312 }
313
mlxsw_emad_construct_eth_hdr(struct sk_buff * skb)314 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
315 {
316 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
317
318 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
319 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
320 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
321 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
322 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
323
324 skb_reset_mac_header(skb);
325
326 return 0;
327 }
328
mlxsw_emad_construct(struct sk_buff * skb,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type,u64 tid)329 static void mlxsw_emad_construct(struct sk_buff *skb,
330 const struct mlxsw_reg_info *reg,
331 char *payload,
332 enum mlxsw_core_reg_access_type type,
333 u64 tid)
334 {
335 char *buf;
336
337 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
338 mlxsw_emad_pack_end_tlv(buf);
339
340 buf = skb_push(skb, reg->len + sizeof(u32));
341 mlxsw_emad_pack_reg_tlv(buf, reg, payload);
342
343 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
344 mlxsw_emad_pack_op_tlv(buf, reg, type, tid);
345
346 mlxsw_emad_construct_eth_hdr(skb);
347 }
348
mlxsw_emad_op_tlv(const struct sk_buff * skb)349 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
350 {
351 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN));
352 }
353
mlxsw_emad_reg_tlv(const struct sk_buff * skb)354 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
355 {
356 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN +
357 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)));
358 }
359
mlxsw_emad_reg_payload(const char * op_tlv)360 static char *mlxsw_emad_reg_payload(const char *op_tlv)
361 {
362 return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
363 }
364
mlxsw_emad_get_tid(const struct sk_buff * skb)365 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
366 {
367 char *op_tlv;
368
369 op_tlv = mlxsw_emad_op_tlv(skb);
370 return mlxsw_emad_op_tlv_tid_get(op_tlv);
371 }
372
mlxsw_emad_is_resp(const struct sk_buff * skb)373 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
374 {
375 char *op_tlv;
376
377 op_tlv = mlxsw_emad_op_tlv(skb);
378 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
379 }
380
mlxsw_emad_process_status(char * op_tlv,enum mlxsw_emad_op_tlv_status * p_status)381 static int mlxsw_emad_process_status(char *op_tlv,
382 enum mlxsw_emad_op_tlv_status *p_status)
383 {
384 *p_status = mlxsw_emad_op_tlv_status_get(op_tlv);
385
386 switch (*p_status) {
387 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
388 return 0;
389 case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
390 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
391 return -EAGAIN;
392 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
393 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
394 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
395 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
396 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
397 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
398 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
399 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
400 default:
401 return -EIO;
402 }
403 }
404
405 static int
mlxsw_emad_process_status_skb(struct sk_buff * skb,enum mlxsw_emad_op_tlv_status * p_status)406 mlxsw_emad_process_status_skb(struct sk_buff *skb,
407 enum mlxsw_emad_op_tlv_status *p_status)
408 {
409 return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status);
410 }
411
412 struct mlxsw_reg_trans {
413 struct list_head list;
414 struct list_head bulk_list;
415 struct mlxsw_core *core;
416 struct sk_buff *tx_skb;
417 struct mlxsw_tx_info tx_info;
418 struct delayed_work timeout_dw;
419 unsigned int retries;
420 u64 tid;
421 struct completion completion;
422 atomic_t active;
423 mlxsw_reg_trans_cb_t *cb;
424 unsigned long cb_priv;
425 const struct mlxsw_reg_info *reg;
426 enum mlxsw_core_reg_access_type type;
427 int err;
428 enum mlxsw_emad_op_tlv_status emad_status;
429 struct rcu_head rcu;
430 };
431
432 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS 3000
433 #define MLXSW_EMAD_TIMEOUT_MS 200
434
mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans * trans)435 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans)
436 {
437 unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS);
438
439 if (trans->core->fw_flash_in_progress)
440 timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS);
441
442 queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout);
443 }
444
mlxsw_emad_transmit(struct mlxsw_core * mlxsw_core,struct mlxsw_reg_trans * trans)445 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
446 struct mlxsw_reg_trans *trans)
447 {
448 struct sk_buff *skb;
449 int err;
450
451 skb = skb_copy(trans->tx_skb, GFP_KERNEL);
452 if (!skb)
453 return -ENOMEM;
454
455 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0,
456 skb->data + mlxsw_core->driver->txhdr_len,
457 skb->len - mlxsw_core->driver->txhdr_len);
458
459 atomic_set(&trans->active, 1);
460 err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info);
461 if (err) {
462 dev_kfree_skb(skb);
463 return err;
464 }
465 mlxsw_emad_trans_timeout_schedule(trans);
466 return 0;
467 }
468
mlxsw_emad_trans_finish(struct mlxsw_reg_trans * trans,int err)469 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err)
470 {
471 struct mlxsw_core *mlxsw_core = trans->core;
472
473 dev_kfree_skb(trans->tx_skb);
474 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
475 list_del_rcu(&trans->list);
476 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
477 trans->err = err;
478 complete(&trans->completion);
479 }
480
mlxsw_emad_transmit_retry(struct mlxsw_core * mlxsw_core,struct mlxsw_reg_trans * trans)481 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core,
482 struct mlxsw_reg_trans *trans)
483 {
484 int err;
485
486 if (trans->retries < MLXSW_EMAD_MAX_RETRY) {
487 trans->retries++;
488 err = mlxsw_emad_transmit(trans->core, trans);
489 if (err == 0)
490 return;
491
492 if (!atomic_dec_and_test(&trans->active))
493 return;
494 } else {
495 err = -EIO;
496 }
497 mlxsw_emad_trans_finish(trans, err);
498 }
499
mlxsw_emad_trans_timeout_work(struct work_struct * work)500 static void mlxsw_emad_trans_timeout_work(struct work_struct *work)
501 {
502 struct mlxsw_reg_trans *trans = container_of(work,
503 struct mlxsw_reg_trans,
504 timeout_dw.work);
505
506 if (!atomic_dec_and_test(&trans->active))
507 return;
508
509 mlxsw_emad_transmit_retry(trans->core, trans);
510 }
511
mlxsw_emad_process_response(struct mlxsw_core * mlxsw_core,struct mlxsw_reg_trans * trans,struct sk_buff * skb)512 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core,
513 struct mlxsw_reg_trans *trans,
514 struct sk_buff *skb)
515 {
516 int err;
517
518 if (!atomic_dec_and_test(&trans->active))
519 return;
520
521 err = mlxsw_emad_process_status_skb(skb, &trans->emad_status);
522 if (err == -EAGAIN) {
523 mlxsw_emad_transmit_retry(mlxsw_core, trans);
524 } else {
525 if (err == 0) {
526 char *op_tlv = mlxsw_emad_op_tlv(skb);
527
528 if (trans->cb)
529 trans->cb(mlxsw_core,
530 mlxsw_emad_reg_payload(op_tlv),
531 trans->reg->len, trans->cb_priv);
532 }
533 mlxsw_emad_trans_finish(trans, err);
534 }
535 }
536
537 /* called with rcu read lock held */
mlxsw_emad_rx_listener_func(struct sk_buff * skb,u8 local_port,void * priv)538 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
539 void *priv)
540 {
541 struct mlxsw_core *mlxsw_core = priv;
542 struct mlxsw_reg_trans *trans;
543
544 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
545 skb->data, skb->len);
546
547 if (!mlxsw_emad_is_resp(skb))
548 goto free_skb;
549
550 list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) {
551 if (mlxsw_emad_get_tid(skb) == trans->tid) {
552 mlxsw_emad_process_response(mlxsw_core, trans, skb);
553 break;
554 }
555 }
556
557 free_skb:
558 dev_kfree_skb(skb);
559 }
560
561 static const struct mlxsw_listener mlxsw_emad_rx_listener =
562 MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false,
563 EMAD, DISCARD);
564
mlxsw_emad_init(struct mlxsw_core * mlxsw_core)565 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
566 {
567 struct workqueue_struct *emad_wq;
568 u64 tid;
569 int err;
570
571 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
572 return 0;
573
574 emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0);
575 if (!emad_wq)
576 return -ENOMEM;
577 mlxsw_core->emad_wq = emad_wq;
578
579 /* Set the upper 32 bits of the transaction ID field to a random
580 * number. This allows us to discard EMADs addressed to other
581 * devices.
582 */
583 get_random_bytes(&tid, 4);
584 tid <<= 32;
585 atomic64_set(&mlxsw_core->emad.tid, tid);
586
587 INIT_LIST_HEAD(&mlxsw_core->emad.trans_list);
588 spin_lock_init(&mlxsw_core->emad.trans_list_lock);
589
590 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,
591 mlxsw_core);
592 if (err)
593 goto err_trap_register;
594
595 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core);
596 if (err)
597 goto err_emad_trap_set;
598 mlxsw_core->emad.use_emad = true;
599
600 return 0;
601
602 err_emad_trap_set:
603 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
604 mlxsw_core);
605 err_trap_register:
606 destroy_workqueue(mlxsw_core->emad_wq);
607 return err;
608 }
609
mlxsw_emad_fini(struct mlxsw_core * mlxsw_core)610 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
611 {
612
613 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
614 return;
615
616 mlxsw_core->emad.use_emad = false;
617 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
618 mlxsw_core);
619 destroy_workqueue(mlxsw_core->emad_wq);
620 }
621
mlxsw_emad_alloc(const struct mlxsw_core * mlxsw_core,u16 reg_len)622 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
623 u16 reg_len)
624 {
625 struct sk_buff *skb;
626 u16 emad_len;
627
628 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
629 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
630 sizeof(u32) + mlxsw_core->driver->txhdr_len);
631 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
632 return NULL;
633
634 skb = netdev_alloc_skb(NULL, emad_len);
635 if (!skb)
636 return NULL;
637 memset(skb->data, 0, emad_len);
638 skb_reserve(skb, emad_len);
639
640 return skb;
641 }
642
mlxsw_emad_reg_access(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type,struct mlxsw_reg_trans * trans,struct list_head * bulk_list,mlxsw_reg_trans_cb_t * cb,unsigned long cb_priv,u64 tid)643 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,
644 const struct mlxsw_reg_info *reg,
645 char *payload,
646 enum mlxsw_core_reg_access_type type,
647 struct mlxsw_reg_trans *trans,
648 struct list_head *bulk_list,
649 mlxsw_reg_trans_cb_t *cb,
650 unsigned long cb_priv, u64 tid)
651 {
652 struct sk_buff *skb;
653 int err;
654
655 dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
656 tid, reg->id, mlxsw_reg_id_str(reg->id),
657 mlxsw_core_reg_access_type_str(type));
658
659 skb = mlxsw_emad_alloc(mlxsw_core, reg->len);
660 if (!skb)
661 return -ENOMEM;
662
663 list_add_tail(&trans->bulk_list, bulk_list);
664 trans->core = mlxsw_core;
665 trans->tx_skb = skb;
666 trans->tx_info.local_port = MLXSW_PORT_CPU_PORT;
667 trans->tx_info.is_emad = true;
668 INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work);
669 trans->tid = tid;
670 init_completion(&trans->completion);
671 trans->cb = cb;
672 trans->cb_priv = cb_priv;
673 trans->reg = reg;
674 trans->type = type;
675
676 mlxsw_emad_construct(skb, reg, payload, type, trans->tid);
677 mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info);
678
679 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
680 list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list);
681 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
682 err = mlxsw_emad_transmit(mlxsw_core, trans);
683 if (err)
684 goto err_out;
685 return 0;
686
687 err_out:
688 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
689 list_del_rcu(&trans->list);
690 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
691 list_del(&trans->bulk_list);
692 dev_kfree_skb(trans->tx_skb);
693 return err;
694 }
695
696 /*****************
697 * Core functions
698 *****************/
699
mlxsw_core_driver_register(struct mlxsw_driver * mlxsw_driver)700 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
701 {
702 spin_lock(&mlxsw_core_driver_list_lock);
703 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
704 spin_unlock(&mlxsw_core_driver_list_lock);
705 return 0;
706 }
707 EXPORT_SYMBOL(mlxsw_core_driver_register);
708
mlxsw_core_driver_unregister(struct mlxsw_driver * mlxsw_driver)709 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
710 {
711 spin_lock(&mlxsw_core_driver_list_lock);
712 list_del(&mlxsw_driver->list);
713 spin_unlock(&mlxsw_core_driver_list_lock);
714 }
715 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
716
__driver_find(const char * kind)717 static struct mlxsw_driver *__driver_find(const char *kind)
718 {
719 struct mlxsw_driver *mlxsw_driver;
720
721 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
722 if (strcmp(mlxsw_driver->kind, kind) == 0)
723 return mlxsw_driver;
724 }
725 return NULL;
726 }
727
mlxsw_core_driver_get(const char * kind)728 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
729 {
730 struct mlxsw_driver *mlxsw_driver;
731
732 spin_lock(&mlxsw_core_driver_list_lock);
733 mlxsw_driver = __driver_find(kind);
734 spin_unlock(&mlxsw_core_driver_list_lock);
735 return mlxsw_driver;
736 }
737
mlxsw_devlink_port_split(struct devlink * devlink,unsigned int port_index,unsigned int count,struct netlink_ext_ack * extack)738 static int mlxsw_devlink_port_split(struct devlink *devlink,
739 unsigned int port_index,
740 unsigned int count,
741 struct netlink_ext_ack *extack)
742 {
743 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
744
745 if (port_index >= mlxsw_core->max_ports) {
746 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
747 return -EINVAL;
748 }
749 if (!mlxsw_core->driver->port_split)
750 return -EOPNOTSUPP;
751 return mlxsw_core->driver->port_split(mlxsw_core, port_index, count,
752 extack);
753 }
754
mlxsw_devlink_port_unsplit(struct devlink * devlink,unsigned int port_index,struct netlink_ext_ack * extack)755 static int mlxsw_devlink_port_unsplit(struct devlink *devlink,
756 unsigned int port_index,
757 struct netlink_ext_ack *extack)
758 {
759 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
760
761 if (port_index >= mlxsw_core->max_ports) {
762 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
763 return -EINVAL;
764 }
765 if (!mlxsw_core->driver->port_unsplit)
766 return -EOPNOTSUPP;
767 return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index,
768 extack);
769 }
770
771 static int
mlxsw_devlink_sb_pool_get(struct devlink * devlink,unsigned int sb_index,u16 pool_index,struct devlink_sb_pool_info * pool_info)772 mlxsw_devlink_sb_pool_get(struct devlink *devlink,
773 unsigned int sb_index, u16 pool_index,
774 struct devlink_sb_pool_info *pool_info)
775 {
776 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
777 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
778
779 if (!mlxsw_driver->sb_pool_get)
780 return -EOPNOTSUPP;
781 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index,
782 pool_index, pool_info);
783 }
784
785 static int
mlxsw_devlink_sb_pool_set(struct devlink * devlink,unsigned int sb_index,u16 pool_index,u32 size,enum devlink_sb_threshold_type threshold_type)786 mlxsw_devlink_sb_pool_set(struct devlink *devlink,
787 unsigned int sb_index, u16 pool_index, u32 size,
788 enum devlink_sb_threshold_type threshold_type)
789 {
790 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
791 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
792
793 if (!mlxsw_driver->sb_pool_set)
794 return -EOPNOTSUPP;
795 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index,
796 pool_index, size, threshold_type);
797 }
798
__dl_port(struct devlink_port * devlink_port)799 static void *__dl_port(struct devlink_port *devlink_port)
800 {
801 return container_of(devlink_port, struct mlxsw_core_port, devlink_port);
802 }
803
mlxsw_devlink_port_type_set(struct devlink_port * devlink_port,enum devlink_port_type port_type)804 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port,
805 enum devlink_port_type port_type)
806 {
807 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
808 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
809 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
810
811 if (!mlxsw_driver->port_type_set)
812 return -EOPNOTSUPP;
813
814 return mlxsw_driver->port_type_set(mlxsw_core,
815 mlxsw_core_port->local_port,
816 port_type);
817 }
818
mlxsw_devlink_sb_port_pool_get(struct devlink_port * devlink_port,unsigned int sb_index,u16 pool_index,u32 * p_threshold)819 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
820 unsigned int sb_index, u16 pool_index,
821 u32 *p_threshold)
822 {
823 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
824 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
825 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
826
827 if (!mlxsw_driver->sb_port_pool_get ||
828 !mlxsw_core_port_check(mlxsw_core_port))
829 return -EOPNOTSUPP;
830 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index,
831 pool_index, p_threshold);
832 }
833
mlxsw_devlink_sb_port_pool_set(struct devlink_port * devlink_port,unsigned int sb_index,u16 pool_index,u32 threshold)834 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port,
835 unsigned int sb_index, u16 pool_index,
836 u32 threshold)
837 {
838 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
839 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
840 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
841
842 if (!mlxsw_driver->sb_port_pool_set ||
843 !mlxsw_core_port_check(mlxsw_core_port))
844 return -EOPNOTSUPP;
845 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index,
846 pool_index, threshold);
847 }
848
849 static int
mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port * devlink_port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u16 * p_pool_index,u32 * p_threshold)850 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port,
851 unsigned int sb_index, u16 tc_index,
852 enum devlink_sb_pool_type pool_type,
853 u16 *p_pool_index, u32 *p_threshold)
854 {
855 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
856 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
857 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
858
859 if (!mlxsw_driver->sb_tc_pool_bind_get ||
860 !mlxsw_core_port_check(mlxsw_core_port))
861 return -EOPNOTSUPP;
862 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index,
863 tc_index, pool_type,
864 p_pool_index, p_threshold);
865 }
866
867 static int
mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port * devlink_port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u16 pool_index,u32 threshold)868 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port,
869 unsigned int sb_index, u16 tc_index,
870 enum devlink_sb_pool_type pool_type,
871 u16 pool_index, u32 threshold)
872 {
873 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
874 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
875 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
876
877 if (!mlxsw_driver->sb_tc_pool_bind_set ||
878 !mlxsw_core_port_check(mlxsw_core_port))
879 return -EOPNOTSUPP;
880 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index,
881 tc_index, pool_type,
882 pool_index, threshold);
883 }
884
mlxsw_devlink_sb_occ_snapshot(struct devlink * devlink,unsigned int sb_index)885 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink,
886 unsigned int sb_index)
887 {
888 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
889 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
890
891 if (!mlxsw_driver->sb_occ_snapshot)
892 return -EOPNOTSUPP;
893 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index);
894 }
895
mlxsw_devlink_sb_occ_max_clear(struct devlink * devlink,unsigned int sb_index)896 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink,
897 unsigned int sb_index)
898 {
899 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
900 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
901
902 if (!mlxsw_driver->sb_occ_max_clear)
903 return -EOPNOTSUPP;
904 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index);
905 }
906
907 static int
mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port * devlink_port,unsigned int sb_index,u16 pool_index,u32 * p_cur,u32 * p_max)908 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port,
909 unsigned int sb_index, u16 pool_index,
910 u32 *p_cur, u32 *p_max)
911 {
912 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
913 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
914 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
915
916 if (!mlxsw_driver->sb_occ_port_pool_get ||
917 !mlxsw_core_port_check(mlxsw_core_port))
918 return -EOPNOTSUPP;
919 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index,
920 pool_index, p_cur, p_max);
921 }
922
923 static int
mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port * devlink_port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u32 * p_cur,u32 * p_max)924 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port,
925 unsigned int sb_index, u16 tc_index,
926 enum devlink_sb_pool_type pool_type,
927 u32 *p_cur, u32 *p_max)
928 {
929 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
930 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
931 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
932
933 if (!mlxsw_driver->sb_occ_tc_port_bind_get ||
934 !mlxsw_core_port_check(mlxsw_core_port))
935 return -EOPNOTSUPP;
936 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port,
937 sb_index, tc_index,
938 pool_type, p_cur, p_max);
939 }
940
mlxsw_devlink_core_bus_device_reload(struct devlink * devlink,struct netlink_ext_ack * extack)941 static int mlxsw_devlink_core_bus_device_reload(struct devlink *devlink,
942 struct netlink_ext_ack *extack)
943 {
944 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
945 int err;
946
947 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET))
948 return -EOPNOTSUPP;
949
950 mlxsw_core_bus_device_unregister(mlxsw_core, true);
951 err = mlxsw_core_bus_device_register(mlxsw_core->bus_info,
952 mlxsw_core->bus,
953 mlxsw_core->bus_priv, true,
954 devlink);
955 mlxsw_core->reload_fail = !!err;
956
957 return err;
958 }
959
960 static const struct devlink_ops mlxsw_devlink_ops = {
961 .reload = mlxsw_devlink_core_bus_device_reload,
962 .port_type_set = mlxsw_devlink_port_type_set,
963 .port_split = mlxsw_devlink_port_split,
964 .port_unsplit = mlxsw_devlink_port_unsplit,
965 .sb_pool_get = mlxsw_devlink_sb_pool_get,
966 .sb_pool_set = mlxsw_devlink_sb_pool_set,
967 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get,
968 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set,
969 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get,
970 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set,
971 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot,
972 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear,
973 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get,
974 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get,
975 };
976
mlxsw_core_bus_device_register(const struct mlxsw_bus_info * mlxsw_bus_info,const struct mlxsw_bus * mlxsw_bus,void * bus_priv,bool reload,struct devlink * devlink)977 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
978 const struct mlxsw_bus *mlxsw_bus,
979 void *bus_priv, bool reload,
980 struct devlink *devlink)
981 {
982 const char *device_kind = mlxsw_bus_info->device_kind;
983 struct mlxsw_core *mlxsw_core;
984 struct mlxsw_driver *mlxsw_driver;
985 struct mlxsw_res *res;
986 size_t alloc_size;
987 int err;
988
989 mlxsw_driver = mlxsw_core_driver_get(device_kind);
990 if (!mlxsw_driver)
991 return -EINVAL;
992
993 if (!reload) {
994 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
995 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size);
996 if (!devlink) {
997 err = -ENOMEM;
998 goto err_devlink_alloc;
999 }
1000 }
1001
1002 mlxsw_core = devlink_priv(devlink);
1003 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
1004 INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
1005 mlxsw_core->driver = mlxsw_driver;
1006 mlxsw_core->bus = mlxsw_bus;
1007 mlxsw_core->bus_priv = bus_priv;
1008 mlxsw_core->bus_info = mlxsw_bus_info;
1009
1010 res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL;
1011 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res);
1012 if (err)
1013 goto err_bus_init;
1014
1015 if (mlxsw_driver->resources_register && !reload) {
1016 err = mlxsw_driver->resources_register(mlxsw_core);
1017 if (err)
1018 goto err_register_resources;
1019 }
1020
1021 err = mlxsw_ports_init(mlxsw_core);
1022 if (err)
1023 goto err_ports_init;
1024
1025 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) &&
1026 MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) {
1027 alloc_size = sizeof(u8) *
1028 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) *
1029 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS);
1030 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
1031 if (!mlxsw_core->lag.mapping) {
1032 err = -ENOMEM;
1033 goto err_alloc_lag_mapping;
1034 }
1035 }
1036
1037 err = mlxsw_emad_init(mlxsw_core);
1038 if (err)
1039 goto err_emad_init;
1040
1041 if (!reload) {
1042 err = devlink_register(devlink, mlxsw_bus_info->dev);
1043 if (err)
1044 goto err_devlink_register;
1045 }
1046
1047 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
1048 if (err)
1049 goto err_hwmon_init;
1050
1051 err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info,
1052 &mlxsw_core->thermal);
1053 if (err)
1054 goto err_thermal_init;
1055
1056 if (mlxsw_driver->init) {
1057 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info);
1058 if (err)
1059 goto err_driver_init;
1060 }
1061
1062 return 0;
1063
1064 err_driver_init:
1065 mlxsw_thermal_fini(mlxsw_core->thermal);
1066 err_thermal_init:
1067 mlxsw_hwmon_fini(mlxsw_core->hwmon);
1068 err_hwmon_init:
1069 if (!reload)
1070 devlink_unregister(devlink);
1071 err_devlink_register:
1072 mlxsw_emad_fini(mlxsw_core);
1073 err_emad_init:
1074 kfree(mlxsw_core->lag.mapping);
1075 err_alloc_lag_mapping:
1076 mlxsw_ports_fini(mlxsw_core);
1077 err_ports_init:
1078 if (!reload)
1079 devlink_resources_unregister(devlink, NULL);
1080 err_register_resources:
1081 mlxsw_bus->fini(bus_priv);
1082 err_bus_init:
1083 if (!reload)
1084 devlink_free(devlink);
1085 err_devlink_alloc:
1086 return err;
1087 }
1088 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
1089
mlxsw_core_bus_device_unregister(struct mlxsw_core * mlxsw_core,bool reload)1090 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core,
1091 bool reload)
1092 {
1093 struct devlink *devlink = priv_to_devlink(mlxsw_core);
1094
1095 if (mlxsw_core->reload_fail) {
1096 if (!reload)
1097 /* Only the parts that were not de-initialized in the
1098 * failed reload attempt need to be de-initialized.
1099 */
1100 goto reload_fail_deinit;
1101 else
1102 return;
1103 }
1104
1105 if (mlxsw_core->driver->fini)
1106 mlxsw_core->driver->fini(mlxsw_core);
1107 mlxsw_thermal_fini(mlxsw_core->thermal);
1108 mlxsw_hwmon_fini(mlxsw_core->hwmon);
1109 if (!reload)
1110 devlink_unregister(devlink);
1111 mlxsw_emad_fini(mlxsw_core);
1112 kfree(mlxsw_core->lag.mapping);
1113 mlxsw_ports_fini(mlxsw_core);
1114 if (!reload)
1115 devlink_resources_unregister(devlink, NULL);
1116 mlxsw_core->bus->fini(mlxsw_core->bus_priv);
1117 if (!reload)
1118 devlink_free(devlink);
1119
1120 return;
1121
1122 reload_fail_deinit:
1123 devlink_unregister(devlink);
1124 devlink_resources_unregister(devlink, NULL);
1125 devlink_free(devlink);
1126 }
1127 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
1128
mlxsw_core_skb_transmit_busy(struct mlxsw_core * mlxsw_core,const struct mlxsw_tx_info * tx_info)1129 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
1130 const struct mlxsw_tx_info *tx_info)
1131 {
1132 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
1133 tx_info);
1134 }
1135 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
1136
mlxsw_core_skb_transmit(struct mlxsw_core * mlxsw_core,struct sk_buff * skb,const struct mlxsw_tx_info * tx_info)1137 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1138 const struct mlxsw_tx_info *tx_info)
1139 {
1140 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
1141 tx_info);
1142 }
1143 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
1144
__is_rx_listener_equal(const struct mlxsw_rx_listener * rxl_a,const struct mlxsw_rx_listener * rxl_b)1145 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
1146 const struct mlxsw_rx_listener *rxl_b)
1147 {
1148 return (rxl_a->func == rxl_b->func &&
1149 rxl_a->local_port == rxl_b->local_port &&
1150 rxl_a->trap_id == rxl_b->trap_id);
1151 }
1152
1153 static struct mlxsw_rx_listener_item *
__find_rx_listener_item(struct mlxsw_core * mlxsw_core,const struct mlxsw_rx_listener * rxl,void * priv)1154 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
1155 const struct mlxsw_rx_listener *rxl,
1156 void *priv)
1157 {
1158 struct mlxsw_rx_listener_item *rxl_item;
1159
1160 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
1161 if (__is_rx_listener_equal(&rxl_item->rxl, rxl) &&
1162 rxl_item->priv == priv)
1163 return rxl_item;
1164 }
1165 return NULL;
1166 }
1167
mlxsw_core_rx_listener_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_rx_listener * rxl,void * priv)1168 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
1169 const struct mlxsw_rx_listener *rxl,
1170 void *priv)
1171 {
1172 struct mlxsw_rx_listener_item *rxl_item;
1173
1174 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1175 if (rxl_item)
1176 return -EEXIST;
1177 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
1178 if (!rxl_item)
1179 return -ENOMEM;
1180 rxl_item->rxl = *rxl;
1181 rxl_item->priv = priv;
1182
1183 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
1184 return 0;
1185 }
1186 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
1187
mlxsw_core_rx_listener_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_rx_listener * rxl,void * priv)1188 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
1189 const struct mlxsw_rx_listener *rxl,
1190 void *priv)
1191 {
1192 struct mlxsw_rx_listener_item *rxl_item;
1193
1194 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1195 if (!rxl_item)
1196 return;
1197 list_del_rcu(&rxl_item->list);
1198 synchronize_rcu();
1199 kfree(rxl_item);
1200 }
1201 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
1202
mlxsw_core_event_listener_func(struct sk_buff * skb,u8 local_port,void * priv)1203 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
1204 void *priv)
1205 {
1206 struct mlxsw_event_listener_item *event_listener_item = priv;
1207 struct mlxsw_reg_info reg;
1208 char *payload;
1209 char *op_tlv = mlxsw_emad_op_tlv(skb);
1210 char *reg_tlv = mlxsw_emad_reg_tlv(skb);
1211
1212 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
1213 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
1214 payload = mlxsw_emad_reg_payload(op_tlv);
1215 event_listener_item->el.func(®, payload, event_listener_item->priv);
1216 dev_kfree_skb(skb);
1217 }
1218
__is_event_listener_equal(const struct mlxsw_event_listener * el_a,const struct mlxsw_event_listener * el_b)1219 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
1220 const struct mlxsw_event_listener *el_b)
1221 {
1222 return (el_a->func == el_b->func &&
1223 el_a->trap_id == el_b->trap_id);
1224 }
1225
1226 static struct mlxsw_event_listener_item *
__find_event_listener_item(struct mlxsw_core * mlxsw_core,const struct mlxsw_event_listener * el,void * priv)1227 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
1228 const struct mlxsw_event_listener *el,
1229 void *priv)
1230 {
1231 struct mlxsw_event_listener_item *el_item;
1232
1233 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
1234 if (__is_event_listener_equal(&el_item->el, el) &&
1235 el_item->priv == priv)
1236 return el_item;
1237 }
1238 return NULL;
1239 }
1240
mlxsw_core_event_listener_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_event_listener * el,void * priv)1241 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
1242 const struct mlxsw_event_listener *el,
1243 void *priv)
1244 {
1245 int err;
1246 struct mlxsw_event_listener_item *el_item;
1247 const struct mlxsw_rx_listener rxl = {
1248 .func = mlxsw_core_event_listener_func,
1249 .local_port = MLXSW_PORT_DONT_CARE,
1250 .trap_id = el->trap_id,
1251 };
1252
1253 el_item = __find_event_listener_item(mlxsw_core, el, priv);
1254 if (el_item)
1255 return -EEXIST;
1256 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
1257 if (!el_item)
1258 return -ENOMEM;
1259 el_item->el = *el;
1260 el_item->priv = priv;
1261
1262 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item);
1263 if (err)
1264 goto err_rx_listener_register;
1265
1266 /* No reason to save item if we did not manage to register an RX
1267 * listener for it.
1268 */
1269 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
1270
1271 return 0;
1272
1273 err_rx_listener_register:
1274 kfree(el_item);
1275 return err;
1276 }
1277 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
1278
mlxsw_core_event_listener_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_event_listener * el,void * priv)1279 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
1280 const struct mlxsw_event_listener *el,
1281 void *priv)
1282 {
1283 struct mlxsw_event_listener_item *el_item;
1284 const struct mlxsw_rx_listener rxl = {
1285 .func = mlxsw_core_event_listener_func,
1286 .local_port = MLXSW_PORT_DONT_CARE,
1287 .trap_id = el->trap_id,
1288 };
1289
1290 el_item = __find_event_listener_item(mlxsw_core, el, priv);
1291 if (!el_item)
1292 return;
1293 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item);
1294 list_del(&el_item->list);
1295 kfree(el_item);
1296 }
1297 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
1298
mlxsw_core_listener_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,void * priv)1299 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core,
1300 const struct mlxsw_listener *listener,
1301 void *priv)
1302 {
1303 if (listener->is_event)
1304 return mlxsw_core_event_listener_register(mlxsw_core,
1305 &listener->u.event_listener,
1306 priv);
1307 else
1308 return mlxsw_core_rx_listener_register(mlxsw_core,
1309 &listener->u.rx_listener,
1310 priv);
1311 }
1312
mlxsw_core_listener_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,void * priv)1313 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core,
1314 const struct mlxsw_listener *listener,
1315 void *priv)
1316 {
1317 if (listener->is_event)
1318 mlxsw_core_event_listener_unregister(mlxsw_core,
1319 &listener->u.event_listener,
1320 priv);
1321 else
1322 mlxsw_core_rx_listener_unregister(mlxsw_core,
1323 &listener->u.rx_listener,
1324 priv);
1325 }
1326
mlxsw_core_trap_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,void * priv)1327 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
1328 const struct mlxsw_listener *listener, void *priv)
1329 {
1330 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1331 int err;
1332
1333 err = mlxsw_core_listener_register(mlxsw_core, listener, priv);
1334 if (err)
1335 return err;
1336
1337 mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id,
1338 listener->trap_group, listener->is_ctrl);
1339 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
1340 if (err)
1341 goto err_trap_set;
1342
1343 return 0;
1344
1345 err_trap_set:
1346 mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
1347 return err;
1348 }
1349 EXPORT_SYMBOL(mlxsw_core_trap_register);
1350
mlxsw_core_trap_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,void * priv)1351 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
1352 const struct mlxsw_listener *listener,
1353 void *priv)
1354 {
1355 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1356
1357 if (!listener->is_event) {
1358 mlxsw_reg_hpkt_pack(hpkt_pl, listener->unreg_action,
1359 listener->trap_id, listener->trap_group,
1360 listener->is_ctrl);
1361 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
1362 }
1363
1364 mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
1365 }
1366 EXPORT_SYMBOL(mlxsw_core_trap_unregister);
1367
mlxsw_core_tid_get(struct mlxsw_core * mlxsw_core)1368 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core)
1369 {
1370 return atomic64_inc_return(&mlxsw_core->emad.tid);
1371 }
1372
mlxsw_core_reg_access_emad(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type,struct list_head * bulk_list,mlxsw_reg_trans_cb_t * cb,unsigned long cb_priv)1373 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
1374 const struct mlxsw_reg_info *reg,
1375 char *payload,
1376 enum mlxsw_core_reg_access_type type,
1377 struct list_head *bulk_list,
1378 mlxsw_reg_trans_cb_t *cb,
1379 unsigned long cb_priv)
1380 {
1381 u64 tid = mlxsw_core_tid_get(mlxsw_core);
1382 struct mlxsw_reg_trans *trans;
1383 int err;
1384
1385 trans = kzalloc(sizeof(*trans), GFP_KERNEL);
1386 if (!trans)
1387 return -ENOMEM;
1388
1389 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,
1390 bulk_list, cb, cb_priv, tid);
1391 if (err) {
1392 kfree_rcu(trans, rcu);
1393 return err;
1394 }
1395 return 0;
1396 }
1397
mlxsw_reg_trans_query(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,struct list_head * bulk_list,mlxsw_reg_trans_cb_t * cb,unsigned long cb_priv)1398 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
1399 const struct mlxsw_reg_info *reg, char *payload,
1400 struct list_head *bulk_list,
1401 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1402 {
1403 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1404 MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
1405 bulk_list, cb, cb_priv);
1406 }
1407 EXPORT_SYMBOL(mlxsw_reg_trans_query);
1408
mlxsw_reg_trans_write(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,struct list_head * bulk_list,mlxsw_reg_trans_cb_t * cb,unsigned long cb_priv)1409 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
1410 const struct mlxsw_reg_info *reg, char *payload,
1411 struct list_head *bulk_list,
1412 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1413 {
1414 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1415 MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
1416 bulk_list, cb, cb_priv);
1417 }
1418 EXPORT_SYMBOL(mlxsw_reg_trans_write);
1419
mlxsw_reg_trans_wait(struct mlxsw_reg_trans * trans)1420 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans)
1421 {
1422 struct mlxsw_core *mlxsw_core = trans->core;
1423 int err;
1424
1425 wait_for_completion(&trans->completion);
1426 cancel_delayed_work_sync(&trans->timeout_dw);
1427 err = trans->err;
1428
1429 if (trans->retries)
1430 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n",
1431 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid);
1432 if (err)
1433 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n",
1434 trans->tid, trans->reg->id,
1435 mlxsw_reg_id_str(trans->reg->id),
1436 mlxsw_core_reg_access_type_str(trans->type),
1437 trans->emad_status,
1438 mlxsw_emad_op_tlv_status_str(trans->emad_status));
1439
1440 list_del(&trans->bulk_list);
1441 kfree_rcu(trans, rcu);
1442 return err;
1443 }
1444
mlxsw_reg_trans_bulk_wait(struct list_head * bulk_list)1445 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list)
1446 {
1447 struct mlxsw_reg_trans *trans;
1448 struct mlxsw_reg_trans *tmp;
1449 int sum_err = 0;
1450 int err;
1451
1452 list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) {
1453 err = mlxsw_reg_trans_wait(trans);
1454 if (err && sum_err == 0)
1455 sum_err = err; /* first error to be returned */
1456 }
1457 return sum_err;
1458 }
1459 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait);
1460
mlxsw_core_reg_access_cmd(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type)1461 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
1462 const struct mlxsw_reg_info *reg,
1463 char *payload,
1464 enum mlxsw_core_reg_access_type type)
1465 {
1466 enum mlxsw_emad_op_tlv_status status;
1467 int err, n_retry;
1468 bool reset_ok;
1469 char *in_mbox, *out_mbox, *tmp;
1470
1471 dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n",
1472 reg->id, mlxsw_reg_id_str(reg->id),
1473 mlxsw_core_reg_access_type_str(type));
1474
1475 in_mbox = mlxsw_cmd_mbox_alloc();
1476 if (!in_mbox)
1477 return -ENOMEM;
1478
1479 out_mbox = mlxsw_cmd_mbox_alloc();
1480 if (!out_mbox) {
1481 err = -ENOMEM;
1482 goto free_in_mbox;
1483 }
1484
1485 mlxsw_emad_pack_op_tlv(in_mbox, reg, type,
1486 mlxsw_core_tid_get(mlxsw_core));
1487 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
1488 mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
1489
1490 /* There is a special treatment needed for MRSR (reset) register.
1491 * The command interface will return error after the command
1492 * is executed, so tell the lower layer to expect it
1493 * and cope accordingly.
1494 */
1495 reset_ok = reg->id == MLXSW_REG_MRSR_ID;
1496
1497 n_retry = 0;
1498 retry:
1499 err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox);
1500 if (!err) {
1501 err = mlxsw_emad_process_status(out_mbox, &status);
1502 if (err) {
1503 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
1504 goto retry;
1505 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n",
1506 status, mlxsw_emad_op_tlv_status_str(status));
1507 }
1508 }
1509
1510 if (!err)
1511 memcpy(payload, mlxsw_emad_reg_payload(out_mbox),
1512 reg->len);
1513
1514 mlxsw_cmd_mbox_free(out_mbox);
1515 free_in_mbox:
1516 mlxsw_cmd_mbox_free(in_mbox);
1517 if (err)
1518 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n",
1519 reg->id, mlxsw_reg_id_str(reg->id),
1520 mlxsw_core_reg_access_type_str(type));
1521 return err;
1522 }
1523
mlxsw_core_reg_access_cb(struct mlxsw_core * mlxsw_core,char * payload,size_t payload_len,unsigned long cb_priv)1524 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core,
1525 char *payload, size_t payload_len,
1526 unsigned long cb_priv)
1527 {
1528 char *orig_payload = (char *) cb_priv;
1529
1530 memcpy(orig_payload, payload, payload_len);
1531 }
1532
mlxsw_core_reg_access(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type)1533 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
1534 const struct mlxsw_reg_info *reg,
1535 char *payload,
1536 enum mlxsw_core_reg_access_type type)
1537 {
1538 LIST_HEAD(bulk_list);
1539 int err;
1540
1541 /* During initialization EMAD interface is not available to us,
1542 * so we default to command interface. We switch to EMAD interface
1543 * after setting the appropriate traps.
1544 */
1545 if (!mlxsw_core->emad.use_emad)
1546 return mlxsw_core_reg_access_cmd(mlxsw_core, reg,
1547 payload, type);
1548
1549 err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
1550 payload, type, &bulk_list,
1551 mlxsw_core_reg_access_cb,
1552 (unsigned long) payload);
1553 if (err)
1554 return err;
1555 return mlxsw_reg_trans_bulk_wait(&bulk_list);
1556 }
1557
mlxsw_reg_query(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload)1558 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
1559 const struct mlxsw_reg_info *reg, char *payload)
1560 {
1561 return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1562 MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
1563 }
1564 EXPORT_SYMBOL(mlxsw_reg_query);
1565
mlxsw_reg_write(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload)1566 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
1567 const struct mlxsw_reg_info *reg, char *payload)
1568 {
1569 return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1570 MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
1571 }
1572 EXPORT_SYMBOL(mlxsw_reg_write);
1573
mlxsw_core_skb_receive(struct mlxsw_core * mlxsw_core,struct sk_buff * skb,struct mlxsw_rx_info * rx_info)1574 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1575 struct mlxsw_rx_info *rx_info)
1576 {
1577 struct mlxsw_rx_listener_item *rxl_item;
1578 const struct mlxsw_rx_listener *rxl;
1579 u8 local_port;
1580 bool found = false;
1581
1582 if (rx_info->is_lag) {
1583 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
1584 __func__, rx_info->u.lag_id,
1585 rx_info->trap_id);
1586 /* Upper layer does not care if the skb came from LAG or not,
1587 * so just get the local_port for the lag port and push it up.
1588 */
1589 local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
1590 rx_info->u.lag_id,
1591 rx_info->lag_port_index);
1592 } else {
1593 local_port = rx_info->u.sys_port;
1594 }
1595
1596 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
1597 __func__, local_port, rx_info->trap_id);
1598
1599 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
1600 (local_port >= mlxsw_core->max_ports))
1601 goto drop;
1602
1603 rcu_read_lock();
1604 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
1605 rxl = &rxl_item->rxl;
1606 if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
1607 rxl->local_port == local_port) &&
1608 rxl->trap_id == rx_info->trap_id) {
1609 found = true;
1610 break;
1611 }
1612 }
1613 if (!found) {
1614 rcu_read_unlock();
1615 goto drop;
1616 }
1617
1618 rxl->func(skb, local_port, rxl_item->priv);
1619 rcu_read_unlock();
1620 return;
1621
1622 drop:
1623 dev_kfree_skb(skb);
1624 }
1625 EXPORT_SYMBOL(mlxsw_core_skb_receive);
1626
mlxsw_core_lag_mapping_index(struct mlxsw_core * mlxsw_core,u16 lag_id,u8 port_index)1627 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
1628 u16 lag_id, u8 port_index)
1629 {
1630 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id +
1631 port_index;
1632 }
1633
mlxsw_core_lag_mapping_set(struct mlxsw_core * mlxsw_core,u16 lag_id,u8 port_index,u8 local_port)1634 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
1635 u16 lag_id, u8 port_index, u8 local_port)
1636 {
1637 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1638 lag_id, port_index);
1639
1640 mlxsw_core->lag.mapping[index] = local_port;
1641 }
1642 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
1643
mlxsw_core_lag_mapping_get(struct mlxsw_core * mlxsw_core,u16 lag_id,u8 port_index)1644 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
1645 u16 lag_id, u8 port_index)
1646 {
1647 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1648 lag_id, port_index);
1649
1650 return mlxsw_core->lag.mapping[index];
1651 }
1652 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
1653
mlxsw_core_lag_mapping_clear(struct mlxsw_core * mlxsw_core,u16 lag_id,u8 local_port)1654 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
1655 u16 lag_id, u8 local_port)
1656 {
1657 int i;
1658
1659 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) {
1660 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1661 lag_id, i);
1662
1663 if (mlxsw_core->lag.mapping[index] == local_port)
1664 mlxsw_core->lag.mapping[index] = 0;
1665 }
1666 }
1667 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
1668
mlxsw_core_res_valid(struct mlxsw_core * mlxsw_core,enum mlxsw_res_id res_id)1669 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
1670 enum mlxsw_res_id res_id)
1671 {
1672 return mlxsw_res_valid(&mlxsw_core->res, res_id);
1673 }
1674 EXPORT_SYMBOL(mlxsw_core_res_valid);
1675
mlxsw_core_res_get(struct mlxsw_core * mlxsw_core,enum mlxsw_res_id res_id)1676 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
1677 enum mlxsw_res_id res_id)
1678 {
1679 return mlxsw_res_get(&mlxsw_core->res, res_id);
1680 }
1681 EXPORT_SYMBOL(mlxsw_core_res_get);
1682
mlxsw_core_port_init(struct mlxsw_core * mlxsw_core,u8 local_port)1683 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port)
1684 {
1685 struct devlink *devlink = priv_to_devlink(mlxsw_core);
1686 struct mlxsw_core_port *mlxsw_core_port =
1687 &mlxsw_core->ports[local_port];
1688 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1689 int err;
1690
1691 mlxsw_core_port->local_port = local_port;
1692 err = devlink_port_register(devlink, devlink_port, local_port);
1693 if (err)
1694 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
1695 return err;
1696 }
1697 EXPORT_SYMBOL(mlxsw_core_port_init);
1698
mlxsw_core_port_fini(struct mlxsw_core * mlxsw_core,u8 local_port)1699 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
1700 {
1701 struct mlxsw_core_port *mlxsw_core_port =
1702 &mlxsw_core->ports[local_port];
1703 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1704
1705 devlink_port_unregister(devlink_port);
1706 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
1707 }
1708 EXPORT_SYMBOL(mlxsw_core_port_fini);
1709
mlxsw_core_port_eth_set(struct mlxsw_core * mlxsw_core,u8 local_port,void * port_driver_priv,struct net_device * dev,u32 port_number,bool split,u32 split_port_subnumber)1710 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
1711 void *port_driver_priv, struct net_device *dev,
1712 u32 port_number, bool split,
1713 u32 split_port_subnumber)
1714 {
1715 struct mlxsw_core_port *mlxsw_core_port =
1716 &mlxsw_core->ports[local_port];
1717 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1718
1719 mlxsw_core_port->port_driver_priv = port_driver_priv;
1720 devlink_port_attrs_set(devlink_port, DEVLINK_PORT_FLAVOUR_PHYSICAL,
1721 port_number, split, split_port_subnumber);
1722 devlink_port_type_eth_set(devlink_port, dev);
1723 }
1724 EXPORT_SYMBOL(mlxsw_core_port_eth_set);
1725
mlxsw_core_port_ib_set(struct mlxsw_core * mlxsw_core,u8 local_port,void * port_driver_priv)1726 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
1727 void *port_driver_priv)
1728 {
1729 struct mlxsw_core_port *mlxsw_core_port =
1730 &mlxsw_core->ports[local_port];
1731 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1732
1733 mlxsw_core_port->port_driver_priv = port_driver_priv;
1734 devlink_port_type_ib_set(devlink_port, NULL);
1735 }
1736 EXPORT_SYMBOL(mlxsw_core_port_ib_set);
1737
mlxsw_core_port_clear(struct mlxsw_core * mlxsw_core,u8 local_port,void * port_driver_priv)1738 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
1739 void *port_driver_priv)
1740 {
1741 struct mlxsw_core_port *mlxsw_core_port =
1742 &mlxsw_core->ports[local_port];
1743 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1744
1745 mlxsw_core_port->port_driver_priv = port_driver_priv;
1746 devlink_port_type_clear(devlink_port);
1747 }
1748 EXPORT_SYMBOL(mlxsw_core_port_clear);
1749
mlxsw_core_port_type_get(struct mlxsw_core * mlxsw_core,u8 local_port)1750 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
1751 u8 local_port)
1752 {
1753 struct mlxsw_core_port *mlxsw_core_port =
1754 &mlxsw_core->ports[local_port];
1755 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1756
1757 return devlink_port->type;
1758 }
1759 EXPORT_SYMBOL(mlxsw_core_port_type_get);
1760
mlxsw_core_port_get_phys_port_name(struct mlxsw_core * mlxsw_core,u8 local_port,char * name,size_t len)1761 int mlxsw_core_port_get_phys_port_name(struct mlxsw_core *mlxsw_core,
1762 u8 local_port, char *name, size_t len)
1763 {
1764 struct mlxsw_core_port *mlxsw_core_port =
1765 &mlxsw_core->ports[local_port];
1766 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1767
1768 return devlink_port_get_phys_port_name(devlink_port, name, len);
1769 }
1770 EXPORT_SYMBOL(mlxsw_core_port_get_phys_port_name);
1771
mlxsw_core_buf_dump_dbg(struct mlxsw_core * mlxsw_core,const char * buf,size_t size)1772 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
1773 const char *buf, size_t size)
1774 {
1775 __be32 *m = (__be32 *) buf;
1776 int i;
1777 int count = size / sizeof(__be32);
1778
1779 for (i = count - 1; i >= 0; i--)
1780 if (m[i])
1781 break;
1782 i++;
1783 count = i ? i : 1;
1784 for (i = 0; i < count; i += 4)
1785 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
1786 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
1787 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
1788 }
1789
mlxsw_cmd_exec(struct mlxsw_core * mlxsw_core,u16 opcode,u8 opcode_mod,u32 in_mod,bool out_mbox_direct,bool reset_ok,char * in_mbox,size_t in_mbox_size,char * out_mbox,size_t out_mbox_size)1790 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
1791 u32 in_mod, bool out_mbox_direct, bool reset_ok,
1792 char *in_mbox, size_t in_mbox_size,
1793 char *out_mbox, size_t out_mbox_size)
1794 {
1795 u8 status;
1796 int err;
1797
1798 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
1799 if (!mlxsw_core->bus->cmd_exec)
1800 return -EOPNOTSUPP;
1801
1802 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1803 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
1804 if (in_mbox) {
1805 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
1806 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
1807 }
1808
1809 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
1810 opcode_mod, in_mod, out_mbox_direct,
1811 in_mbox, in_mbox_size,
1812 out_mbox, out_mbox_size, &status);
1813
1814 if (!err && out_mbox) {
1815 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
1816 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
1817 }
1818
1819 if (reset_ok && err == -EIO &&
1820 status == MLXSW_CMD_STATUS_RUNNING_RESET) {
1821 err = 0;
1822 } else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
1823 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
1824 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1825 in_mod, status, mlxsw_cmd_status_str(status));
1826 } else if (err == -ETIMEDOUT) {
1827 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1828 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1829 in_mod);
1830 }
1831
1832 return err;
1833 }
1834 EXPORT_SYMBOL(mlxsw_cmd_exec);
1835
mlxsw_core_schedule_dw(struct delayed_work * dwork,unsigned long delay)1836 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay)
1837 {
1838 return queue_delayed_work(mlxsw_wq, dwork, delay);
1839 }
1840 EXPORT_SYMBOL(mlxsw_core_schedule_dw);
1841
mlxsw_core_schedule_work(struct work_struct * work)1842 bool mlxsw_core_schedule_work(struct work_struct *work)
1843 {
1844 return queue_work(mlxsw_owq, work);
1845 }
1846 EXPORT_SYMBOL(mlxsw_core_schedule_work);
1847
mlxsw_core_flush_owq(void)1848 void mlxsw_core_flush_owq(void)
1849 {
1850 flush_workqueue(mlxsw_owq);
1851 }
1852 EXPORT_SYMBOL(mlxsw_core_flush_owq);
1853
mlxsw_core_kvd_sizes_get(struct mlxsw_core * mlxsw_core,const struct mlxsw_config_profile * profile,u64 * p_single_size,u64 * p_double_size,u64 * p_linear_size)1854 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
1855 const struct mlxsw_config_profile *profile,
1856 u64 *p_single_size, u64 *p_double_size,
1857 u64 *p_linear_size)
1858 {
1859 struct mlxsw_driver *driver = mlxsw_core->driver;
1860
1861 if (!driver->kvd_sizes_get)
1862 return -EINVAL;
1863
1864 return driver->kvd_sizes_get(mlxsw_core, profile,
1865 p_single_size, p_double_size,
1866 p_linear_size);
1867 }
1868 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get);
1869
mlxsw_core_fw_flash_start(struct mlxsw_core * mlxsw_core)1870 void mlxsw_core_fw_flash_start(struct mlxsw_core *mlxsw_core)
1871 {
1872 mlxsw_core->fw_flash_in_progress = true;
1873 }
1874 EXPORT_SYMBOL(mlxsw_core_fw_flash_start);
1875
mlxsw_core_fw_flash_end(struct mlxsw_core * mlxsw_core)1876 void mlxsw_core_fw_flash_end(struct mlxsw_core *mlxsw_core)
1877 {
1878 mlxsw_core->fw_flash_in_progress = false;
1879 }
1880 EXPORT_SYMBOL(mlxsw_core_fw_flash_end);
1881
mlxsw_core_module_init(void)1882 static int __init mlxsw_core_module_init(void)
1883 {
1884 int err;
1885
1886 mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0);
1887 if (!mlxsw_wq)
1888 return -ENOMEM;
1889 mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0,
1890 mlxsw_core_driver_name);
1891 if (!mlxsw_owq) {
1892 err = -ENOMEM;
1893 goto err_alloc_ordered_workqueue;
1894 }
1895 return 0;
1896
1897 err_alloc_ordered_workqueue:
1898 destroy_workqueue(mlxsw_wq);
1899 return err;
1900 }
1901
mlxsw_core_module_exit(void)1902 static void __exit mlxsw_core_module_exit(void)
1903 {
1904 destroy_workqueue(mlxsw_owq);
1905 destroy_workqueue(mlxsw_wq);
1906 }
1907
1908 module_init(mlxsw_core_module_init);
1909 module_exit(mlxsw_core_module_exit);
1910
1911 MODULE_LICENSE("Dual BSD/GPL");
1912 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
1913 MODULE_DESCRIPTION("Mellanox switch device core driver");
1914