1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * 8250_lpss.c - Driver for UART on Intel Braswell and various other Intel SoCs
4 *
5 * Copyright (C) 2016 Intel Corporation
6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 */
8
9 #include <linux/bitops.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/rational.h>
13
14 #include <linux/dmaengine.h>
15 #include <linux/dma/dw.h>
16
17 #include "8250.h"
18
19 #define PCI_DEVICE_ID_INTEL_QRK_UARTx 0x0936
20
21 #define PCI_DEVICE_ID_INTEL_BYT_UART1 0x0f0a
22 #define PCI_DEVICE_ID_INTEL_BYT_UART2 0x0f0c
23
24 #define PCI_DEVICE_ID_INTEL_BSW_UART1 0x228a
25 #define PCI_DEVICE_ID_INTEL_BSW_UART2 0x228c
26
27 #define PCI_DEVICE_ID_INTEL_BDW_UART1 0x9ce3
28 #define PCI_DEVICE_ID_INTEL_BDW_UART2 0x9ce4
29
30 /* Intel LPSS specific registers */
31
32 #define BYT_PRV_CLK 0x800
33 #define BYT_PRV_CLK_EN BIT(0)
34 #define BYT_PRV_CLK_M_VAL_SHIFT 1
35 #define BYT_PRV_CLK_N_VAL_SHIFT 16
36 #define BYT_PRV_CLK_UPDATE BIT(31)
37
38 #define BYT_TX_OVF_INT 0x820
39 #define BYT_TX_OVF_INT_MASK BIT(1)
40
41 struct lpss8250;
42
43 struct lpss8250_board {
44 unsigned long freq;
45 unsigned int base_baud;
46 int (*setup)(struct lpss8250 *, struct uart_port *p);
47 void (*exit)(struct lpss8250 *);
48 };
49
50 struct lpss8250 {
51 int line;
52 struct lpss8250_board *board;
53
54 /* DMA parameters */
55 struct uart_8250_dma dma;
56 struct dw_dma_chip dma_chip;
57 struct dw_dma_slave dma_param;
58 u8 dma_maxburst;
59 };
60
byt_set_termios(struct uart_port * p,struct ktermios * termios,struct ktermios * old)61 static void byt_set_termios(struct uart_port *p, struct ktermios *termios,
62 struct ktermios *old)
63 {
64 unsigned int baud = tty_termios_baud_rate(termios);
65 struct lpss8250 *lpss = p->private_data;
66 unsigned long fref = lpss->board->freq, fuart = baud * 16;
67 unsigned long w = BIT(15) - 1;
68 unsigned long m, n;
69 u32 reg;
70
71 /* Gracefully handle the B0 case: fall back to B9600 */
72 fuart = fuart ? fuart : 9600 * 16;
73
74 /* Get Fuart closer to Fref */
75 fuart *= rounddown_pow_of_two(fref / fuart);
76
77 /*
78 * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the
79 * dividers must be adjusted.
80 *
81 * uartclk = (m / n) * 100 MHz, where m <= n
82 */
83 rational_best_approximation(fuart, fref, w, w, &m, &n);
84 p->uartclk = fuart;
85
86 /* Reset the clock */
87 reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT);
88 writel(reg, p->membase + BYT_PRV_CLK);
89 reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE;
90 writel(reg, p->membase + BYT_PRV_CLK);
91
92 p->status &= ~UPSTAT_AUTOCTS;
93 if (termios->c_cflag & CRTSCTS)
94 p->status |= UPSTAT_AUTOCTS;
95
96 serial8250_do_set_termios(p, termios, old);
97 }
98
byt_get_mctrl(struct uart_port * port)99 static unsigned int byt_get_mctrl(struct uart_port *port)
100 {
101 unsigned int ret = serial8250_do_get_mctrl(port);
102
103 /* Force DCD and DSR signals to permanently be reported as active */
104 ret |= TIOCM_CAR | TIOCM_DSR;
105
106 return ret;
107 }
108
byt_serial_setup(struct lpss8250 * lpss,struct uart_port * port)109 static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
110 {
111 struct dw_dma_slave *param = &lpss->dma_param;
112 struct uart_8250_port *up = up_to_u8250p(port);
113 struct pci_dev *pdev = to_pci_dev(port->dev);
114 unsigned int dma_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
115 struct pci_dev *dma_dev = pci_get_slot(pdev->bus, dma_devfn);
116
117 switch (pdev->device) {
118 case PCI_DEVICE_ID_INTEL_BYT_UART1:
119 case PCI_DEVICE_ID_INTEL_BSW_UART1:
120 case PCI_DEVICE_ID_INTEL_BDW_UART1:
121 param->src_id = 3;
122 param->dst_id = 2;
123 break;
124 case PCI_DEVICE_ID_INTEL_BYT_UART2:
125 case PCI_DEVICE_ID_INTEL_BSW_UART2:
126 case PCI_DEVICE_ID_INTEL_BDW_UART2:
127 param->src_id = 5;
128 param->dst_id = 4;
129 break;
130 default:
131 return -EINVAL;
132 }
133
134 param->dma_dev = &dma_dev->dev;
135 param->m_master = 0;
136 param->p_master = 1;
137
138 /* TODO: Detect FIFO size automaticaly for DesignWare 8250 */
139 port->fifosize = 64;
140 up->tx_loadsz = 64;
141
142 lpss->dma_maxburst = 16;
143
144 port->set_termios = byt_set_termios;
145 port->get_mctrl = byt_get_mctrl;
146
147 /* Disable TX counter interrupts */
148 writel(BYT_TX_OVF_INT_MASK, port->membase + BYT_TX_OVF_INT);
149
150 return 0;
151 }
152
153 #ifdef CONFIG_SERIAL_8250_DMA
154 static const struct dw_dma_platform_data qrk_serial_dma_pdata = {
155 .nr_channels = 2,
156 .is_private = true,
157 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
158 .chan_priority = CHAN_PRIORITY_ASCENDING,
159 .block_size = 4095,
160 .nr_masters = 1,
161 .data_width = {4},
162 .multi_block = {0},
163 };
164
qrk_serial_setup_dma(struct lpss8250 * lpss,struct uart_port * port)165 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port)
166 {
167 struct uart_8250_dma *dma = &lpss->dma;
168 struct dw_dma_chip *chip = &lpss->dma_chip;
169 struct dw_dma_slave *param = &lpss->dma_param;
170 struct pci_dev *pdev = to_pci_dev(port->dev);
171 int ret;
172
173 chip->dev = &pdev->dev;
174 chip->irq = pci_irq_vector(pdev, 0);
175 chip->regs = pci_ioremap_bar(pdev, 1);
176 chip->pdata = &qrk_serial_dma_pdata;
177
178 /* Falling back to PIO mode if DMA probing fails */
179 ret = dw_dma_probe(chip);
180 if (ret)
181 return;
182
183 pci_try_set_mwi(pdev);
184
185 /* Special DMA address for UART */
186 dma->rx_dma_addr = 0xfffff000;
187 dma->tx_dma_addr = 0xfffff000;
188
189 param->dma_dev = &pdev->dev;
190 param->src_id = 0;
191 param->dst_id = 1;
192 param->hs_polarity = true;
193
194 lpss->dma_maxburst = 8;
195 }
196
qrk_serial_exit_dma(struct lpss8250 * lpss)197 static void qrk_serial_exit_dma(struct lpss8250 *lpss)
198 {
199 struct dw_dma_slave *param = &lpss->dma_param;
200
201 if (!param->dma_dev)
202 return;
203 dw_dma_remove(&lpss->dma_chip);
204 }
205 #else /* CONFIG_SERIAL_8250_DMA */
qrk_serial_setup_dma(struct lpss8250 * lpss,struct uart_port * port)206 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) {}
qrk_serial_exit_dma(struct lpss8250 * lpss)207 static void qrk_serial_exit_dma(struct lpss8250 *lpss) {}
208 #endif /* !CONFIG_SERIAL_8250_DMA */
209
qrk_serial_setup(struct lpss8250 * lpss,struct uart_port * port)210 static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
211 {
212 struct pci_dev *pdev = to_pci_dev(port->dev);
213 int ret;
214
215 pci_set_master(pdev);
216
217 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
218 if (ret < 0)
219 return ret;
220
221 port->irq = pci_irq_vector(pdev, 0);
222
223 qrk_serial_setup_dma(lpss, port);
224 return 0;
225 }
226
qrk_serial_exit(struct lpss8250 * lpss)227 static void qrk_serial_exit(struct lpss8250 *lpss)
228 {
229 qrk_serial_exit_dma(lpss);
230 }
231
lpss8250_dma_filter(struct dma_chan * chan,void * param)232 static bool lpss8250_dma_filter(struct dma_chan *chan, void *param)
233 {
234 struct dw_dma_slave *dws = param;
235
236 if (dws->dma_dev != chan->device->dev)
237 return false;
238
239 chan->private = dws;
240 return true;
241 }
242
lpss8250_dma_setup(struct lpss8250 * lpss,struct uart_8250_port * port)243 static int lpss8250_dma_setup(struct lpss8250 *lpss, struct uart_8250_port *port)
244 {
245 struct uart_8250_dma *dma = &lpss->dma;
246 struct dw_dma_slave *rx_param, *tx_param;
247 struct device *dev = port->port.dev;
248
249 if (!lpss->dma_param.dma_dev)
250 return 0;
251
252 rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
253 if (!rx_param)
254 return -ENOMEM;
255
256 tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
257 if (!tx_param)
258 return -ENOMEM;
259
260 *rx_param = lpss->dma_param;
261 dma->rxconf.src_maxburst = lpss->dma_maxburst;
262
263 *tx_param = lpss->dma_param;
264 dma->txconf.dst_maxburst = lpss->dma_maxburst;
265
266 dma->fn = lpss8250_dma_filter;
267 dma->rx_param = rx_param;
268 dma->tx_param = tx_param;
269
270 port->dma = dma;
271 return 0;
272 }
273
lpss8250_probe(struct pci_dev * pdev,const struct pci_device_id * id)274 static int lpss8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
275 {
276 struct uart_8250_port uart;
277 struct lpss8250 *lpss;
278 int ret;
279
280 ret = pcim_enable_device(pdev);
281 if (ret)
282 return ret;
283
284 lpss = devm_kzalloc(&pdev->dev, sizeof(*lpss), GFP_KERNEL);
285 if (!lpss)
286 return -ENOMEM;
287
288 lpss->board = (struct lpss8250_board *)id->driver_data;
289
290 memset(&uart, 0, sizeof(struct uart_8250_port));
291
292 uart.port.dev = &pdev->dev;
293 uart.port.irq = pdev->irq;
294 uart.port.private_data = lpss;
295 uart.port.type = PORT_16550A;
296 uart.port.iotype = UPIO_MEM;
297 uart.port.regshift = 2;
298 uart.port.uartclk = lpss->board->base_baud * 16;
299 uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
300 uart.capabilities = UART_CAP_FIFO | UART_CAP_AFE;
301 uart.port.mapbase = pci_resource_start(pdev, 0);
302 uart.port.membase = pcim_iomap(pdev, 0, 0);
303 if (!uart.port.membase)
304 return -ENOMEM;
305
306 ret = lpss->board->setup(lpss, &uart.port);
307 if (ret)
308 return ret;
309
310 ret = lpss8250_dma_setup(lpss, &uart);
311 if (ret)
312 goto err_exit;
313
314 ret = serial8250_register_8250_port(&uart);
315 if (ret < 0)
316 goto err_exit;
317
318 lpss->line = ret;
319
320 pci_set_drvdata(pdev, lpss);
321 return 0;
322
323 err_exit:
324 if (lpss->board->exit)
325 lpss->board->exit(lpss);
326 return ret;
327 }
328
lpss8250_remove(struct pci_dev * pdev)329 static void lpss8250_remove(struct pci_dev *pdev)
330 {
331 struct lpss8250 *lpss = pci_get_drvdata(pdev);
332
333 serial8250_unregister_port(lpss->line);
334
335 if (lpss->board->exit)
336 lpss->board->exit(lpss);
337 }
338
339 static const struct lpss8250_board byt_board = {
340 .freq = 100000000,
341 .base_baud = 2764800,
342 .setup = byt_serial_setup,
343 };
344
345 static const struct lpss8250_board qrk_board = {
346 .freq = 44236800,
347 .base_baud = 2764800,
348 .setup = qrk_serial_setup,
349 .exit = qrk_serial_exit,
350 };
351
352 #define LPSS_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }
353
354 static const struct pci_device_id pci_ids[] = {
355 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_QRK_UARTx, qrk_board),
356 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BYT_UART1, byt_board),
357 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BYT_UART2, byt_board),
358 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BSW_UART1, byt_board),
359 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BSW_UART2, byt_board),
360 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BDW_UART1, byt_board),
361 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BDW_UART2, byt_board),
362 { },
363 };
364 MODULE_DEVICE_TABLE(pci, pci_ids);
365
366 static struct pci_driver lpss8250_pci_driver = {
367 .name = "8250_lpss",
368 .id_table = pci_ids,
369 .probe = lpss8250_probe,
370 .remove = lpss8250_remove,
371 };
372
373 module_pci_driver(lpss8250_pci_driver);
374
375 MODULE_AUTHOR("Intel Corporation");
376 MODULE_LICENSE("GPL v2");
377 MODULE_DESCRIPTION("Intel LPSS UART driver");
378