1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Mediatek 8250 driver.
4 *
5 * Copyright (c) 2014 MundoReader S.L.
6 * Author: Matthias Brugger <matthias.bgg@gmail.com>
7 */
8 #include <linux/clk.h>
9 #include <linux/io.h>
10 #include <linux/module.h>
11 #include <linux/of_irq.h>
12 #include <linux/of_platform.h>
13 #include <linux/platform_device.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/serial_8250.h>
16 #include <linux/serial_reg.h>
17
18 #include "8250.h"
19
20 #define UART_MTK_HIGHS 0x09 /* Highspeed register */
21 #define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */
22 #define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */
23 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
24
25 struct mtk8250_data {
26 int line;
27 struct clk *uart_clk;
28 struct clk *bus_clk;
29 };
30
31 static void
mtk8250_set_termios(struct uart_port * port,struct ktermios * termios,struct ktermios * old)32 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
33 struct ktermios *old)
34 {
35 struct uart_8250_port *up = up_to_u8250p(port);
36 unsigned long flags;
37 unsigned int baud, quot;
38
39 /*
40 * Store the requested baud rate before calling the generic 8250
41 * set_termios method. Standard 8250 port expects bauds to be
42 * no higher than (uartclk / 16) so the baud will be clamped if it
43 * gets out of that bound. Mediatek 8250 port supports speed
44 * higher than that, therefore we'll get original baud rate back
45 * after calling the generic set_termios method and recalculate
46 * the speed later in this method.
47 */
48 baud = tty_termios_baud_rate(termios);
49
50 serial8250_do_set_termios(port, termios, old);
51
52 tty_termios_encode_baud_rate(termios, baud, baud);
53
54 /*
55 * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS)
56 *
57 * We need to recalcualte the quot register, as the claculation depends
58 * on the vaule in the highspeed register.
59 *
60 * Some baudrates are not supported by the chip, so we use the next
61 * lower rate supported and update termios c_flag.
62 *
63 * If highspeed register is set to 3, we need to specify sample count
64 * and sample point to increase accuracy. If not, we reset the
65 * registers to their default values.
66 */
67 baud = uart_get_baud_rate(port, termios, old,
68 port->uartclk / 16 / UART_DIV_MAX,
69 port->uartclk);
70
71 if (baud <= 115200) {
72 serial_port_out(port, UART_MTK_HIGHS, 0x0);
73 quot = uart_get_divisor(port, baud);
74 } else if (baud <= 576000) {
75 serial_port_out(port, UART_MTK_HIGHS, 0x2);
76
77 /* Set to next lower baudrate supported */
78 if ((baud == 500000) || (baud == 576000))
79 baud = 460800;
80 quot = DIV_ROUND_UP(port->uartclk, 4 * baud);
81 } else {
82 serial_port_out(port, UART_MTK_HIGHS, 0x3);
83 quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
84 }
85
86 /*
87 * Ok, we're now changing the port state. Do it with
88 * interrupts disabled.
89 */
90 spin_lock_irqsave(&port->lock, flags);
91
92 /*
93 * Update the per-port timeout.
94 */
95 uart_update_timeout(port, termios->c_cflag, baud);
96
97 /* set DLAB we have cval saved in up->lcr from the call to the core */
98 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
99 serial_dl_write(up, quot);
100
101 /* reset DLAB */
102 serial_port_out(port, UART_LCR, up->lcr);
103
104 if (baud > 460800) {
105 unsigned int tmp;
106
107 tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud);
108 serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1);
109 serial_port_out(port, UART_MTK_SAMPLE_POINT,
110 (tmp - 2) >> 1);
111 } else {
112 serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00);
113 serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff);
114 }
115
116 spin_unlock_irqrestore(&port->lock, flags);
117 /* Don't rewrite B0 */
118 if (tty_termios_baud_rate(termios))
119 tty_termios_encode_baud_rate(termios, baud, baud);
120 }
121
mtk8250_runtime_suspend(struct device * dev)122 static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
123 {
124 struct mtk8250_data *data = dev_get_drvdata(dev);
125
126 clk_disable_unprepare(data->uart_clk);
127 clk_disable_unprepare(data->bus_clk);
128
129 return 0;
130 }
131
mtk8250_runtime_resume(struct device * dev)132 static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
133 {
134 struct mtk8250_data *data = dev_get_drvdata(dev);
135 int err;
136
137 err = clk_prepare_enable(data->uart_clk);
138 if (err) {
139 dev_warn(dev, "Can't enable clock\n");
140 return err;
141 }
142
143 err = clk_prepare_enable(data->bus_clk);
144 if (err) {
145 dev_warn(dev, "Can't enable bus clock\n");
146 return err;
147 }
148
149 return 0;
150 }
151
152 static void
mtk8250_do_pm(struct uart_port * port,unsigned int state,unsigned int old)153 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
154 {
155 if (!state)
156 pm_runtime_get_sync(port->dev);
157
158 serial8250_do_pm(port, state, old);
159
160 if (state)
161 pm_runtime_put_sync_suspend(port->dev);
162 }
163
mtk8250_probe_of(struct platform_device * pdev,struct uart_port * p,struct mtk8250_data * data)164 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
165 struct mtk8250_data *data)
166 {
167 data->uart_clk = devm_clk_get(&pdev->dev, "baud");
168 if (IS_ERR(data->uart_clk)) {
169 /*
170 * For compatibility with older device trees try unnamed
171 * clk when no baud clk can be found.
172 */
173 data->uart_clk = devm_clk_get(&pdev->dev, NULL);
174 if (IS_ERR(data->uart_clk)) {
175 dev_warn(&pdev->dev, "Can't get uart clock\n");
176 return PTR_ERR(data->uart_clk);
177 }
178
179 return 0;
180 }
181
182 data->bus_clk = devm_clk_get(&pdev->dev, "bus");
183 return PTR_ERR_OR_ZERO(data->bus_clk);
184 }
185
mtk8250_probe(struct platform_device * pdev)186 static int mtk8250_probe(struct platform_device *pdev)
187 {
188 struct uart_8250_port uart = {};
189 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
190 struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
191 struct mtk8250_data *data;
192 int err;
193
194 if (!regs || !irq) {
195 dev_err(&pdev->dev, "no registers/irq defined\n");
196 return -EINVAL;
197 }
198
199 uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
200 resource_size(regs));
201 if (!uart.port.membase)
202 return -ENOMEM;
203
204 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
205 if (!data)
206 return -ENOMEM;
207
208 if (pdev->dev.of_node) {
209 err = mtk8250_probe_of(pdev, &uart.port, data);
210 if (err)
211 return err;
212 } else
213 return -ENODEV;
214
215 spin_lock_init(&uart.port.lock);
216 uart.port.mapbase = regs->start;
217 uart.port.irq = irq->start;
218 uart.port.pm = mtk8250_do_pm;
219 uart.port.type = PORT_16550;
220 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
221 uart.port.dev = &pdev->dev;
222 uart.port.iotype = UPIO_MEM32;
223 uart.port.regshift = 2;
224 uart.port.private_data = data;
225 uart.port.set_termios = mtk8250_set_termios;
226 uart.port.uartclk = clk_get_rate(data->uart_clk);
227
228 /* Disable Rate Fix function */
229 writel(0x0, uart.port.membase +
230 (MTK_UART_RATE_FIX << uart.port.regshift));
231
232 platform_set_drvdata(pdev, data);
233
234 err = mtk8250_runtime_resume(&pdev->dev);
235 if (err)
236 return err;
237
238 data->line = serial8250_register_8250_port(&uart);
239 if (data->line < 0)
240 return data->line;
241
242 pm_runtime_set_active(&pdev->dev);
243 pm_runtime_enable(&pdev->dev);
244
245 return 0;
246 }
247
mtk8250_remove(struct platform_device * pdev)248 static int mtk8250_remove(struct platform_device *pdev)
249 {
250 struct mtk8250_data *data = platform_get_drvdata(pdev);
251
252 pm_runtime_get_sync(&pdev->dev);
253
254 serial8250_unregister_port(data->line);
255 mtk8250_runtime_suspend(&pdev->dev);
256
257 pm_runtime_disable(&pdev->dev);
258 pm_runtime_put_noidle(&pdev->dev);
259
260 return 0;
261 }
262
mtk8250_suspend(struct device * dev)263 static int __maybe_unused mtk8250_suspend(struct device *dev)
264 {
265 struct mtk8250_data *data = dev_get_drvdata(dev);
266
267 serial8250_suspend_port(data->line);
268
269 return 0;
270 }
271
mtk8250_resume(struct device * dev)272 static int __maybe_unused mtk8250_resume(struct device *dev)
273 {
274 struct mtk8250_data *data = dev_get_drvdata(dev);
275
276 serial8250_resume_port(data->line);
277
278 return 0;
279 }
280
281 static const struct dev_pm_ops mtk8250_pm_ops = {
282 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
283 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
284 NULL)
285 };
286
287 static const struct of_device_id mtk8250_of_match[] = {
288 { .compatible = "mediatek,mt6577-uart" },
289 { /* Sentinel */ }
290 };
291 MODULE_DEVICE_TABLE(of, mtk8250_of_match);
292
293 static struct platform_driver mtk8250_platform_driver = {
294 .driver = {
295 .name = "mt6577-uart",
296 .pm = &mtk8250_pm_ops,
297 .of_match_table = mtk8250_of_match,
298 },
299 .probe = mtk8250_probe,
300 .remove = mtk8250_remove,
301 };
302 module_platform_driver(mtk8250_platform_driver);
303
304 #ifdef CONFIG_SERIAL_8250_CONSOLE
early_mtk8250_setup(struct earlycon_device * device,const char * options)305 static int __init early_mtk8250_setup(struct earlycon_device *device,
306 const char *options)
307 {
308 if (!device->port.membase)
309 return -ENODEV;
310
311 device->port.iotype = UPIO_MEM32;
312
313 return early_serial8250_setup(device, NULL);
314 }
315
316 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
317 #endif
318
319 MODULE_AUTHOR("Matthias Brugger");
320 MODULE_LICENSE("GPL");
321 MODULE_DESCRIPTION("Mediatek 8250 serial port driver");
322