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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree file for the Storm Semiconductor SL93512R_BRD
4 * Gemini reference design, also initially called
5 * "Gemini324 EV-Board" before Storm acquired Storlink Semiconductor.
6 * The series were later acquired by Cortina Systems.
7 */
8
9/dts-v1/;
10
11#include "gemini.dtsi"
12#include <dt-bindings/input/input.h>
13
14/ {
15	model = "Storlink Semiconductor Gemini324 EV-Board / Storm Semiconductor SL93512R_BRD";
16	compatible = "storlink,gemini324", "storm,sl93512r", "cortina,gemini";
17	#address-cells = <1>;
18	#size-cells = <1>;
19
20	memory@0 {
21		/* 64 MB Samsung K4H511638B */
22		device_type = "memory";
23		reg = <0x00000000 0x4000000>;
24	};
25
26	chosen {
27		bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait";
28		stdout-path = &uart0;
29	};
30
31	gpio_keys {
32		compatible = "gpio-keys";
33
34		button-wps {
35			debounce-interval = <50>;
36			wakeup-source;
37			linux,code = <KEY_WPS_BUTTON>;
38			label = "WPS";
39			/* Conflict with NAND flash */
40			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
41		};
42
43		button-setup {
44			debounce-interval = <50>;
45			wakeup-source;
46			linux,code = <KEY_SETUP>;
47			label = "factory reset";
48			/* Conflict with NAND flash */
49			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
50		};
51	};
52
53	leds {
54		compatible = "gpio-leds";
55		led-green-harddisk {
56			label = "sq201:green:harddisk";
57			/* Conflict with LCD (no problem) */
58			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
59			default-state = "off";
60			linux,default-trigger = "disk-activity";
61		};
62		led-green-wireless {
63			label = "sq201:green:wireless";
64			/* Conflict with NAND flash CE0 (no problem) */
65			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
66			default-state = "on";
67			linux,default-trigger = "heartbeat";
68		};
69	};
70
71	mdio0: mdio {
72		compatible = "virtual,mdio-gpio";
73		/* Uses MDC and MDIO */
74		gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
75			<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
76		#address-cells = <1>;
77		#size-cells = <0>;
78
79		/* This is a Marvell 88E1111 ethernet transciever */
80		phy0: ethernet-phy@1 {
81			reg = <1>;
82		};
83	};
84
85	spi {
86		compatible = "spi-gpio";
87		#address-cells = <1>;
88		#size-cells = <0>;
89		/* Check pin collisions */
90		gpio-sck = <&gpio1 28 GPIO_ACTIVE_HIGH>;
91		gpio-miso = <&gpio1 30 GPIO_ACTIVE_HIGH>;
92		gpio-mosi = <&gpio1 29 GPIO_ACTIVE_HIGH>;
93		cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
94		num-chipselects = <1>;
95
96		switch@0 {
97			compatible = "vitesse,vsc7385";
98			reg = <0>;
99			/* Specified for 2.5 MHz or below */
100			spi-max-frequency = <2500000>;
101			gpio-controller;
102			#gpio-cells = <2>;
103
104			ports {
105				#address-cells = <1>;
106				#size-cells = <0>;
107
108				port@0 {
109					reg = <0>;
110					label = "lan1";
111				};
112				port@1 {
113					reg = <1>;
114					label = "lan2";
115				};
116				port@2 {
117					reg = <2>;
118					label = "lan3";
119				};
120				port@3 {
121					reg = <3>;
122					label = "lan4";
123				};
124				vsc: port@6 {
125					reg = <6>;
126					label = "cpu";
127					ethernet = <&gmac1>;
128					phy-mode = "rgmii";
129					fixed-link {
130						speed = <1000>;
131						full-duplex;
132						pause;
133					};
134				};
135			};
136		};
137	};
138
139
140	soc {
141		flash@30000000 {
142			status = "okay";
143			/* 16MB of flash */
144			reg = <0x30000000 0x01000000>;
145
146			partition@0 {
147				label = "BOOT";
148				reg = <0x00000000 0x00020000>;
149				read-only;
150			};
151			partition@120000 {
152				label = "Kern";
153				reg = <0x00020000 0x00300000>;
154			};
155			partition@320000 {
156				label = "Ramdisk";
157				reg = <0x00320000 0x00600000>;
158			};
159			partition@920000 {
160				label = "Application";
161				reg = <0x00920000 0x00600000>;
162			};
163			partition@f20000 {
164				label = "VCTL";
165				reg = <0x00f20000 0x00020000>;
166				read-only;
167			};
168			partition@f40000 {
169				label = "CurConf";
170				reg = <0x00f40000 0x000a0000>;
171				read-only;
172			};
173			partition@fe0000 {
174				label = "FIS directory";
175				reg = <0x00fe0000 0x00020000>;
176				read-only;
177			};
178		};
179
180		syscon: syscon@40000000 {
181			pinctrl {
182				/*
183				 * gpio0egrp cover line 16 used by HD LED
184				 * gpio0fgrp cover line 17, 18 used by wireless LED and reset button
185				 * gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY
186				 * gpio0kgrp cover line 31 used by USB LED
187				 */
188				gpio0_default_pins: pinctrl-gpio0 {
189					mux {
190						function = "gpio0";
191						groups = "gpio0egrp",
192						"gpio0fgrp",
193						"gpio0hgrp";
194					};
195				};
196				/*
197				 * gpio1dgrp cover lines used by SPI for
198				 * the Vitesse chip (28-31)
199				 */
200				gpio1_default_pins: pinctrl-gpio1 {
201					mux {
202						function = "gpio1";
203						groups = "gpio1dgrp";
204					};
205				};
206				pinctrl-gmii {
207					mux {
208						function = "gmii";
209						groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
210					};
211					/* Control pad skew comes from sl_switch.c in the vendor code */
212					conf0 {
213						pins = "P10 GMAC1 TXC";
214						skew-delay = <5>;
215					};
216					conf1 {
217						pins = "V11 GMAC1 TXEN";
218						skew-delay = <7>;
219					};
220					conf2 {
221						pins = "T11 GMAC1 RXC";
222						skew-delay = <8>;
223					};
224					conf3 {
225						pins = "U11 GMAC1 RXDV";
226						skew-delay = <7>;
227					};
228					conf4 {
229						pins = "V7 GMAC0 TXC";
230						skew-delay = <10>;
231					};
232					conf5 {
233						pins = "P8 GMAC0 TXEN";
234						skew-delay = <7>; /* 5 at another place? */
235					};
236					conf6 {
237						pins = "T8 GMAC0 RXC";
238						skew-delay = <15>;
239					};
240					conf7 {
241						pins = "R8 GMAC0 RXDV";
242						skew-delay = <0>;
243					};
244					conf8 {
245						/* The data lines all have default skew */
246						pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
247						       "P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
248						       "R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
249						       "V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
250						       "R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
251						       "U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
252						skew-delay = <7>;
253					};
254					/* Appears in sl351x_gmac.c in the vendor code */
255					conf9 {
256						pins = "U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
257						       "R7 GMAC0 TXD2", "P7 GMAC0 TXD3";
258						skew-delay = <5>;
259					};
260				};
261			};
262		};
263
264		/* Both interfaces brought out on SATA connectors */
265		sata: sata@46000000 {
266			cortina,gemini-ata-muxmode = <0>;
267			cortina,gemini-enable-sata-bridge;
268			status = "okay";
269		};
270
271		gpio0: gpio@4d000000 {
272			pinctrl-names = "default";
273			pinctrl-0 = <&gpio0_default_pins>;
274		};
275
276		gpio1: gpio@4e000000 {
277			pinctrl-names = "default";
278			pinctrl-0 = <&gpio1_default_pins>;
279		};
280
281		pci@50000000 {
282			status = "okay";
283			interrupt-map-mask = <0xf800 0 0 7>;
284			interrupt-map =
285				<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
286				<0x4800 0 0 2 &pci_intc 1>,
287				<0x4800 0 0 3 &pci_intc 2>,
288				<0x4800 0 0 4 &pci_intc 3>,
289				<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
290				<0x5000 0 0 2 &pci_intc 2>,
291				<0x5000 0 0 3 &pci_intc 3>,
292				<0x5000 0 0 4 &pci_intc 0>,
293				<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
294				<0x5800 0 0 2 &pci_intc 3>,
295				<0x5800 0 0 3 &pci_intc 0>,
296				<0x5800 0 0 4 &pci_intc 1>,
297				<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
298				<0x6000 0 0 2 &pci_intc 0>,
299				<0x6000 0 0 3 &pci_intc 1>,
300				<0x6000 0 0 4 &pci_intc 2>;
301		};
302
303		ethernet@60000000 {
304			status = "okay";
305
306			ethernet-port@0 {
307				phy-mode = "rgmii";
308				phy-handle = <&phy0>;
309			};
310			ethernet-port@1 {
311				phy-mode = "rgmii";
312				fixed-link {
313					speed = <1000>;
314					full-duplex;
315					pause;
316				};
317			};
318		};
319
320		ata@63000000 {
321			status = "okay";
322		};
323
324		ata@63400000 {
325			status = "okay";
326		};
327	};
328};
329