1/* 2 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com> 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program; if not, write to the Free Software 15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 16 * MA 02110-1301, USA. 17 */ 18 19#include "imx51.dtsi" 20 21/ { 22 model = "Eukrea CPUIMX51"; 23 compatible = "eukrea,cpuimx51", "fsl,imx51"; 24 25 memory@90000000 { 26 device_type = "memory"; 27 reg = <0x90000000 0x10000000>; /* 256M */ 28 }; 29}; 30 31&fec { 32 pinctrl-names = "default"; 33 pinctrl-0 = <&pinctrl_fec>; 34 status = "okay"; 35}; 36 37&i2c1 { 38 pinctrl-names = "default"; 39 pinctrl-0 = <&pinctrl_i2c1>; 40 status = "okay"; 41 42 pcf8563@51 { 43 compatible = "nxp,pcf8563"; 44 reg = <0x51>; 45 }; 46 47 tsc2007: tsc2007@49 { 48 compatible = "ti,tsc2007"; 49 gpios = <&gpio4 0 1>; 50 interrupt-parent = <&gpio4>; 51 interrupts = <0x0 0x8>; 52 pinctrl-names = "default"; 53 pinctrl-0 = <&pinctrl_tsc2007_1>; 54 reg = <0x49>; 55 ti,x-plate-ohms = <180>; 56 }; 57}; 58 59&iomuxc { 60 imx51-eukrea { 61 pinctrl_tsc2007_1: tsc2007grp-1 { 62 fsl,pins = < 63 MX51_PAD_GPIO_NAND__GPIO_NAND 0x1f5 64 MX51_PAD_NANDF_D8__GPIO4_0 0x1f5 65 >; 66 }; 67 68 pinctrl_fec: fecgrp { 69 fsl,pins = < 70 MX51_PAD_DI_GP3__FEC_TX_ER 0x80000000 71 MX51_PAD_DI2_PIN4__FEC_CRS 0x80000000 72 MX51_PAD_DI2_PIN2__FEC_MDC 0x80000000 73 MX51_PAD_DI2_PIN3__FEC_MDIO 0x80000000 74 MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x80000000 75 MX51_PAD_DI_GP4__FEC_RDATA2 0x80000000 76 MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x80000000 77 MX51_PAD_DISP2_DAT1__FEC_RX_ER 0x80000000 78 MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x80000000 79 MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x80000000 80 MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x80000000 81 MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x80000000 82 MX51_PAD_DISP2_DAT10__FEC_COL 0x80000000 83 MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x80000000 84 MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x80000000 85 MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x80000000 86 MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x80000000 87 MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x80000000 88 >; 89 }; 90 91 pinctrl_i2c1: i2c1grp { 92 fsl,pins = < 93 MX51_PAD_SD2_CMD__I2C1_SCL 0x400001ed 94 MX51_PAD_SD2_CLK__I2C1_SDA 0x400001ed 95 >; 96 }; 97 }; 98}; 99 100&nfc { 101 nand-bus-width = <8>; 102 nand-ecc-mode = "hw"; 103 nand-on-flash-bbt; 104 status = "okay"; 105}; 106