1/* 2 * Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/ 3 * 4 * Author: Harry YJ Jhou (周亞諄) <harryyj.jhou@moxa.com> 5 * Jimmy Chen (陳永達) <jimmy.chen@moxa.com> 6 * SZ Lin (林上智) <sz.lin@moxa.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13/dts-v1/; 14 15#include <dt-bindings/gpio/gpio.h> 16#include <dt-bindings/input/input.h> 17#include "ls1021a.dtsi" 18 19/ { 20 model = "Moxa UC-8410A"; 21 22 aliases { 23 enet0_rgmii_phy = &rgmii_phy0; 24 enet1_rgmii_phy = &rgmii_phy1; 25 enet2_rgmii_phy = &rgmii_phy2; 26 }; 27 28 sys_mclk: clock-mclk { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <24576000>; 32 }; 33 34 reg_3p3v: regulator-3p3v { 35 compatible = "regulator-fixed"; 36 regulator-name = "3P3V"; 37 regulator-min-microvolt = <3300000>; 38 regulator-max-microvolt = <3300000>; 39 regulator-always-on; 40 }; 41 42 leds { 43 compatible = "gpio-leds"; 44 45 cel-pwr { 46 label = "UC8410A:CEL-PWR"; 47 gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; 48 default-state = "off"; 49 }; 50 51 cel-reset { 52 label = "UC8410A:CEL-RESET"; 53 gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; 54 default-state = "off"; 55 }; 56 57 str-led { 58 label = "UC8410A:RED:PROG"; 59 gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; 60 linux,default-trigger = "mmc0"; 61 }; 62 63 sw-ready { 64 label = "UC8410A:GREEN:SWRDY"; 65 gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; 66 default-state = "on"; 67 }; 68 69 beeper { 70 label = "UC8410A:BEEP"; 71 gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; 72 default-state = "off"; 73 }; 74 75 prog-led0 { 76 label = "UC8410A:GREEN:PROG2"; 77 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; 78 default-state = "off"; 79 }; 80 81 prog-led1 { 82 label = "UC8410A:GREEN:PROG1"; 83 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; 84 default-state = "off"; 85 }; 86 87 prog-led2 { 88 label = "UC8410A:GREEN:PROG0"; 89 gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; 90 default-state = "off"; 91 }; 92 93 wifi-signal0 { 94 label = "UC8410A:GREEN:CEL2"; 95 gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>; 96 default-state = "off"; 97 }; 98 99 wifi-signal1 { 100 label = "UC8410A:GREEN:CEL1"; 101 gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; 102 default-state = "off"; 103 }; 104 105 wifi-signal2 { 106 label = "UC8410A:GREEN:CEL0"; 107 gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; 108 default-state = "off"; 109 }; 110 111 cpu-diag-red { 112 label = "UC8410A:RED:DIA"; 113 gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; 114 default-state = "off"; 115 }; 116 117 cpu-diag-green { 118 label = "UC8410A:GREEN:DIA"; 119 gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; 120 default-state = "off"; 121 }; 122 123 cpu-diag-yellow { 124 label = "UC8410A:YELLOW:DIA"; 125 gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; 126 default-state = "off"; 127 }; 128 }; 129 130 gpio-keys { 131 compatible = "gpio-keys"; 132 133 pushbtn-key { 134 label = "push button key"; 135 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; 136 linux,code = <BTN_MISC>; 137 default-state = "on"; 138 }; 139 }; 140}; 141 142&enet0 { 143 phy-handle = <&rgmii_phy0>; 144 phy-connection-type = "rgmii-id"; 145 status = "okay"; 146}; 147 148&enet1 { 149 phy-handle = <&rgmii_phy1>; 150 phy-connection-type = "rgmii-id"; 151 status = "okay"; 152}; 153 154&enet2 { 155 phy-handle = <&rgmii_phy2>; 156 phy-connection-type = "rgmii-id"; 157 status = "okay"; 158}; 159 160&i2c0 { 161 clock-frequency = <100000>; 162 status = "okay"; 163 164 tpm@20 { 165 compatible = "infineon,slb9635tt"; 166 reg = <0x20>; 167 }; 168 169 rtc@68 { 170 compatible = "dallas,ds1374"; 171 reg = <0x68>; 172 }; 173}; 174 175&lpuart0 { 176 status = "okay"; 177}; 178 179&mdio0 { 180 rgmii_phy0: ethernet-phy@0 { 181 compatible = "marvell,88e1118"; 182 reg = <0x0>; 183 marvell,reg-init = 184 <3 0x11 0 0x4415>, /* Reg 3,17 */ 185 <3 0x10 0 0x77>; /* Reg 3,16 */ 186 }; 187 188 rgmii_phy1: ethernet-phy@1 { 189 compatible = "marvell,88e1118"; 190 reg = <0x1>; 191 marvell,reg-init = 192 <3 0x11 0 0x4415>, /* Reg 3,17 */ 193 <3 0x10 0 0x77>; /* Reg 3,16 */ 194 }; 195 196 rgmii_phy2: ethernet-phy@2 { 197 compatible = "marvell,88e1118"; 198 reg = <0x2>; 199 marvell,reg-init = 200 <3 0x11 0 0x4415>, /* Reg 3,17 */ 201 <3 0x10 0 0x77>; /* Reg 3,16 */ 202 }; 203}; 204 205&qspi { 206 bus-num = <0>; 207 fsl,spi-num-chipselects = <2>; 208 fsl,spi-flash-chipselects = <0>; 209 fsl,qspi-has-second-chip; 210 status = "okay"; 211 212 flash: flash@0 { 213 compatible = "spansion,s25fl064l", "spansion,s25fl164k"; 214 #address-cells = <1>; 215 #size-cells = <1>; 216 spi-max-frequency = <20000000>; 217 reg = <0>; 218 219 partitions@0 { 220 label = "U-Boot"; 221 reg = <0x0 0x180000>; 222 }; 223 224 partitions@180000 { 225 label = "U-Boot Env"; 226 reg = <0x180000 0x680000>; 227 }; 228 }; 229}; 230 231&sata { 232 status = "okay"; 233}; 234 235&uart0 { 236 status = "okay"; 237}; 238 239&uart1 { 240 status = "okay"; 241}; 242