1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a7743 SoC 4 * 5 * Copyright (C) 2016-2017 Cogent Embedded Inc. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a7743-cpg-mssr.h> 11#include <dt-bindings/power/r8a7743-sysc.h> 12 13/ { 14 compatible = "renesas,r8a7743"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 aliases { 19 i2c0 = &i2c0; 20 i2c1 = &i2c1; 21 i2c2 = &i2c2; 22 i2c3 = &i2c3; 23 i2c4 = &i2c4; 24 i2c5 = &i2c5; 25 i2c6 = &iic0; 26 i2c7 = &iic1; 27 i2c8 = &iic3; 28 spi0 = &qspi; 29 spi1 = &msiof0; 30 spi2 = &msiof1; 31 spi3 = &msiof2; 32 vin0 = &vin0; 33 vin1 = &vin1; 34 vin2 = &vin2; 35 }; 36 37 /* 38 * The external audio clocks are configured as 0 Hz fixed frequency 39 * clocks by default. 40 * Boards that provide audio clocks should override them. 41 */ 42 audio_clk_a: audio_clk_a { 43 compatible = "fixed-clock"; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 46 }; 47 48 audio_clk_b: audio_clk_b { 49 compatible = "fixed-clock"; 50 #clock-cells = <0>; 51 clock-frequency = <0>; 52 }; 53 54 audio_clk_c: audio_clk_c { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 /* External CAN clock */ 61 can_clk: can { 62 compatible = "fixed-clock"; 63 #clock-cells = <0>; 64 /* This value must be overridden by the board. */ 65 clock-frequency = <0>; 66 }; 67 68 cpus { 69 #address-cells = <1>; 70 #size-cells = <0>; 71 enable-method = "renesas,apmu"; 72 73 cpu0: cpu@0 { 74 device_type = "cpu"; 75 compatible = "arm,cortex-a15"; 76 reg = <0>; 77 clock-frequency = <1500000000>; 78 clocks = <&cpg CPG_CORE R8A7743_CLK_Z>; 79 clock-latency = <300000>; /* 300 us */ 80 power-domains = <&sysc R8A7743_PD_CA15_CPU0>; 81 next-level-cache = <&L2_CA15>; 82 83 /* kHz - uV - OPPs unknown yet */ 84 operating-points = <1500000 1000000>, 85 <1312500 1000000>, 86 <1125000 1000000>, 87 < 937500 1000000>, 88 < 750000 1000000>, 89 < 375000 1000000>; 90 }; 91 92 cpu1: cpu@1 { 93 device_type = "cpu"; 94 compatible = "arm,cortex-a15"; 95 reg = <1>; 96 clock-frequency = <1500000000>; 97 clocks = <&cpg CPG_CORE R8A7743_CLK_Z>; 98 clock-latency = <300000>; /* 300 us */ 99 power-domains = <&sysc R8A7743_PD_CA15_CPU1>; 100 next-level-cache = <&L2_CA15>; 101 102 /* kHz - uV - OPPs unknown yet */ 103 operating-points = <1500000 1000000>, 104 <1312500 1000000>, 105 <1125000 1000000>, 106 < 937500 1000000>, 107 < 750000 1000000>, 108 < 375000 1000000>; 109 }; 110 111 L2_CA15: cache-controller-0 { 112 compatible = "cache"; 113 cache-unified; 114 cache-level = <2>; 115 power-domains = <&sysc R8A7743_PD_CA15_SCU>; 116 }; 117 }; 118 119 /* External root clock */ 120 extal_clk: extal { 121 compatible = "fixed-clock"; 122 #clock-cells = <0>; 123 /* This value must be overridden by the board. */ 124 clock-frequency = <0>; 125 }; 126 127 /* External PCIe clock - can be overridden by the board */ 128 pcie_bus_clk: pcie_bus { 129 compatible = "fixed-clock"; 130 #clock-cells = <0>; 131 clock-frequency = <0>; 132 }; 133 134 pmu { 135 compatible = "arm,cortex-a15-pmu"; 136 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 137 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 138 interrupt-affinity = <&cpu0>, <&cpu1>; 139 }; 140 141 /* External SCIF clock */ 142 scif_clk: scif { 143 compatible = "fixed-clock"; 144 #clock-cells = <0>; 145 /* This value must be overridden by the board. */ 146 clock-frequency = <0>; 147 }; 148 149 soc { 150 compatible = "simple-bus"; 151 interrupt-parent = <&gic>; 152 153 #address-cells = <2>; 154 #size-cells = <2>; 155 ranges; 156 157 gpio0: gpio@e6050000 { 158 compatible = "renesas,gpio-r8a7743", 159 "renesas,rcar-gen2-gpio"; 160 reg = <0 0xe6050000 0 0x50>; 161 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 162 #gpio-cells = <2>; 163 gpio-controller; 164 gpio-ranges = <&pfc 0 0 32>; 165 #interrupt-cells = <2>; 166 interrupt-controller; 167 clocks = <&cpg CPG_MOD 912>; 168 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 169 resets = <&cpg 912>; 170 }; 171 172 gpio1: gpio@e6051000 { 173 compatible = "renesas,gpio-r8a7743", 174 "renesas,rcar-gen2-gpio"; 175 reg = <0 0xe6051000 0 0x50>; 176 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 177 #gpio-cells = <2>; 178 gpio-controller; 179 gpio-ranges = <&pfc 0 32 26>; 180 #interrupt-cells = <2>; 181 interrupt-controller; 182 clocks = <&cpg CPG_MOD 911>; 183 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 184 resets = <&cpg 911>; 185 }; 186 187 gpio2: gpio@e6052000 { 188 compatible = "renesas,gpio-r8a7743", 189 "renesas,rcar-gen2-gpio"; 190 reg = <0 0xe6052000 0 0x50>; 191 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 192 #gpio-cells = <2>; 193 gpio-controller; 194 gpio-ranges = <&pfc 0 64 32>; 195 #interrupt-cells = <2>; 196 interrupt-controller; 197 clocks = <&cpg CPG_MOD 910>; 198 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 199 resets = <&cpg 910>; 200 }; 201 202 gpio3: gpio@e6053000 { 203 compatible = "renesas,gpio-r8a7743", 204 "renesas,rcar-gen2-gpio"; 205 reg = <0 0xe6053000 0 0x50>; 206 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 207 #gpio-cells = <2>; 208 gpio-controller; 209 gpio-ranges = <&pfc 0 96 32>; 210 #interrupt-cells = <2>; 211 interrupt-controller; 212 clocks = <&cpg CPG_MOD 909>; 213 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 214 resets = <&cpg 909>; 215 }; 216 217 gpio4: gpio@e6054000 { 218 compatible = "renesas,gpio-r8a7743", 219 "renesas,rcar-gen2-gpio"; 220 reg = <0 0xe6054000 0 0x50>; 221 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 222 #gpio-cells = <2>; 223 gpio-controller; 224 gpio-ranges = <&pfc 0 128 32>; 225 #interrupt-cells = <2>; 226 interrupt-controller; 227 clocks = <&cpg CPG_MOD 908>; 228 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 229 resets = <&cpg 908>; 230 }; 231 232 gpio5: gpio@e6055000 { 233 compatible = "renesas,gpio-r8a7743", 234 "renesas,rcar-gen2-gpio"; 235 reg = <0 0xe6055000 0 0x50>; 236 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 237 #gpio-cells = <2>; 238 gpio-controller; 239 gpio-ranges = <&pfc 0 160 32>; 240 #interrupt-cells = <2>; 241 interrupt-controller; 242 clocks = <&cpg CPG_MOD 907>; 243 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 244 resets = <&cpg 907>; 245 }; 246 247 gpio6: gpio@e6055400 { 248 compatible = "renesas,gpio-r8a7743", 249 "renesas,rcar-gen2-gpio"; 250 reg = <0 0xe6055400 0 0x50>; 251 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 252 #gpio-cells = <2>; 253 gpio-controller; 254 gpio-ranges = <&pfc 0 192 32>; 255 #interrupt-cells = <2>; 256 interrupt-controller; 257 clocks = <&cpg CPG_MOD 905>; 258 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 259 resets = <&cpg 905>; 260 }; 261 262 gpio7: gpio@e6055800 { 263 compatible = "renesas,gpio-r8a7743", 264 "renesas,rcar-gen2-gpio"; 265 reg = <0 0xe6055800 0 0x50>; 266 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 267 #gpio-cells = <2>; 268 gpio-controller; 269 gpio-ranges = <&pfc 0 224 26>; 270 #interrupt-cells = <2>; 271 interrupt-controller; 272 clocks = <&cpg CPG_MOD 904>; 273 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 274 resets = <&cpg 904>; 275 }; 276 277 pfc: pin-controller@e6060000 { 278 compatible = "renesas,pfc-r8a7743"; 279 reg = <0 0xe6060000 0 0x250>; 280 }; 281 282 tpu: pwm@e60f0000 { 283 compatible = "renesas,tpu-r8a7743", "renesas,tpu"; 284 reg = <0 0xe60f0000 0 0x148>; 285 clocks = <&cpg CPG_MOD 304>; 286 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 287 resets = <&cpg 304>; 288 #pwm-cells = <3>; 289 status = "disabled"; 290 }; 291 292 cpg: clock-controller@e6150000 { 293 compatible = "renesas,r8a7743-cpg-mssr"; 294 reg = <0 0xe6150000 0 0x1000>; 295 clocks = <&extal_clk>, <&usb_extal_clk>; 296 clock-names = "extal", "usb_extal"; 297 #clock-cells = <2>; 298 #power-domain-cells = <0>; 299 #reset-cells = <1>; 300 }; 301 302 apmu@e6152000 { 303 compatible = "renesas,r8a7743-apmu", "renesas,apmu"; 304 reg = <0 0xe6152000 0 0x188>; 305 cpus = <&cpu0 &cpu1>; 306 }; 307 308 rst: reset-controller@e6160000 { 309 compatible = "renesas,r8a7743-rst"; 310 reg = <0 0xe6160000 0 0x100>; 311 }; 312 313 rwdt: watchdog@e6020000 { 314 compatible = "renesas,r8a7743-wdt", 315 "renesas,rcar-gen2-wdt"; 316 reg = <0 0xe6020000 0 0x0c>; 317 clocks = <&cpg CPG_MOD 402>; 318 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 319 resets = <&cpg 402>; 320 status = "disabled"; 321 }; 322 323 sysc: system-controller@e6180000 { 324 compatible = "renesas,r8a7743-sysc"; 325 reg = <0 0xe6180000 0 0x200>; 326 #power-domain-cells = <1>; 327 }; 328 329 irqc: interrupt-controller@e61c0000 { 330 compatible = "renesas,irqc-r8a7743", "renesas,irqc"; 331 #interrupt-cells = <2>; 332 interrupt-controller; 333 reg = <0 0xe61c0000 0 0x200>; 334 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 335 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 336 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 337 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 338 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 339 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 340 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 341 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 342 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 343 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 344 clocks = <&cpg CPG_MOD 407>; 345 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 346 resets = <&cpg 407>; 347 }; 348 349 thermal: thermal@e61f0000 { 350 compatible = "renesas,thermal-r8a7743", 351 "renesas,rcar-gen2-thermal", 352 "renesas,rcar-thermal"; 353 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; 354 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 355 clocks = <&cpg CPG_MOD 522>; 356 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 357 resets = <&cpg 522>; 358 #thermal-sensor-cells = <0>; 359 }; 360 361 ipmmu_sy0: mmu@e6280000 { 362 compatible = "renesas,ipmmu-r8a7743", 363 "renesas,ipmmu-vmsa"; 364 reg = <0 0xe6280000 0 0x1000>; 365 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 366 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 367 #iommu-cells = <1>; 368 status = "disabled"; 369 }; 370 371 ipmmu_sy1: mmu@e6290000 { 372 compatible = "renesas,ipmmu-r8a7743", 373 "renesas,ipmmu-vmsa"; 374 reg = <0 0xe6290000 0 0x1000>; 375 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 376 #iommu-cells = <1>; 377 status = "disabled"; 378 }; 379 380 ipmmu_ds: mmu@e6740000 { 381 compatible = "renesas,ipmmu-r8a7743", 382 "renesas,ipmmu-vmsa"; 383 reg = <0 0xe6740000 0 0x1000>; 384 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 385 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 386 #iommu-cells = <1>; 387 status = "disabled"; 388 }; 389 390 ipmmu_mp: mmu@ec680000 { 391 compatible = "renesas,ipmmu-r8a7743", 392 "renesas,ipmmu-vmsa"; 393 reg = <0 0xec680000 0 0x1000>; 394 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 395 #iommu-cells = <1>; 396 status = "disabled"; 397 }; 398 399 ipmmu_mx: mmu@fe951000 { 400 compatible = "renesas,ipmmu-r8a7743", 401 "renesas,ipmmu-vmsa"; 402 reg = <0 0xfe951000 0 0x1000>; 403 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 404 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 405 #iommu-cells = <1>; 406 status = "disabled"; 407 }; 408 409 ipmmu_gp: mmu@e62a0000 { 410 compatible = "renesas,ipmmu-r8a7743", 411 "renesas,ipmmu-vmsa"; 412 reg = <0 0xe62a0000 0 0x1000>; 413 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 414 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 415 #iommu-cells = <1>; 416 status = "disabled"; 417 }; 418 419 icram0: sram@e63a0000 { 420 compatible = "mmio-sram"; 421 reg = <0 0xe63a0000 0 0x12000>; 422 }; 423 424 icram1: sram@e63c0000 { 425 compatible = "mmio-sram"; 426 reg = <0 0xe63c0000 0 0x1000>; 427 #address-cells = <1>; 428 #size-cells = <1>; 429 ranges = <0 0 0xe63c0000 0x1000>; 430 431 smp-sram@0 { 432 compatible = "renesas,smp-sram"; 433 reg = <0 0x100>; 434 }; 435 }; 436 437 icram2: sram@e6300000 { 438 compatible = "mmio-sram"; 439 reg = <0 0xe6300000 0 0x40000>; 440 }; 441 442 /* The memory map in the User's Manual maps the cores to 443 * bus numbers 444 */ 445 i2c0: i2c@e6508000 { 446 #address-cells = <1>; 447 #size-cells = <0>; 448 compatible = "renesas,i2c-r8a7743", 449 "renesas,rcar-gen2-i2c"; 450 reg = <0 0xe6508000 0 0x40>; 451 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 452 clocks = <&cpg CPG_MOD 931>; 453 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 454 resets = <&cpg 931>; 455 i2c-scl-internal-delay-ns = <6>; 456 status = "disabled"; 457 }; 458 459 i2c1: i2c@e6518000 { 460 #address-cells = <1>; 461 #size-cells = <0>; 462 compatible = "renesas,i2c-r8a7743", 463 "renesas,rcar-gen2-i2c"; 464 reg = <0 0xe6518000 0 0x40>; 465 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 466 clocks = <&cpg CPG_MOD 930>; 467 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 468 resets = <&cpg 930>; 469 i2c-scl-internal-delay-ns = <6>; 470 status = "disabled"; 471 }; 472 473 i2c2: i2c@e6530000 { 474 #address-cells = <1>; 475 #size-cells = <0>; 476 compatible = "renesas,i2c-r8a7743", 477 "renesas,rcar-gen2-i2c"; 478 reg = <0 0xe6530000 0 0x40>; 479 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 480 clocks = <&cpg CPG_MOD 929>; 481 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 482 resets = <&cpg 929>; 483 i2c-scl-internal-delay-ns = <6>; 484 status = "disabled"; 485 }; 486 487 i2c3: i2c@e6540000 { 488 #address-cells = <1>; 489 #size-cells = <0>; 490 compatible = "renesas,i2c-r8a7743", 491 "renesas,rcar-gen2-i2c"; 492 reg = <0 0xe6540000 0 0x40>; 493 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 494 clocks = <&cpg CPG_MOD 928>; 495 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 496 resets = <&cpg 928>; 497 i2c-scl-internal-delay-ns = <6>; 498 status = "disabled"; 499 }; 500 501 i2c4: i2c@e6520000 { 502 #address-cells = <1>; 503 #size-cells = <0>; 504 compatible = "renesas,i2c-r8a7743", 505 "renesas,rcar-gen2-i2c"; 506 reg = <0 0xe6520000 0 0x40>; 507 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 508 clocks = <&cpg CPG_MOD 927>; 509 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 510 resets = <&cpg 927>; 511 i2c-scl-internal-delay-ns = <6>; 512 status = "disabled"; 513 }; 514 515 i2c5: i2c@e6528000 { 516 /* doesn't need pinmux */ 517 #address-cells = <1>; 518 #size-cells = <0>; 519 compatible = "renesas,i2c-r8a7743", 520 "renesas,rcar-gen2-i2c"; 521 reg = <0 0xe6528000 0 0x40>; 522 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 523 clocks = <&cpg CPG_MOD 925>; 524 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 525 resets = <&cpg 925>; 526 i2c-scl-internal-delay-ns = <110>; 527 status = "disabled"; 528 }; 529 530 iic0: i2c@e6500000 { 531 #address-cells = <1>; 532 #size-cells = <0>; 533 compatible = "renesas,iic-r8a7743", 534 "renesas,rcar-gen2-iic", 535 "renesas,rmobile-iic"; 536 reg = <0 0xe6500000 0 0x425>; 537 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 538 clocks = <&cpg CPG_MOD 318>; 539 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 540 <&dmac1 0x61>, <&dmac1 0x62>; 541 dma-names = "tx", "rx", "tx", "rx"; 542 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 543 resets = <&cpg 318>; 544 status = "disabled"; 545 }; 546 547 iic1: i2c@e6510000 { 548 #address-cells = <1>; 549 #size-cells = <0>; 550 compatible = "renesas,iic-r8a7743", 551 "renesas,rcar-gen2-iic", 552 "renesas,rmobile-iic"; 553 reg = <0 0xe6510000 0 0x425>; 554 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 555 clocks = <&cpg CPG_MOD 323>; 556 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 557 <&dmac1 0x65>, <&dmac1 0x66>; 558 dma-names = "tx", "rx", "tx", "rx"; 559 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 560 resets = <&cpg 323>; 561 status = "disabled"; 562 }; 563 564 iic3: i2c@e60b0000 { 565 /* doesn't need pinmux */ 566 #address-cells = <1>; 567 #size-cells = <0>; 568 compatible = "renesas,iic-r8a7743"; 569 reg = <0 0xe60b0000 0 0x425>; 570 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 571 clocks = <&cpg CPG_MOD 926>; 572 dmas = <&dmac0 0x77>, <&dmac0 0x78>, 573 <&dmac1 0x77>, <&dmac1 0x78>; 574 dma-names = "tx", "rx", "tx", "rx"; 575 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 576 resets = <&cpg 926>; 577 status = "disabled"; 578 }; 579 580 hsusb: usb@e6590000 { 581 compatible = "renesas,usbhs-r8a7743", 582 "renesas,rcar-gen2-usbhs"; 583 reg = <0 0xe6590000 0 0x100>; 584 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 585 clocks = <&cpg CPG_MOD 704>; 586 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 587 <&usb_dmac1 0>, <&usb_dmac1 1>; 588 dma-names = "ch0", "ch1", "ch2", "ch3"; 589 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 590 resets = <&cpg 704>; 591 renesas,buswait = <4>; 592 phys = <&usb0 1>; 593 phy-names = "usb"; 594 status = "disabled"; 595 }; 596 597 usbphy: usb-phy@e6590100 { 598 compatible = "renesas,usb-phy-r8a7743", 599 "renesas,rcar-gen2-usb-phy"; 600 reg = <0 0xe6590100 0 0x100>; 601 #address-cells = <1>; 602 #size-cells = <0>; 603 clocks = <&cpg CPG_MOD 704>; 604 clock-names = "usbhs"; 605 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 606 resets = <&cpg 704>; 607 status = "disabled"; 608 609 usb0: usb-channel@0 { 610 reg = <0>; 611 #phy-cells = <1>; 612 }; 613 usb2: usb-channel@2 { 614 reg = <2>; 615 #phy-cells = <1>; 616 }; 617 }; 618 619 usb_dmac0: dma-controller@e65a0000 { 620 compatible = "renesas,r8a7743-usb-dmac", 621 "renesas,usb-dmac"; 622 reg = <0 0xe65a0000 0 0x100>; 623 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 624 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 625 interrupt-names = "ch0", "ch1"; 626 clocks = <&cpg CPG_MOD 330>; 627 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 628 resets = <&cpg 330>; 629 #dma-cells = <1>; 630 dma-channels = <2>; 631 }; 632 633 usb_dmac1: dma-controller@e65b0000 { 634 compatible = "renesas,r8a7743-usb-dmac", 635 "renesas,usb-dmac"; 636 reg = <0 0xe65b0000 0 0x100>; 637 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 638 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 639 interrupt-names = "ch0", "ch1"; 640 clocks = <&cpg CPG_MOD 331>; 641 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 642 resets = <&cpg 331>; 643 #dma-cells = <1>; 644 dma-channels = <2>; 645 }; 646 647 dmac0: dma-controller@e6700000 { 648 compatible = "renesas,dmac-r8a7743", 649 "renesas,rcar-dmac"; 650 reg = <0 0xe6700000 0 0x20000>; 651 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 652 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 653 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 654 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 655 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 656 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 657 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 658 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 659 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 660 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 661 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 662 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 663 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 664 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 665 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 666 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 667 interrupt-names = "error", 668 "ch0", "ch1", "ch2", "ch3", 669 "ch4", "ch5", "ch6", "ch7", 670 "ch8", "ch9", "ch10", "ch11", 671 "ch12", "ch13", "ch14"; 672 clocks = <&cpg CPG_MOD 219>; 673 clock-names = "fck"; 674 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 675 resets = <&cpg 219>; 676 #dma-cells = <1>; 677 dma-channels = <15>; 678 }; 679 680 dmac1: dma-controller@e6720000 { 681 compatible = "renesas,dmac-r8a7743", 682 "renesas,rcar-dmac"; 683 reg = <0 0xe6720000 0 0x20000>; 684 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 685 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 686 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 687 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 688 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 689 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 690 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 691 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 692 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 693 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 694 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 695 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 696 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 697 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 698 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 699 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 700 interrupt-names = "error", 701 "ch0", "ch1", "ch2", "ch3", 702 "ch4", "ch5", "ch6", "ch7", 703 "ch8", "ch9", "ch10", "ch11", 704 "ch12", "ch13", "ch14"; 705 clocks = <&cpg CPG_MOD 218>; 706 clock-names = "fck"; 707 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 708 resets = <&cpg 218>; 709 #dma-cells = <1>; 710 dma-channels = <15>; 711 }; 712 713 avb: ethernet@e6800000 { 714 compatible = "renesas,etheravb-r8a7743", 715 "renesas,etheravb-rcar-gen2"; 716 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 717 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 718 clocks = <&cpg CPG_MOD 812>; 719 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 720 resets = <&cpg 812>; 721 #address-cells = <1>; 722 #size-cells = <0>; 723 status = "disabled"; 724 }; 725 726 qspi: spi@e6b10000 { 727 compatible = "renesas,qspi-r8a7743", "renesas,qspi"; 728 reg = <0 0xe6b10000 0 0x2c>; 729 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 730 clocks = <&cpg CPG_MOD 917>; 731 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 732 <&dmac1 0x17>, <&dmac1 0x18>; 733 dma-names = "tx", "rx", "tx", "rx"; 734 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 735 num-cs = <1>; 736 #address-cells = <1>; 737 #size-cells = <0>; 738 resets = <&cpg 917>; 739 status = "disabled"; 740 }; 741 742 scifa0: serial@e6c40000 { 743 compatible = "renesas,scifa-r8a7743", 744 "renesas,rcar-gen2-scifa", "renesas,scifa"; 745 reg = <0 0xe6c40000 0 0x40>; 746 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 747 clocks = <&cpg CPG_MOD 204>; 748 clock-names = "fck"; 749 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 750 <&dmac1 0x21>, <&dmac1 0x22>; 751 dma-names = "tx", "rx", "tx", "rx"; 752 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 753 resets = <&cpg 204>; 754 status = "disabled"; 755 }; 756 757 scifa1: serial@e6c50000 { 758 compatible = "renesas,scifa-r8a7743", 759 "renesas,rcar-gen2-scifa", "renesas,scifa"; 760 reg = <0 0xe6c50000 0 0x40>; 761 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 762 clocks = <&cpg CPG_MOD 203>; 763 clock-names = "fck"; 764 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 765 <&dmac1 0x25>, <&dmac1 0x26>; 766 dma-names = "tx", "rx", "tx", "rx"; 767 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 768 resets = <&cpg 203>; 769 status = "disabled"; 770 }; 771 772 scifa2: serial@e6c60000 { 773 compatible = "renesas,scifa-r8a7743", 774 "renesas,rcar-gen2-scifa", "renesas,scifa"; 775 reg = <0 0xe6c60000 0 0x40>; 776 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 777 clocks = <&cpg CPG_MOD 202>; 778 clock-names = "fck"; 779 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 780 <&dmac1 0x27>, <&dmac1 0x28>; 781 dma-names = "tx", "rx", "tx", "rx"; 782 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 783 resets = <&cpg 202>; 784 status = "disabled"; 785 }; 786 787 scifa3: serial@e6c70000 { 788 compatible = "renesas,scifa-r8a7743", 789 "renesas,rcar-gen2-scifa", "renesas,scifa"; 790 reg = <0 0xe6c70000 0 0x40>; 791 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 792 clocks = <&cpg CPG_MOD 1106>; 793 clock-names = "fck"; 794 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 795 <&dmac1 0x1b>, <&dmac1 0x1c>; 796 dma-names = "tx", "rx", "tx", "rx"; 797 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 798 resets = <&cpg 1106>; 799 status = "disabled"; 800 }; 801 802 scifa4: serial@e6c78000 { 803 compatible = "renesas,scifa-r8a7743", 804 "renesas,rcar-gen2-scifa", "renesas,scifa"; 805 reg = <0 0xe6c78000 0 0x40>; 806 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 807 clocks = <&cpg CPG_MOD 1107>; 808 clock-names = "fck"; 809 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 810 <&dmac1 0x1f>, <&dmac1 0x20>; 811 dma-names = "tx", "rx", "tx", "rx"; 812 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 813 resets = <&cpg 1107>; 814 status = "disabled"; 815 }; 816 817 scifa5: serial@e6c80000 { 818 compatible = "renesas,scifa-r8a7743", 819 "renesas,rcar-gen2-scifa", "renesas,scifa"; 820 reg = <0 0xe6c80000 0 0x40>; 821 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 822 clocks = <&cpg CPG_MOD 1108>; 823 clock-names = "fck"; 824 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 825 <&dmac1 0x23>, <&dmac1 0x24>; 826 dma-names = "tx", "rx", "tx", "rx"; 827 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 828 resets = <&cpg 1108>; 829 status = "disabled"; 830 }; 831 832 scifb0: serial@e6c20000 { 833 compatible = "renesas,scifb-r8a7743", 834 "renesas,rcar-gen2-scifb", "renesas,scifb"; 835 reg = <0 0xe6c20000 0 0x100>; 836 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 837 clocks = <&cpg CPG_MOD 206>; 838 clock-names = "fck"; 839 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 840 <&dmac1 0x3d>, <&dmac1 0x3e>; 841 dma-names = "tx", "rx", "tx", "rx"; 842 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 843 resets = <&cpg 206>; 844 status = "disabled"; 845 }; 846 847 scifb1: serial@e6c30000 { 848 compatible = "renesas,scifb-r8a7743", 849 "renesas,rcar-gen2-scifb", "renesas,scifb"; 850 reg = <0 0xe6c30000 0 0x100>; 851 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 852 clocks = <&cpg CPG_MOD 207>; 853 clock-names = "fck"; 854 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 855 <&dmac1 0x19>, <&dmac1 0x1a>; 856 dma-names = "tx", "rx", "tx", "rx"; 857 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 858 resets = <&cpg 207>; 859 status = "disabled"; 860 }; 861 862 scifb2: serial@e6ce0000 { 863 compatible = "renesas,scifb-r8a7743", 864 "renesas,rcar-gen2-scifb", "renesas,scifb"; 865 reg = <0 0xe6ce0000 0 0x100>; 866 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 867 clocks = <&cpg CPG_MOD 216>; 868 clock-names = "fck"; 869 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 870 <&dmac1 0x1d>, <&dmac1 0x1e>; 871 dma-names = "tx", "rx", "tx", "rx"; 872 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 873 resets = <&cpg 216>; 874 status = "disabled"; 875 }; 876 877 scif0: serial@e6e60000 { 878 compatible = "renesas,scif-r8a7743", 879 "renesas,rcar-gen2-scif", "renesas,scif"; 880 reg = <0 0xe6e60000 0 0x40>; 881 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 882 clocks = <&cpg CPG_MOD 721>, 883 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 884 clock-names = "fck", "brg_int", "scif_clk"; 885 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 886 <&dmac1 0x29>, <&dmac1 0x2a>; 887 dma-names = "tx", "rx", "tx", "rx"; 888 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 889 resets = <&cpg 721>; 890 status = "disabled"; 891 }; 892 893 scif1: serial@e6e68000 { 894 compatible = "renesas,scif-r8a7743", 895 "renesas,rcar-gen2-scif", "renesas,scif"; 896 reg = <0 0xe6e68000 0 0x40>; 897 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 898 clocks = <&cpg CPG_MOD 720>, 899 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 900 clock-names = "fck", "brg_int", "scif_clk"; 901 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 902 <&dmac1 0x2d>, <&dmac1 0x2e>; 903 dma-names = "tx", "rx", "tx", "rx"; 904 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 905 resets = <&cpg 720>; 906 status = "disabled"; 907 }; 908 909 scif2: serial@e6e58000 { 910 compatible = "renesas,scif-r8a7743", 911 "renesas,rcar-gen2-scif", "renesas,scif"; 912 reg = <0 0xe6e58000 0 0x40>; 913 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 914 clocks = <&cpg CPG_MOD 719>, 915 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 916 clock-names = "fck", "brg_int", "scif_clk"; 917 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 918 <&dmac1 0x2b>, <&dmac1 0x2c>; 919 dma-names = "tx", "rx", "tx", "rx"; 920 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 921 resets = <&cpg 719>; 922 status = "disabled"; 923 }; 924 925 scif3: serial@e6ea8000 { 926 compatible = "renesas,scif-r8a7743", 927 "renesas,rcar-gen2-scif", "renesas,scif"; 928 reg = <0 0xe6ea8000 0 0x40>; 929 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 930 clocks = <&cpg CPG_MOD 718>, 931 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 932 clock-names = "fck", "brg_int", "scif_clk"; 933 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 934 <&dmac1 0x2f>, <&dmac1 0x30>; 935 dma-names = "tx", "rx", "tx", "rx"; 936 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 937 resets = <&cpg 718>; 938 status = "disabled"; 939 }; 940 941 scif4: serial@e6ee0000 { 942 compatible = "renesas,scif-r8a7743", 943 "renesas,rcar-gen2-scif", "renesas,scif"; 944 reg = <0 0xe6ee0000 0 0x40>; 945 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 946 clocks = <&cpg CPG_MOD 715>, 947 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 948 clock-names = "fck", "brg_int", "scif_clk"; 949 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 950 <&dmac1 0xfb>, <&dmac1 0xfc>; 951 dma-names = "tx", "rx", "tx", "rx"; 952 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 953 resets = <&cpg 715>; 954 status = "disabled"; 955 }; 956 957 scif5: serial@e6ee8000 { 958 compatible = "renesas,scif-r8a7743", 959 "renesas,rcar-gen2-scif", "renesas,scif"; 960 reg = <0 0xe6ee8000 0 0x40>; 961 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 962 clocks = <&cpg CPG_MOD 714>, 963 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 964 clock-names = "fck", "brg_int", "scif_clk"; 965 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 966 <&dmac1 0xfd>, <&dmac1 0xfe>; 967 dma-names = "tx", "rx", "tx", "rx"; 968 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 969 resets = <&cpg 714>; 970 status = "disabled"; 971 }; 972 973 hscif0: serial@e62c0000 { 974 compatible = "renesas,hscif-r8a7743", 975 "renesas,rcar-gen2-hscif", "renesas,hscif"; 976 reg = <0 0xe62c0000 0 0x60>; 977 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 978 clocks = <&cpg CPG_MOD 717>, 979 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 980 clock-names = "fck", "brg_int", "scif_clk"; 981 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 982 <&dmac1 0x39>, <&dmac1 0x3a>; 983 dma-names = "tx", "rx", "tx", "rx"; 984 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 985 resets = <&cpg 717>; 986 status = "disabled"; 987 }; 988 989 hscif1: serial@e62c8000 { 990 compatible = "renesas,hscif-r8a7743", 991 "renesas,rcar-gen2-hscif", "renesas,hscif"; 992 reg = <0 0xe62c8000 0 0x60>; 993 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 994 clocks = <&cpg CPG_MOD 716>, 995 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 996 clock-names = "fck", "brg_int", "scif_clk"; 997 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 998 <&dmac1 0x4d>, <&dmac1 0x4e>; 999 dma-names = "tx", "rx", "tx", "rx"; 1000 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1001 resets = <&cpg 716>; 1002 status = "disabled"; 1003 }; 1004 1005 hscif2: serial@e62d0000 { 1006 compatible = "renesas,hscif-r8a7743", 1007 "renesas,rcar-gen2-hscif", "renesas,hscif"; 1008 reg = <0 0xe62d0000 0 0x60>; 1009 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1010 clocks = <&cpg CPG_MOD 713>, 1011 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 1012 clock-names = "fck", "brg_int", "scif_clk"; 1013 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 1014 <&dmac1 0x3b>, <&dmac1 0x3c>; 1015 dma-names = "tx", "rx", "tx", "rx"; 1016 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1017 resets = <&cpg 713>; 1018 status = "disabled"; 1019 }; 1020 1021 msiof0: spi@e6e20000 { 1022 compatible = "renesas,msiof-r8a7743", 1023 "renesas,rcar-gen2-msiof"; 1024 reg = <0 0xe6e20000 0 0x0064>; 1025 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1026 clocks = <&cpg CPG_MOD 000>; 1027 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 1028 <&dmac1 0x51>, <&dmac1 0x52>; 1029 dma-names = "tx", "rx", "tx", "rx"; 1030 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1031 #address-cells = <1>; 1032 #size-cells = <0>; 1033 resets = <&cpg 000>; 1034 status = "disabled"; 1035 }; 1036 1037 msiof1: spi@e6e10000 { 1038 compatible = "renesas,msiof-r8a7743", 1039 "renesas,rcar-gen2-msiof"; 1040 reg = <0 0xe6e10000 0 0x0064>; 1041 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1042 clocks = <&cpg CPG_MOD 208>; 1043 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 1044 <&dmac1 0x55>, <&dmac1 0x56>; 1045 dma-names = "tx", "rx", "tx", "rx"; 1046 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1047 #address-cells = <1>; 1048 #size-cells = <0>; 1049 resets = <&cpg 208>; 1050 status = "disabled"; 1051 }; 1052 1053 msiof2: spi@e6e00000 { 1054 compatible = "renesas,msiof-r8a7743", 1055 "renesas,rcar-gen2-msiof"; 1056 reg = <0 0xe6e00000 0 0x0064>; 1057 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1058 clocks = <&cpg CPG_MOD 205>; 1059 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 1060 <&dmac1 0x41>, <&dmac1 0x42>; 1061 dma-names = "tx", "rx", "tx", "rx"; 1062 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1063 #address-cells = <1>; 1064 #size-cells = <0>; 1065 resets = <&cpg 205>; 1066 status = "disabled"; 1067 }; 1068 1069 pwm0: pwm@e6e30000 { 1070 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1071 reg = <0 0xe6e30000 0 0x8>; 1072 clocks = <&cpg CPG_MOD 523>; 1073 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1074 resets = <&cpg 523>; 1075 #pwm-cells = <2>; 1076 status = "disabled"; 1077 }; 1078 1079 pwm1: pwm@e6e31000 { 1080 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1081 reg = <0 0xe6e31000 0 0x8>; 1082 clocks = <&cpg CPG_MOD 523>; 1083 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1084 resets = <&cpg 523>; 1085 #pwm-cells = <2>; 1086 status = "disabled"; 1087 }; 1088 1089 pwm2: pwm@e6e32000 { 1090 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1091 reg = <0 0xe6e32000 0 0x8>; 1092 clocks = <&cpg CPG_MOD 523>; 1093 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1094 resets = <&cpg 523>; 1095 #pwm-cells = <2>; 1096 status = "disabled"; 1097 }; 1098 1099 pwm3: pwm@e6e33000 { 1100 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1101 reg = <0 0xe6e33000 0 0x8>; 1102 clocks = <&cpg CPG_MOD 523>; 1103 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1104 resets = <&cpg 523>; 1105 #pwm-cells = <2>; 1106 status = "disabled"; 1107 }; 1108 1109 pwm4: pwm@e6e34000 { 1110 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1111 reg = <0 0xe6e34000 0 0x8>; 1112 clocks = <&cpg CPG_MOD 523>; 1113 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1114 resets = <&cpg 523>; 1115 #pwm-cells = <2>; 1116 status = "disabled"; 1117 }; 1118 1119 pwm5: pwm@e6e35000 { 1120 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1121 reg = <0 0xe6e35000 0 0x8>; 1122 clocks = <&cpg CPG_MOD 523>; 1123 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1124 resets = <&cpg 523>; 1125 #pwm-cells = <2>; 1126 status = "disabled"; 1127 }; 1128 1129 pwm6: pwm@e6e36000 { 1130 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1131 reg = <0 0xe6e36000 0 0x8>; 1132 clocks = <&cpg CPG_MOD 523>; 1133 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1134 resets = <&cpg 523>; 1135 #pwm-cells = <2>; 1136 status = "disabled"; 1137 }; 1138 1139 can0: can@e6e80000 { 1140 compatible = "renesas,can-r8a7743", 1141 "renesas,rcar-gen2-can"; 1142 reg = <0 0xe6e80000 0 0x1000>; 1143 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1144 clocks = <&cpg CPG_MOD 916>, 1145 <&cpg CPG_CORE R8A7743_CLK_RCAN>, 1146 <&can_clk>; 1147 clock-names = "clkp1", "clkp2", "can_clk"; 1148 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1149 resets = <&cpg 916>; 1150 status = "disabled"; 1151 }; 1152 1153 can1: can@e6e88000 { 1154 compatible = "renesas,can-r8a7743", 1155 "renesas,rcar-gen2-can"; 1156 reg = <0 0xe6e88000 0 0x1000>; 1157 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1158 clocks = <&cpg CPG_MOD 915>, 1159 <&cpg CPG_CORE R8A7743_CLK_RCAN>, 1160 <&can_clk>; 1161 clock-names = "clkp1", "clkp2", "can_clk"; 1162 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1163 resets = <&cpg 915>; 1164 status = "disabled"; 1165 }; 1166 1167 vin0: video@e6ef0000 { 1168 compatible = "renesas,vin-r8a7743", 1169 "renesas,rcar-gen2-vin"; 1170 reg = <0 0xe6ef0000 0 0x1000>; 1171 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1172 clocks = <&cpg CPG_MOD 811>; 1173 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1174 resets = <&cpg 811>; 1175 status = "disabled"; 1176 }; 1177 1178 vin1: video@e6ef1000 { 1179 compatible = "renesas,vin-r8a7743", 1180 "renesas,rcar-gen2-vin"; 1181 reg = <0 0xe6ef1000 0 0x1000>; 1182 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1183 clocks = <&cpg CPG_MOD 810>; 1184 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1185 resets = <&cpg 810>; 1186 status = "disabled"; 1187 }; 1188 1189 vin2: video@e6ef2000 { 1190 compatible = "renesas,vin-r8a7743", 1191 "renesas,rcar-gen2-vin"; 1192 reg = <0 0xe6ef2000 0 0x1000>; 1193 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1194 clocks = <&cpg CPG_MOD 809>; 1195 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1196 resets = <&cpg 809>; 1197 status = "disabled"; 1198 }; 1199 1200 rcar_sound: sound@ec500000 { 1201 /* 1202 * #sound-dai-cells is required 1203 * 1204 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1205 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1206 */ 1207 compatible = "renesas,rcar_sound-r8a7743", 1208 "renesas,rcar_sound-gen2"; 1209 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1210 <0 0xec5a0000 0 0x100>, /* ADG */ 1211 <0 0xec540000 0 0x1000>, /* SSIU */ 1212 <0 0xec541000 0 0x280>, /* SSI */ 1213 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1214 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1215 1216 clocks = <&cpg CPG_MOD 1005>, 1217 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1218 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1219 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1220 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1221 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1222 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1223 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1224 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1225 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1226 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1227 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1228 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1229 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1230 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, 1231 <&cpg CPG_CORE R8A7743_CLK_M2>; 1232 clock-names = "ssi-all", 1233 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", 1234 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", 1235 "src.9", "src.8", "src.7", "src.6", "src.5", 1236 "src.4", "src.3", "src.2", "src.1", "src.0", 1237 "ctu.0", "ctu.1", 1238 "mix.0", "mix.1", 1239 "dvc.0", "dvc.1", 1240 "clk_a", "clk_b", "clk_c", "clk_i"; 1241 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1242 resets = <&cpg 1005>, 1243 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>, 1244 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>, 1245 <&cpg 1014>, <&cpg 1015>; 1246 reset-names = "ssi-all", 1247 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", 1248 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0"; 1249 status = "disabled"; 1250 1251 rcar_sound,dvc { 1252 dvc0: dvc-0 { 1253 dmas = <&audma1 0xbc>; 1254 dma-names = "tx"; 1255 }; 1256 dvc1: dvc-1 { 1257 dmas = <&audma1 0xbe>; 1258 dma-names = "tx"; 1259 }; 1260 }; 1261 1262 rcar_sound,mix { 1263 mix0: mix-0 { }; 1264 mix1: mix-1 { }; 1265 }; 1266 1267 rcar_sound,ctu { 1268 ctu00: ctu-0 { }; 1269 ctu01: ctu-1 { }; 1270 ctu02: ctu-2 { }; 1271 ctu03: ctu-3 { }; 1272 ctu10: ctu-4 { }; 1273 ctu11: ctu-5 { }; 1274 ctu12: ctu-6 { }; 1275 ctu13: ctu-7 { }; 1276 }; 1277 1278 rcar_sound,src { 1279 src0: src-0 { 1280 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1281 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1282 dma-names = "rx", "tx"; 1283 }; 1284 src1: src-1 { 1285 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1286 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1287 dma-names = "rx", "tx"; 1288 }; 1289 src2: src-2 { 1290 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1291 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1292 dma-names = "rx", "tx"; 1293 }; 1294 src3: src-3 { 1295 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1296 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1297 dma-names = "rx", "tx"; 1298 }; 1299 src4: src-4 { 1300 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1301 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1302 dma-names = "rx", "tx"; 1303 }; 1304 src5: src-5 { 1305 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1306 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1307 dma-names = "rx", "tx"; 1308 }; 1309 src6: src-6 { 1310 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1311 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1312 dma-names = "rx", "tx"; 1313 }; 1314 src7: src-7 { 1315 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1316 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1317 dma-names = "rx", "tx"; 1318 }; 1319 src8: src-8 { 1320 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1321 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1322 dma-names = "rx", "tx"; 1323 }; 1324 src9: src-9 { 1325 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1326 dmas = <&audma0 0x97>, <&audma1 0xba>; 1327 dma-names = "rx", "tx"; 1328 }; 1329 }; 1330 1331 rcar_sound,ssi { 1332 ssi0: ssi-0 { 1333 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1334 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; 1335 dma-names = "rx", "tx", "rxu", "txu"; 1336 }; 1337 ssi1: ssi-1 { 1338 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1339 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; 1340 dma-names = "rx", "tx", "rxu", "txu"; 1341 }; 1342 ssi2: ssi-2 { 1343 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1344 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; 1345 dma-names = "rx", "tx", "rxu", "txu"; 1346 }; 1347 ssi3: ssi-3 { 1348 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1349 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; 1350 dma-names = "rx", "tx", "rxu", "txu"; 1351 }; 1352 ssi4: ssi-4 { 1353 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1354 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; 1355 dma-names = "rx", "tx", "rxu", "txu"; 1356 }; 1357 ssi5: ssi-5 { 1358 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1359 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; 1360 dma-names = "rx", "tx", "rxu", "txu"; 1361 }; 1362 ssi6: ssi-6 { 1363 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1364 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; 1365 dma-names = "rx", "tx", "rxu", "txu"; 1366 }; 1367 ssi7: ssi-7 { 1368 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1369 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; 1370 dma-names = "rx", "tx", "rxu", "txu"; 1371 }; 1372 ssi8: ssi-8 { 1373 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1374 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; 1375 dma-names = "rx", "tx", "rxu", "txu"; 1376 }; 1377 ssi9: ssi-9 { 1378 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1379 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; 1380 dma-names = "rx", "tx", "rxu", "txu"; 1381 }; 1382 }; 1383 }; 1384 1385 audma0: dma-controller@ec700000 { 1386 compatible = "renesas,dmac-r8a7743", 1387 "renesas,rcar-dmac"; 1388 reg = <0 0xec700000 0 0x10000>; 1389 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH 1390 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1391 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1392 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1393 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1394 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1395 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1396 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1397 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1398 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1399 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1400 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1401 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1402 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1403 interrupt-names = "error", 1404 "ch0", "ch1", "ch2", "ch3", 1405 "ch4", "ch5", "ch6", "ch7", 1406 "ch8", "ch9", "ch10", "ch11", 1407 "ch12"; 1408 clocks = <&cpg CPG_MOD 502>; 1409 clock-names = "fck"; 1410 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1411 resets = <&cpg 502>; 1412 #dma-cells = <1>; 1413 dma-channels = <13>; 1414 }; 1415 1416 audma1: dma-controller@ec720000 { 1417 compatible = "renesas,dmac-r8a7743", 1418 "renesas,rcar-dmac"; 1419 reg = <0 0xec720000 0 0x10000>; 1420 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 1421 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1422 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1423 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH 1424 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 1425 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 1426 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 1427 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 1428 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 1429 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 1430 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 1431 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 1432 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 1433 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 1434 interrupt-names = "error", 1435 "ch0", "ch1", "ch2", "ch3", 1436 "ch4", "ch5", "ch6", "ch7", 1437 "ch8", "ch9", "ch10", "ch11", 1438 "ch12"; 1439 clocks = <&cpg CPG_MOD 501>; 1440 clock-names = "fck"; 1441 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1442 resets = <&cpg 501>; 1443 #dma-cells = <1>; 1444 dma-channels = <13>; 1445 }; 1446 1447 /* 1448 * pci1 and xhci share the same phy, therefore only one of them 1449 * can be active at any one time. If both of them are enabled, 1450 * a race condition will determine who'll control the phy. 1451 * A firmware file is needed by the xhci driver in order for 1452 * USB 3.0 to work properly. 1453 */ 1454 xhci: usb@ee000000 { 1455 compatible = "renesas,xhci-r8a7743", 1456 "renesas,rcar-gen2-xhci"; 1457 reg = <0 0xee000000 0 0xc00>; 1458 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 1459 clocks = <&cpg CPG_MOD 328>; 1460 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1461 resets = <&cpg 328>; 1462 phys = <&usb2 1>; 1463 phy-names = "usb"; 1464 status = "disabled"; 1465 }; 1466 1467 pci0: pci@ee090000 { 1468 compatible = "renesas,pci-r8a7743", 1469 "renesas,pci-rcar-gen2"; 1470 device_type = "pci"; 1471 reg = <0 0xee090000 0 0xc00>, 1472 <0 0xee080000 0 0x1100>; 1473 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1474 clocks = <&cpg CPG_MOD 703>; 1475 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1476 resets = <&cpg 703>; 1477 status = "disabled"; 1478 1479 bus-range = <0 0>; 1480 #address-cells = <3>; 1481 #size-cells = <2>; 1482 #interrupt-cells = <1>; 1483 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1484 interrupt-map-mask = <0xff00 0 0 0x7>; 1485 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 1486 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 1487 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1488 1489 usb@1,0 { 1490 reg = <0x800 0 0 0 0>; 1491 phys = <&usb0 0>; 1492 phy-names = "usb"; 1493 }; 1494 1495 usb@2,0 { 1496 reg = <0x1000 0 0 0 0>; 1497 phys = <&usb0 0>; 1498 phy-names = "usb"; 1499 }; 1500 }; 1501 1502 pci1: pci@ee0d0000 { 1503 compatible = "renesas,pci-r8a7743", 1504 "renesas,pci-rcar-gen2"; 1505 device_type = "pci"; 1506 reg = <0 0xee0d0000 0 0xc00>, 1507 <0 0xee0c0000 0 0x1100>; 1508 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1509 clocks = <&cpg CPG_MOD 703>; 1510 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1511 resets = <&cpg 703>; 1512 status = "disabled"; 1513 1514 bus-range = <1 1>; 1515 #address-cells = <3>; 1516 #size-cells = <2>; 1517 #interrupt-cells = <1>; 1518 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1519 interrupt-map-mask = <0xff00 0 0 0x7>; 1520 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 1521 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 1522 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1523 1524 usb@1,0 { 1525 reg = <0x10800 0 0 0 0>; 1526 phys = <&usb2 0>; 1527 phy-names = "usb"; 1528 }; 1529 1530 usb@2,0 { 1531 reg = <0x11000 0 0 0 0>; 1532 phys = <&usb2 0>; 1533 phy-names = "usb"; 1534 }; 1535 }; 1536 1537 sdhi0: sd@ee100000 { 1538 compatible = "renesas,sdhi-r8a7743", 1539 "renesas,rcar-gen2-sdhi"; 1540 reg = <0 0xee100000 0 0x328>; 1541 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1542 clocks = <&cpg CPG_MOD 314>; 1543 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1544 <&dmac1 0xcd>, <&dmac1 0xce>; 1545 dma-names = "tx", "rx", "tx", "rx"; 1546 max-frequency = <195000000>; 1547 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1548 resets = <&cpg 314>; 1549 status = "disabled"; 1550 }; 1551 1552 sdhi1: sd@ee140000 { 1553 compatible = "renesas,sdhi-r8a7743", 1554 "renesas,rcar-gen2-sdhi"; 1555 reg = <0 0xee140000 0 0x100>; 1556 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1557 clocks = <&cpg CPG_MOD 312>; 1558 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1559 <&dmac1 0xc1>, <&dmac1 0xc2>; 1560 dma-names = "tx", "rx", "tx", "rx"; 1561 max-frequency = <97500000>; 1562 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1563 resets = <&cpg 312>; 1564 status = "disabled"; 1565 }; 1566 1567 sdhi2: sd@ee160000 { 1568 compatible = "renesas,sdhi-r8a7743", 1569 "renesas,rcar-gen2-sdhi"; 1570 reg = <0 0xee160000 0 0x100>; 1571 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1572 clocks = <&cpg CPG_MOD 311>; 1573 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1574 <&dmac1 0xd3>, <&dmac1 0xd4>; 1575 dma-names = "tx", "rx", "tx", "rx"; 1576 max-frequency = <97500000>; 1577 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1578 resets = <&cpg 311>; 1579 status = "disabled"; 1580 }; 1581 1582 mmcif0: mmc@ee200000 { 1583 compatible = "renesas,mmcif-r8a7743", 1584 "renesas,sh-mmcif"; 1585 reg = <0 0xee200000 0 0x80>; 1586 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1587 clocks = <&cpg CPG_MOD 315>; 1588 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1589 <&dmac1 0xd1>, <&dmac1 0xd2>; 1590 dma-names = "tx", "rx", "tx", "rx"; 1591 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1592 resets = <&cpg 315>; 1593 reg-io-width = <4>; 1594 max-frequency = <97500000>; 1595 status = "disabled"; 1596 }; 1597 1598 ether: ethernet@ee700000 { 1599 compatible = "renesas,ether-r8a7743", 1600 "renesas,rcar-gen2-ether"; 1601 reg = <0 0xee700000 0 0x400>; 1602 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1603 clocks = <&cpg CPG_MOD 813>; 1604 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1605 resets = <&cpg 813>; 1606 phy-mode = "rmii"; 1607 #address-cells = <1>; 1608 #size-cells = <0>; 1609 status = "disabled"; 1610 }; 1611 1612 gic: interrupt-controller@f1001000 { 1613 compatible = "arm,gic-400"; 1614 #interrupt-cells = <3>; 1615 #address-cells = <0>; 1616 interrupt-controller; 1617 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1618 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1619 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1620 clocks = <&cpg CPG_MOD 408>; 1621 clock-names = "clk"; 1622 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1623 resets = <&cpg 408>; 1624 }; 1625 1626 pciec: pcie@fe000000 { 1627 compatible = "renesas,pcie-r8a7743", 1628 "renesas,pcie-rcar-gen2"; 1629 reg = <0 0xfe000000 0 0x80000>; 1630 #address-cells = <3>; 1631 #size-cells = <2>; 1632 bus-range = <0x00 0xff>; 1633 device_type = "pci"; 1634 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1635 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1636 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1637 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1638 /* Map all possible DDR as inbound ranges */ 1639 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 1640 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; 1641 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1642 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1643 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1644 #interrupt-cells = <1>; 1645 interrupt-map-mask = <0 0 0 0>; 1646 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1647 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1648 clock-names = "pcie", "pcie_bus"; 1649 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1650 resets = <&cpg 319>; 1651 status = "disabled"; 1652 }; 1653 1654 vsp@fe928000 { 1655 compatible = "renesas,vsp1"; 1656 reg = <0 0xfe928000 0 0x8000>; 1657 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1658 clocks = <&cpg CPG_MOD 131>; 1659 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1660 resets = <&cpg 131>; 1661 }; 1662 1663 vsp@fe930000 { 1664 compatible = "renesas,vsp1"; 1665 reg = <0 0xfe930000 0 0x8000>; 1666 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1667 clocks = <&cpg CPG_MOD 128>; 1668 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1669 resets = <&cpg 128>; 1670 }; 1671 1672 vsp@fe938000 { 1673 compatible = "renesas,vsp1"; 1674 reg = <0 0xfe938000 0 0x8000>; 1675 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 1676 clocks = <&cpg CPG_MOD 127>; 1677 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1678 resets = <&cpg 127>; 1679 }; 1680 1681 du: display@feb00000 { 1682 compatible = "renesas,du-r8a7743"; 1683 reg = <0 0xfeb00000 0 0x40000>, 1684 <0 0xfeb90000 0 0x1c>; 1685 reg-names = "du", "lvds.0"; 1686 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1687 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1688 clocks = <&cpg CPG_MOD 724>, 1689 <&cpg CPG_MOD 723>, 1690 <&cpg CPG_MOD 726>; 1691 clock-names = "du.0", "du.1", "lvds.0"; 1692 status = "disabled"; 1693 1694 ports { 1695 #address-cells = <1>; 1696 #size-cells = <0>; 1697 1698 port@0 { 1699 reg = <0>; 1700 du_out_rgb: endpoint { 1701 }; 1702 }; 1703 port@1 { 1704 reg = <1>; 1705 du_out_lvds0: endpoint { 1706 }; 1707 }; 1708 }; 1709 }; 1710 1711 prr: chipid@ff000044 { 1712 compatible = "renesas,prr"; 1713 reg = <0 0xff000044 0 4>; 1714 }; 1715 1716 cmt0: timer@ffca0000 { 1717 compatible = "renesas,r8a7743-cmt0", 1718 "renesas,rcar-gen2-cmt0"; 1719 reg = <0 0xffca0000 0 0x1004>; 1720 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1721 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1722 clocks = <&cpg CPG_MOD 124>; 1723 clock-names = "fck"; 1724 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1725 resets = <&cpg 124>; 1726 status = "disabled"; 1727 }; 1728 1729 cmt1: timer@e6130000 { 1730 compatible = "renesas,r8a7743-cmt1", 1731 "renesas,rcar-gen2-cmt1"; 1732 reg = <0 0xe6130000 0 0x1004>; 1733 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1734 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1735 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1736 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1737 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1738 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1739 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1740 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1741 clocks = <&cpg CPG_MOD 329>; 1742 clock-names = "fck"; 1743 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1744 resets = <&cpg 329>; 1745 status = "disabled"; 1746 }; 1747 }; 1748 1749 thermal-zones { 1750 cpu_thermal: cpu-thermal { 1751 polling-delay-passive = <0>; 1752 polling-delay = <0>; 1753 1754 thermal-sensors = <&thermal>; 1755 1756 trips { 1757 cpu-crit { 1758 temperature = <95000>; 1759 hysteresis = <0>; 1760 type = "critical"; 1761 }; 1762 }; 1763 1764 cooling-maps { 1765 }; 1766 }; 1767 }; 1768 1769 timer { 1770 compatible = "arm,armv7-timer"; 1771 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1772 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1773 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1774 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1775 }; 1776 1777 /* External USB clock - can be overridden by the board */ 1778 usb_extal_clk: usb_extal { 1779 compatible = "fixed-clock"; 1780 #clock-cells = <0>; 1781 clock-frequency = <48000000>; 1782 }; 1783}; 1784