1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Samsung's S5PV210 SoC device tree source 4 * 5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 6 * 7 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com> 8 * Tomasz Figa <t.figa@samsung.com> 9 * 10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210 11 * based board files can include this file and provide values for board specfic 12 * bindings. 13 * 14 * Note: This file does not include device nodes for all the controllers in 15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional 16 * nodes can be added to this file. 17 */ 18 19#include <dt-bindings/clock/s5pv210.h> 20#include <dt-bindings/clock/s5pv210-audss.h> 21 22/ { 23 #address-cells = <1>; 24 #size-cells = <1>; 25 26 aliases { 27 csis0 = &csis0; 28 fimc0 = &fimc0; 29 fimc1 = &fimc1; 30 fimc2 = &fimc2; 31 i2c0 = &i2c0; 32 i2c1 = &i2c1; 33 i2c2 = &i2c2; 34 i2s0 = &i2s0; 35 i2s1 = &i2s1; 36 i2s2 = &i2s2; 37 pinctrl0 = &pinctrl0; 38 spi0 = &spi0; 39 spi1 = &spi1; 40 }; 41 42 cpus { 43 #address-cells = <1>; 44 #size-cells = <0>; 45 46 cpu@0 { 47 device_type = "cpu"; 48 compatible = "arm,cortex-a8"; 49 reg = <0>; 50 }; 51 }; 52 53 soc { 54 compatible = "simple-bus"; 55 #address-cells = <1>; 56 #size-cells = <1>; 57 ranges; 58 59 external-clocks { 60 compatible = "simple-bus"; 61 #address-cells = <1>; 62 #size-cells = <0>; 63 64 xxti: oscillator@0 { 65 compatible = "fixed-clock"; 66 reg = <0>; 67 clock-frequency = <0>; 68 clock-output-names = "xxti"; 69 #clock-cells = <0>; 70 }; 71 72 xusbxti: oscillator@1 { 73 compatible = "fixed-clock"; 74 reg = <1>; 75 clock-frequency = <0>; 76 clock-output-names = "xusbxti"; 77 #clock-cells = <0>; 78 }; 79 }; 80 81 onenand: onenand@b0000000 { 82 compatible = "samsung,s5pv210-onenand"; 83 reg = <0xb0600000 0x2000>, 84 <0xb0000000 0x20000>, 85 <0xb0040000 0x20000>; 86 interrupt-parent = <&vic1>; 87 interrupts = <31>; 88 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; 89 clock-names = "bus", "onenand"; 90 #address-cells = <1>; 91 #size-cells = <1>; 92 status = "disabled"; 93 }; 94 95 chipid@e0000000 { 96 compatible = "samsung,s5pv210-chipid"; 97 reg = <0xe0000000 0x1000>; 98 }; 99 100 clocks: clock-controller@e0100000 { 101 compatible = "samsung,s5pv210-clock"; 102 reg = <0xe0100000 0x10000>; 103 clock-names = "xxti", "xusbxti"; 104 clocks = <&xxti>, <&xusbxti>; 105 #clock-cells = <1>; 106 }; 107 108 pmu_syscon: syscon@e0108000 { 109 compatible = "samsung-s5pv210-pmu", "syscon"; 110 reg = <0xe0108000 0x8000>; 111 }; 112 113 pinctrl0: pinctrl@e0200000 { 114 compatible = "samsung,s5pv210-pinctrl"; 115 reg = <0xe0200000 0x1000>; 116 interrupt-parent = <&vic0>; 117 interrupts = <30>; 118 119 wakeup-interrupt-controller { 120 compatible = "samsung,exynos4210-wakeup-eint"; 121 interrupts = <16>; 122 interrupt-parent = <&vic0>; 123 }; 124 }; 125 126 pdma0: dma@e0900000 { 127 compatible = "arm,pl330", "arm,primecell"; 128 reg = <0xe0900000 0x1000>; 129 interrupt-parent = <&vic0>; 130 interrupts = <19>; 131 clocks = <&clocks CLK_PDMA0>; 132 clock-names = "apb_pclk"; 133 #dma-cells = <1>; 134 #dma-channels = <8>; 135 #dma-requests = <32>; 136 }; 137 138 pdma1: dma@e0a00000 { 139 compatible = "arm,pl330", "arm,primecell"; 140 reg = <0xe0a00000 0x1000>; 141 interrupt-parent = <&vic0>; 142 interrupts = <20>; 143 clocks = <&clocks CLK_PDMA1>; 144 clock-names = "apb_pclk"; 145 #dma-cells = <1>; 146 #dma-channels = <8>; 147 #dma-requests = <32>; 148 }; 149 150 spi0: spi@e1300000 { 151 compatible = "samsung,s5pv210-spi"; 152 reg = <0xe1300000 0x1000>; 153 interrupt-parent = <&vic1>; 154 interrupts = <15>; 155 dmas = <&pdma0 7>, <&pdma0 6>; 156 dma-names = "tx", "rx"; 157 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>; 158 clock-names = "spi", "spi_busclk0"; 159 pinctrl-names = "default"; 160 pinctrl-0 = <&spi0_bus>; 161 #address-cells = <1>; 162 #size-cells = <0>; 163 status = "disabled"; 164 }; 165 166 spi1: spi@e1400000 { 167 compatible = "samsung,s5pv210-spi"; 168 reg = <0xe1400000 0x1000>; 169 interrupt-parent = <&vic1>; 170 interrupts = <16>; 171 dmas = <&pdma1 7>, <&pdma1 6>; 172 dma-names = "tx", "rx"; 173 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>; 174 clock-names = "spi", "spi_busclk0"; 175 pinctrl-names = "default"; 176 pinctrl-0 = <&spi1_bus>; 177 #address-cells = <1>; 178 #size-cells = <0>; 179 status = "disabled"; 180 }; 181 182 keypad: keypad@e1600000 { 183 compatible = "samsung,s5pv210-keypad"; 184 reg = <0xe1600000 0x1000>; 185 interrupt-parent = <&vic2>; 186 interrupts = <25>; 187 clocks = <&clocks CLK_KEYIF>; 188 clock-names = "keypad"; 189 status = "disabled"; 190 }; 191 192 i2c0: i2c@e1800000 { 193 compatible = "samsung,s3c2440-i2c"; 194 reg = <0xe1800000 0x1000>; 195 interrupt-parent = <&vic1>; 196 interrupts = <14>; 197 clocks = <&clocks CLK_I2C0>; 198 clock-names = "i2c"; 199 pinctrl-names = "default"; 200 pinctrl-0 = <&i2c0_bus>; 201 #address-cells = <1>; 202 #size-cells = <0>; 203 status = "disabled"; 204 }; 205 206 i2c2: i2c@e1a00000 { 207 compatible = "samsung,s3c2440-i2c"; 208 reg = <0xe1a00000 0x1000>; 209 interrupt-parent = <&vic1>; 210 interrupts = <19>; 211 clocks = <&clocks CLK_I2C2>; 212 clock-names = "i2c"; 213 pinctrl-0 = <&i2c2_bus>; 214 pinctrl-names = "default"; 215 #address-cells = <1>; 216 #size-cells = <0>; 217 status = "disabled"; 218 }; 219 220 clk_audss: clock-controller@eee10000 { 221 compatible = "samsung,s5pv210-audss-clock"; 222 reg = <0xeee10000 0x1000>; 223 clock-names = "hclk", "xxti", 224 "fout_epll", 225 "sclk_audio0"; 226 clocks = <&clocks DOUT_HCLKP>, <&xxti>, 227 <&clocks FOUT_EPLL>, 228 <&clocks SCLK_AUDIO0>; 229 #clock-cells = <1>; 230 }; 231 232 i2s0: i2s@eee30000 { 233 compatible = "samsung,s5pv210-i2s"; 234 reg = <0xeee30000 0x1000>; 235 interrupt-parent = <&vic2>; 236 interrupts = <16>; 237 dma-names = "rx", "tx", "tx-sec"; 238 dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>; 239 clock-names = "iis", 240 "i2s_opclk0", 241 "i2s_opclk1"; 242 clocks = <&clk_audss CLK_I2S>, 243 <&clk_audss CLK_I2S>, 244 <&clk_audss CLK_DOUT_AUD_BUS>; 245 samsung,idma-addr = <0xc0010000>; 246 pinctrl-names = "default"; 247 pinctrl-0 = <&i2s0_bus>; 248 #sound-dai-cells = <0>; 249 status = "disabled"; 250 }; 251 252 i2s1: i2s@e2100000 { 253 compatible = "samsung,s3c6410-i2s"; 254 reg = <0xe2100000 0x1000>; 255 interrupt-parent = <&vic2>; 256 interrupts = <17>; 257 dma-names = "rx", "tx"; 258 dmas = <&pdma1 12>, <&pdma1 13>; 259 clock-names = "iis", "i2s_opclk0"; 260 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>; 261 pinctrl-names = "default"; 262 pinctrl-0 = <&i2s1_bus>; 263 #sound-dai-cells = <0>; 264 status = "disabled"; 265 }; 266 267 i2s2: i2s@e2a00000 { 268 compatible = "samsung,s3c6410-i2s"; 269 reg = <0xe2a00000 0x1000>; 270 interrupt-parent = <&vic2>; 271 interrupts = <18>; 272 dma-names = "rx", "tx"; 273 dmas = <&pdma1 14>, <&pdma1 15>; 274 clock-names = "iis", "i2s_opclk0"; 275 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>; 276 pinctrl-names = "default"; 277 pinctrl-0 = <&i2s2_bus>; 278 #sound-dai-cells = <0>; 279 status = "disabled"; 280 }; 281 282 pwm: pwm@e2500000 { 283 compatible = "samsung,s5pc100-pwm"; 284 reg = <0xe2500000 0x1000>; 285 interrupt-parent = <&vic0>; 286 interrupts = <21>, <22>, <23>, <24>, <25>; 287 clock-names = "timers"; 288 clocks = <&clocks CLK_PWM>; 289 #pwm-cells = <3>; 290 }; 291 292 watchdog: watchdog@e2700000 { 293 compatible = "samsung,s3c6410-wdt"; 294 reg = <0xe2700000 0x1000>; 295 interrupt-parent = <&vic0>; 296 interrupts = <26>; 297 clock-names = "watchdog"; 298 clocks = <&clocks CLK_WDT>; 299 }; 300 301 rtc: rtc@e2800000 { 302 compatible = "samsung,s3c6410-rtc"; 303 reg = <0xe2800000 0x100>; 304 interrupt-parent = <&vic0>; 305 interrupts = <28>, <29>; 306 clocks = <&clocks CLK_RTC>; 307 clock-names = "rtc"; 308 status = "disabled"; 309 }; 310 311 uart0: serial@e2900000 { 312 compatible = "samsung,s5pv210-uart"; 313 reg = <0xe2900000 0x400>; 314 interrupt-parent = <&vic1>; 315 interrupts = <10>; 316 clock-names = "uart", "clk_uart_baud0", 317 "clk_uart_baud1"; 318 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>, 319 <&clocks SCLK_UART0>; 320 status = "disabled"; 321 }; 322 323 uart1: serial@e2900400 { 324 compatible = "samsung,s5pv210-uart"; 325 reg = <0xe2900400 0x400>; 326 interrupt-parent = <&vic1>; 327 interrupts = <11>; 328 clock-names = "uart", "clk_uart_baud0", 329 "clk_uart_baud1"; 330 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>, 331 <&clocks SCLK_UART1>; 332 status = "disabled"; 333 }; 334 335 uart2: serial@e2900800 { 336 compatible = "samsung,s5pv210-uart"; 337 reg = <0xe2900800 0x400>; 338 interrupt-parent = <&vic1>; 339 interrupts = <12>; 340 clock-names = "uart", "clk_uart_baud0", 341 "clk_uart_baud1"; 342 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>, 343 <&clocks SCLK_UART2>; 344 status = "disabled"; 345 }; 346 347 uart3: serial@e2900c00 { 348 compatible = "samsung,s5pv210-uart"; 349 reg = <0xe2900c00 0x400>; 350 interrupt-parent = <&vic1>; 351 interrupts = <13>; 352 clock-names = "uart", "clk_uart_baud0", 353 "clk_uart_baud1"; 354 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>, 355 <&clocks SCLK_UART3>; 356 status = "disabled"; 357 }; 358 359 sdhci0: sdhci@eb000000 { 360 compatible = "samsung,s3c6410-sdhci"; 361 reg = <0xeb000000 0x100000>; 362 interrupt-parent = <&vic1>; 363 interrupts = <26>; 364 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 365 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>, 366 <&clocks SCLK_MMC0>; 367 status = "disabled"; 368 }; 369 370 sdhci1: sdhci@eb100000 { 371 compatible = "samsung,s3c6410-sdhci"; 372 reg = <0xeb100000 0x100000>; 373 interrupt-parent = <&vic1>; 374 interrupts = <27>; 375 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 376 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>, 377 <&clocks SCLK_MMC1>; 378 status = "disabled"; 379 }; 380 381 sdhci2: sdhci@eb200000 { 382 compatible = "samsung,s3c6410-sdhci"; 383 reg = <0xeb200000 0x100000>; 384 interrupt-parent = <&vic1>; 385 interrupts = <28>; 386 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 387 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>, 388 <&clocks SCLK_MMC2>; 389 status = "disabled"; 390 }; 391 392 sdhci3: sdhci@eb300000 { 393 compatible = "samsung,s3c6410-sdhci"; 394 reg = <0xeb300000 0x100000>; 395 interrupt-parent = <&vic3>; 396 interrupts = <2>; 397 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3"; 398 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>, 399 <&clocks SCLK_MMC3>; 400 status = "disabled"; 401 }; 402 403 hsotg: hsotg@ec000000 { 404 compatible = "samsung,s3c6400-hsotg"; 405 reg = <0xec000000 0x20000>; 406 interrupt-parent = <&vic1>; 407 interrupts = <24>; 408 clocks = <&clocks CLK_USB_OTG>; 409 clock-names = "otg"; 410 phy-names = "usb2-phy"; 411 phys = <&usbphy 0>; 412 status = "disabled"; 413 }; 414 415 usbphy: usbphy@ec100000 { 416 compatible = "samsung,s5pv210-usb2-phy"; 417 reg = <0xec100000 0x100>; 418 samsung,pmureg-phandle = <&pmu_syscon>; 419 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>; 420 clock-names = "phy", "ref"; 421 #phy-cells = <1>; 422 status = "disabled"; 423 }; 424 425 ehci: ehci@ec200000 { 426 compatible = "samsung,exynos4210-ehci"; 427 reg = <0xec200000 0x100>; 428 interrupts = <23>; 429 interrupt-parent = <&vic1>; 430 clocks = <&clocks CLK_USB_HOST>; 431 clock-names = "usbhost"; 432 #address-cells = <1>; 433 #size-cells = <0>; 434 status = "disabled"; 435 436 port@0 { 437 reg = <0>; 438 phys = <&usbphy 1>; 439 }; 440 }; 441 442 ohci: ohci@ec300000 { 443 compatible = "samsung,exynos4210-ohci"; 444 reg = <0xec300000 0x100>; 445 interrupts = <23>; 446 interrupt-parent = <&vic1>; 447 clocks = <&clocks CLK_USB_HOST>; 448 clock-names = "usbhost"; 449 #address-cells = <1>; 450 #size-cells = <0>; 451 status = "disabled"; 452 453 port@0 { 454 reg = <0>; 455 phys = <&usbphy 1>; 456 }; 457 }; 458 459 mfc: codec@f1700000 { 460 compatible = "samsung,mfc-v5"; 461 reg = <0xf1700000 0x10000>; 462 interrupt-parent = <&vic2>; 463 interrupts = <14>; 464 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>; 465 clock-names = "sclk_mfc", "mfc"; 466 }; 467 468 vic0: interrupt-controller@f2000000 { 469 compatible = "arm,pl192-vic"; 470 interrupt-controller; 471 reg = <0xf2000000 0x1000>; 472 #interrupt-cells = <1>; 473 }; 474 475 vic1: interrupt-controller@f2100000 { 476 compatible = "arm,pl192-vic"; 477 interrupt-controller; 478 reg = <0xf2100000 0x1000>; 479 #interrupt-cells = <1>; 480 }; 481 482 vic2: interrupt-controller@f2200000 { 483 compatible = "arm,pl192-vic"; 484 interrupt-controller; 485 reg = <0xf2200000 0x1000>; 486 #interrupt-cells = <1>; 487 }; 488 489 vic3: interrupt-controller@f2300000 { 490 compatible = "arm,pl192-vic"; 491 interrupt-controller; 492 reg = <0xf2300000 0x1000>; 493 #interrupt-cells = <1>; 494 }; 495 496 fimd: fimd@f8000000 { 497 compatible = "samsung,exynos4210-fimd"; 498 interrupt-parent = <&vic2>; 499 reg = <0xf8000000 0x20000>; 500 interrupt-names = "fifo", "vsync", "lcd_sys"; 501 interrupts = <0>, <1>, <2>; 502 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>; 503 clock-names = "sclk_fimd", "fimd"; 504 status = "disabled"; 505 }; 506 507 g2d: g2d@fa000000 { 508 compatible = "samsung,s5pv210-g2d"; 509 reg = <0xfa000000 0x1000>; 510 interrupt-parent = <&vic2>; 511 interrupts = <9>; 512 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>; 513 clock-names = "sclk_fimg2d", "fimg2d"; 514 }; 515 516 mdma1: mdma@fa200000 { 517 compatible = "arm,pl330", "arm,primecell"; 518 reg = <0xfa200000 0x1000>; 519 interrupt-parent = <&vic0>; 520 interrupts = <18>; 521 clocks = <&clocks CLK_MDMA>; 522 clock-names = "apb_pclk"; 523 #dma-cells = <1>; 524 #dma-channels = <8>; 525 #dma-requests = <1>; 526 }; 527 528 i2c1: i2c@fab00000 { 529 compatible = "samsung,s3c2440-i2c"; 530 reg = <0xfab00000 0x1000>; 531 interrupt-parent = <&vic2>; 532 interrupts = <13>; 533 clocks = <&clocks CLK_I2C1>; 534 clock-names = "i2c"; 535 pinctrl-names = "default"; 536 pinctrl-0 = <&i2c1_bus>; 537 #address-cells = <1>; 538 #size-cells = <0>; 539 status = "disabled"; 540 }; 541 542 camera: camera { 543 compatible = "samsung,fimc", "simple-bus"; 544 pinctrl-names = "default"; 545 pinctrl-0 = <>; 546 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>; 547 clock-names = "sclk_cam0", "sclk_cam1"; 548 #address-cells = <1>; 549 #size-cells = <1>; 550 ranges; 551 552 clock_cam: clock-controller { 553 #clock-cells = <1>; 554 }; 555 556 csis0: csis@fa600000 { 557 compatible = "samsung,s5pv210-csis"; 558 reg = <0xfa600000 0x4000>; 559 interrupt-parent = <&vic2>; 560 interrupts = <29>; 561 clocks = <&clocks CLK_CSIS>, 562 <&clocks SCLK_CSIS>; 563 clock-names = "clk_csis", 564 "sclk_csis"; 565 bus-width = <4>; 566 status = "disabled"; 567 #address-cells = <1>; 568 #size-cells = <0>; 569 }; 570 571 fimc0: fimc@fb200000 { 572 compatible = "samsung,s5pv210-fimc"; 573 reg = <0xfb200000 0x1000>; 574 interrupts = <5>; 575 interrupt-parent = <&vic2>; 576 clocks = <&clocks CLK_FIMC0>, 577 <&clocks SCLK_FIMC0>; 578 clock-names = "fimc", 579 "sclk_fimc"; 580 samsung,pix-limits = <4224 8192 1920 4224>; 581 samsung,mainscaler-ext; 582 samsung,cam-if; 583 }; 584 585 fimc1: fimc@fb300000 { 586 compatible = "samsung,s5pv210-fimc"; 587 reg = <0xfb300000 0x1000>; 588 interrupt-parent = <&vic2>; 589 interrupts = <6>; 590 clocks = <&clocks CLK_FIMC1>, 591 <&clocks SCLK_FIMC1>; 592 clock-names = "fimc", 593 "sclk_fimc"; 594 samsung,pix-limits = <4224 8192 1920 4224>; 595 samsung,mainscaler-ext; 596 samsung,cam-if; 597 }; 598 599 fimc2: fimc@fb400000 { 600 compatible = "samsung,s5pv210-fimc"; 601 reg = <0xfb400000 0x1000>; 602 interrupt-parent = <&vic2>; 603 interrupts = <7>; 604 clocks = <&clocks CLK_FIMC2>, 605 <&clocks SCLK_FIMC2>; 606 clock-names = "fimc", 607 "sclk_fimc"; 608 samsung,pix-limits = <4224 8192 1920 4224>; 609 samsung,mainscaler-ext; 610 samsung,lcd-wb; 611 }; 612 }; 613 }; 614}; 615 616#include "s5pv210-pinctrl.dtsi" 617