• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1/*
2 * Copyright 2017 Chen-Yu Tsai
3 *
4 * Chen-Yu Tsai <wens@csie.org>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 *  a) This file is free software; you can redistribute it and/or
12 *     modify it under the terms of the GNU General Public License as
13 *     published by the Free Software Foundation; either version 2 of the
14 *     License, or (at your option) any later version.
15 *
16 *     This file is distributed in the hope that it will be useful,
17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19 *     GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 *  b) Permission is hereby granted, free of charge, to any person
24 *     obtaining a copy of this software and associated documentation
25 *     files (the "Software"), to deal in the Software without
26 *     restriction, including without limitation the rights to use,
27 *     copy, modify, merge, publish, distribute, sublicense, and/or
28 *     sell copies of the Software, and to permit persons to whom the
29 *     Software is furnished to do so, subject to the following
30 *     conditions:
31 *
32 *     The above copyright notice and this permission notice shall be
33 *     included in all copies or substantial portions of the Software.
34 *
35 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 *     OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45/dts-v1/;
46#include "sun8i-a83t.dtsi"
47
48#include <dt-bindings/gpio/gpio.h>
49
50/ {
51	model = "Banana Pi BPI-M3";
52	compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";
53
54	aliases {
55		ethernet0 = &emac;
56		serial0 = &uart0;
57	};
58
59	chosen {
60		stdout-path = "serial0:115200n8";
61	};
62
63	connector {
64		compatible = "hdmi-connector";
65		type = "a";
66
67		port {
68			hdmi_con_in: endpoint {
69				remote-endpoint = <&hdmi_out_con>;
70			};
71		};
72	};
73
74	leds {
75		compatible = "gpio-leds";
76
77		blue {
78			label = "bananapi-m3:blue:usr";
79			gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>;
80		};
81
82		green {
83			label = "bananapi-m3:green:usr";
84			gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>;
85		};
86	};
87
88	reg_usb1_vbus: reg-usb1-vbus {
89		compatible = "regulator-fixed";
90		regulator-name = "usb1-vbus";
91		regulator-min-microvolt = <5000000>;
92		regulator-max-microvolt = <5000000>;
93		regulator-boot-on;
94		enable-active-high;
95		gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
96	};
97
98	wifi_pwrseq: wifi_pwrseq {
99		compatible = "mmc-pwrseq-simple";
100		clocks = <&ac100_rtc 1>;
101		clock-names = "ext_clock";
102		/* The WiFi low power clock must be 32768 Hz */
103		assigned-clocks = <&ac100_rtc 1>;
104		assigned-clock-rates = <32768>;
105		/* enables internal regulator and de-asserts reset */
106		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
107	};
108};
109
110&cpu0 {
111	cpu-supply = <&reg_dcdc2>;
112};
113
114&cpu100 {
115	cpu-supply = <&reg_dcdc3>;
116};
117
118&de {
119	status = "okay";
120};
121
122&ehci0 {
123	/* Terminus Tech FE 1.1s 4-port USB 2.0 hub here */
124	status = "okay";
125
126	/* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */
127};
128
129&emac {
130	pinctrl-names = "default";
131	pinctrl-0 = <&emac_rgmii_pins>;
132	phy-supply = <&reg_sw>;
133	phy-handle = <&rgmii_phy>;
134	phy-mode = "rgmii";
135	allwinner,rx-delay-ps = <700>;
136	allwinner,tx-delay-ps = <700>;
137	status = "okay";
138};
139
140&hdmi {
141	status = "okay";
142};
143
144&hdmi_out {
145	hdmi_out_con: endpoint {
146		remote-endpoint = <&hdmi_con_in>;
147	};
148};
149
150&mdio {
151	rgmii_phy: ethernet-phy@1 {
152		compatible = "ethernet-phy-ieee802.3-c22";
153		reg = <1>;
154	};
155};
156
157&mmc0 {
158	pinctrl-names = "default";
159	pinctrl-0 = <&mmc0_pins>;
160	vmmc-supply = <&reg_dcdc1>;
161	bus-width = <4>;
162	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
163	status = "okay";
164};
165
166&mmc1 {
167	vmmc-supply = <&reg_dldo1>;
168	vqmmc-supply = <&reg_dldo1>;
169	mmc-pwrseq = <&wifi_pwrseq>;
170	bus-width = <4>;
171	non-removable;
172	status = "okay";
173
174	brcmf: wifi@1 {
175		reg = <1>;
176		compatible = "brcm,bcm4329-fmac";
177		interrupt-parent = <&r_pio>;
178		interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>;
179		interrupt-names = "host-wake";
180	};
181};
182
183&mmc2 {
184	pinctrl-names = "default";
185	pinctrl-0 = <&mmc2_8bit_emmc_pins>;
186	vmmc-supply = <&reg_dcdc1>;
187	vqmmc-supply = <&reg_dcdc1>;
188	bus-width = <8>;
189	non-removable;
190	cap-mmc-hw-reset;
191	status = "okay";
192};
193
194&r_rsb {
195	status = "okay";
196
197	axp81x: pmic@3a3 {
198		compatible = "x-powers,axp813";
199		reg = <0x3a3>;
200		interrupt-parent = <&r_intc>;
201		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
202		eldoin-supply = <&reg_dcdc1>;
203		fldoin-supply = <&reg_dcdc5>;
204		swin-supply = <&reg_dcdc1>;
205		x-powers,drive-vbus-en;
206	};
207
208	ac100: codec@e89 {
209		compatible = "x-powers,ac100";
210		reg = <0xe89>;
211
212		ac100_codec: codec {
213			compatible = "x-powers,ac100-codec";
214			interrupt-parent = <&r_pio>;
215			interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
216			#clock-cells = <0>;
217			clock-output-names = "4M_adda";
218		};
219
220		ac100_rtc: rtc {
221			compatible = "x-powers,ac100-rtc";
222			interrupt-parent = <&r_intc>;
223			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
224			clocks = <&ac100_codec>;
225			#clock-cells = <1>;
226			clock-output-names = "cko1_rtc",
227					     "cko2_rtc",
228					     "cko3_rtc";
229		};
230	};
231};
232
233#include "axp81x.dtsi"
234
235&reg_aldo1 {
236	regulator-always-on;
237	regulator-min-microvolt = <1800000>;
238	regulator-max-microvolt = <1800000>;
239	regulator-name = "vcc-1v8";
240};
241
242&reg_aldo2 {
243	regulator-always-on;
244	regulator-min-microvolt = <1800000>;
245	regulator-max-microvolt = <1800000>;
246	regulator-name = "dram-pll";
247};
248
249&reg_aldo3 {
250	regulator-always-on;
251	regulator-min-microvolt = <3000000>;
252	regulator-max-microvolt = <3000000>;
253	regulator-name = "avcc";
254};
255
256&reg_dcdc1 {
257	/* schematics says 3.1V but FEX file says 3.3V */
258	regulator-always-on;
259	regulator-min-microvolt = <3300000>;
260	regulator-max-microvolt = <3300000>;
261	regulator-name = "vcc-3v3";
262};
263
264&reg_dcdc2 {
265	regulator-always-on;
266	regulator-min-microvolt = <700000>;
267	regulator-max-microvolt = <1100000>;
268	regulator-name = "vdd-cpua";
269};
270
271&reg_dcdc3 {
272	regulator-always-on;
273	regulator-min-microvolt = <700000>;
274	regulator-max-microvolt = <1100000>;
275	regulator-name = "vdd-cpub";
276};
277
278&reg_dcdc4 {
279	regulator-min-microvolt = <700000>;
280	regulator-max-microvolt = <1100000>;
281	regulator-name = "vdd-gpu";
282};
283
284&reg_dcdc5 {
285	regulator-always-on;
286	regulator-min-microvolt = <1200000>;
287	regulator-max-microvolt = <1200000>;
288	regulator-name = "vcc-dram";
289};
290
291&reg_dcdc6 {
292	regulator-always-on;
293	regulator-min-microvolt = <900000>;
294	regulator-max-microvolt = <900000>;
295	regulator-name = "vdd-sys";
296};
297
298&reg_dldo1 {
299	/*
300	 * This powers both the WiFi/BT module's main power, I/O supply,
301	 * and external pull-ups on all the data lines. It should be set
302	 * to the same voltage as the I/O supply (DCDC1 in this case) to
303	 * avoid any leakage or mismatch.
304	 */
305	regulator-min-microvolt = <3300000>;
306	regulator-max-microvolt = <3300000>;
307	regulator-name = "vcc-wifi";
308};
309
310&reg_dldo3 {
311	regulator-always-on;
312	regulator-min-microvolt = <3300000>;
313	regulator-max-microvolt = <3300000>;
314	regulator-name = "vcc-pd";
315};
316
317&reg_drivevbus {
318	regulator-name = "usb0-vbus";
319	status = "okay";
320};
321
322&reg_fldo1 {
323	regulator-min-microvolt = <1080000>;
324	regulator-max-microvolt = <1320000>;
325	regulator-name = "vdd12-hsic";
326};
327
328&reg_fldo2 {
329	/*
330	 * Despite the embedded CPUs core not being used in any way,
331	 * this must remain on or the system will hang.
332	 */
333	regulator-always-on;
334	regulator-min-microvolt = <700000>;
335	regulator-max-microvolt = <1100000>;
336	regulator-name = "vdd-cpus";
337};
338
339&reg_rtc_ldo {
340	regulator-name = "vcc-rtc";
341};
342
343&reg_sw {
344	/*
345	 * The PHY requires 20ms after all voltages
346	 * are applied until core logic is ready and
347	 * 30ms after the reset pin is de-asserted.
348	 * Set a 100ms delay to account for PMIC
349	 * ramp time and board traces.
350	 */
351	regulator-enable-ramp-delay = <100000>;
352	regulator-name = "vcc-ephy";
353};
354
355&uart0 {
356	pinctrl-names = "default";
357	pinctrl-0 = <&uart0_pb_pins>;
358	status = "okay";
359};
360
361&usbphy {
362	usb1_vbus-supply = <&reg_usb1_vbus>;
363	status = "okay";
364};
365