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1 /*
2  * intel_pt.c: Intel Processor Trace support
3  * Copyright (c) 2013-2015, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  */
15 
16 #include <inttypes.h>
17 #include <stdio.h>
18 #include <stdbool.h>
19 #include <errno.h>
20 #include <linux/kernel.h>
21 #include <linux/types.h>
22 
23 #include "../perf.h"
24 #include "session.h"
25 #include "machine.h"
26 #include "memswap.h"
27 #include "sort.h"
28 #include "tool.h"
29 #include "event.h"
30 #include "evlist.h"
31 #include "evsel.h"
32 #include "map.h"
33 #include "color.h"
34 #include "util.h"
35 #include "thread.h"
36 #include "thread-stack.h"
37 #include "symbol.h"
38 #include "callchain.h"
39 #include "dso.h"
40 #include "debug.h"
41 #include "auxtrace.h"
42 #include "tsc.h"
43 #include "intel-pt.h"
44 #include "config.h"
45 
46 #include "intel-pt-decoder/intel-pt-log.h"
47 #include "intel-pt-decoder/intel-pt-decoder.h"
48 #include "intel-pt-decoder/intel-pt-insn-decoder.h"
49 #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
50 
51 #define MAX_TIMESTAMP (~0ULL)
52 
53 struct intel_pt {
54 	struct auxtrace auxtrace;
55 	struct auxtrace_queues queues;
56 	struct auxtrace_heap heap;
57 	u32 auxtrace_type;
58 	struct perf_session *session;
59 	struct machine *machine;
60 	struct perf_evsel *switch_evsel;
61 	struct thread *unknown_thread;
62 	bool timeless_decoding;
63 	bool sampling_mode;
64 	bool snapshot_mode;
65 	bool per_cpu_mmaps;
66 	bool have_tsc;
67 	bool data_queued;
68 	bool est_tsc;
69 	bool sync_switch;
70 	bool mispred_all;
71 	int have_sched_switch;
72 	u32 pmu_type;
73 	u64 kernel_start;
74 	u64 switch_ip;
75 	u64 ptss_ip;
76 
77 	struct perf_tsc_conversion tc;
78 	bool cap_user_time_zero;
79 
80 	struct itrace_synth_opts synth_opts;
81 
82 	bool sample_instructions;
83 	u64 instructions_sample_type;
84 	u64 instructions_id;
85 
86 	bool sample_branches;
87 	u32 branches_filter;
88 	u64 branches_sample_type;
89 	u64 branches_id;
90 
91 	bool sample_transactions;
92 	u64 transactions_sample_type;
93 	u64 transactions_id;
94 
95 	bool sample_ptwrites;
96 	u64 ptwrites_sample_type;
97 	u64 ptwrites_id;
98 
99 	bool sample_pwr_events;
100 	u64 pwr_events_sample_type;
101 	u64 mwait_id;
102 	u64 pwre_id;
103 	u64 exstop_id;
104 	u64 pwrx_id;
105 	u64 cbr_id;
106 
107 	u64 tsc_bit;
108 	u64 mtc_bit;
109 	u64 mtc_freq_bits;
110 	u32 tsc_ctc_ratio_n;
111 	u32 tsc_ctc_ratio_d;
112 	u64 cyc_bit;
113 	u64 noretcomp_bit;
114 	unsigned max_non_turbo_ratio;
115 	unsigned cbr2khz;
116 
117 	unsigned long num_events;
118 
119 	char *filter;
120 	struct addr_filters filts;
121 };
122 
123 enum switch_state {
124 	INTEL_PT_SS_NOT_TRACING,
125 	INTEL_PT_SS_UNKNOWN,
126 	INTEL_PT_SS_TRACING,
127 	INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
128 	INTEL_PT_SS_EXPECTING_SWITCH_IP,
129 };
130 
131 struct intel_pt_queue {
132 	struct intel_pt *pt;
133 	unsigned int queue_nr;
134 	struct auxtrace_buffer *buffer;
135 	struct auxtrace_buffer *old_buffer;
136 	void *decoder;
137 	const struct intel_pt_state *state;
138 	struct ip_callchain *chain;
139 	struct branch_stack *last_branch;
140 	struct branch_stack *last_branch_rb;
141 	size_t last_branch_pos;
142 	union perf_event *event_buf;
143 	bool on_heap;
144 	bool stop;
145 	bool step_through_buffers;
146 	bool use_buffer_pid_tid;
147 	bool sync_switch;
148 	pid_t pid, tid;
149 	int cpu;
150 	int switch_state;
151 	pid_t next_tid;
152 	struct thread *thread;
153 	bool exclude_kernel;
154 	bool have_sample;
155 	u64 time;
156 	u64 timestamp;
157 	u32 flags;
158 	u16 insn_len;
159 	u64 last_insn_cnt;
160 	char insn[INTEL_PT_INSN_BUF_SZ];
161 };
162 
intel_pt_dump(struct intel_pt * pt __maybe_unused,unsigned char * buf,size_t len)163 static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
164 			  unsigned char *buf, size_t len)
165 {
166 	struct intel_pt_pkt packet;
167 	size_t pos = 0;
168 	int ret, pkt_len, i;
169 	char desc[INTEL_PT_PKT_DESC_MAX];
170 	const char *color = PERF_COLOR_BLUE;
171 
172 	color_fprintf(stdout, color,
173 		      ". ... Intel Processor Trace data: size %zu bytes\n",
174 		      len);
175 
176 	while (len) {
177 		ret = intel_pt_get_packet(buf, len, &packet);
178 		if (ret > 0)
179 			pkt_len = ret;
180 		else
181 			pkt_len = 1;
182 		printf(".");
183 		color_fprintf(stdout, color, "  %08x: ", pos);
184 		for (i = 0; i < pkt_len; i++)
185 			color_fprintf(stdout, color, " %02x", buf[i]);
186 		for (; i < 16; i++)
187 			color_fprintf(stdout, color, "   ");
188 		if (ret > 0) {
189 			ret = intel_pt_pkt_desc(&packet, desc,
190 						INTEL_PT_PKT_DESC_MAX);
191 			if (ret > 0)
192 				color_fprintf(stdout, color, " %s\n", desc);
193 		} else {
194 			color_fprintf(stdout, color, " Bad packet!\n");
195 		}
196 		pos += pkt_len;
197 		buf += pkt_len;
198 		len -= pkt_len;
199 	}
200 }
201 
intel_pt_dump_event(struct intel_pt * pt,unsigned char * buf,size_t len)202 static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
203 				size_t len)
204 {
205 	printf(".\n");
206 	intel_pt_dump(pt, buf, len);
207 }
208 
intel_pt_do_fix_overlap(struct intel_pt * pt,struct auxtrace_buffer * a,struct auxtrace_buffer * b)209 static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
210 				   struct auxtrace_buffer *b)
211 {
212 	bool consecutive = false;
213 	void *start;
214 
215 	start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
216 				      pt->have_tsc, &consecutive);
217 	if (!start)
218 		return -EINVAL;
219 	b->use_size = b->data + b->size - start;
220 	b->use_data = start;
221 	if (b->use_size && consecutive)
222 		b->consecutive = true;
223 	return 0;
224 }
225 
226 /* This function assumes data is processed sequentially only */
intel_pt_get_trace(struct intel_pt_buffer * b,void * data)227 static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
228 {
229 	struct intel_pt_queue *ptq = data;
230 	struct auxtrace_buffer *buffer = ptq->buffer;
231 	struct auxtrace_buffer *old_buffer = ptq->old_buffer;
232 	struct auxtrace_queue *queue;
233 	bool might_overlap;
234 
235 	if (ptq->stop) {
236 		b->len = 0;
237 		return 0;
238 	}
239 
240 	queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
241 
242 	buffer = auxtrace_buffer__next(queue, buffer);
243 	if (!buffer) {
244 		if (old_buffer)
245 			auxtrace_buffer__drop_data(old_buffer);
246 		b->len = 0;
247 		return 0;
248 	}
249 
250 	ptq->buffer = buffer;
251 
252 	if (!buffer->data) {
253 		int fd = perf_data__fd(ptq->pt->session->data);
254 
255 		buffer->data = auxtrace_buffer__get_data(buffer, fd);
256 		if (!buffer->data)
257 			return -ENOMEM;
258 	}
259 
260 	might_overlap = ptq->pt->snapshot_mode || ptq->pt->sampling_mode;
261 	if (might_overlap && !buffer->consecutive && old_buffer &&
262 	    intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
263 		return -ENOMEM;
264 
265 	if (buffer->use_data) {
266 		b->len = buffer->use_size;
267 		b->buf = buffer->use_data;
268 	} else {
269 		b->len = buffer->size;
270 		b->buf = buffer->data;
271 	}
272 	b->ref_timestamp = buffer->reference;
273 
274 	if (!old_buffer || (might_overlap && !buffer->consecutive)) {
275 		b->consecutive = false;
276 		b->trace_nr = buffer->buffer_nr + 1;
277 	} else {
278 		b->consecutive = true;
279 	}
280 
281 	if (ptq->step_through_buffers)
282 		ptq->stop = true;
283 
284 	if (b->len) {
285 		if (old_buffer)
286 			auxtrace_buffer__drop_data(old_buffer);
287 		ptq->old_buffer = buffer;
288 	} else {
289 		auxtrace_buffer__drop_data(buffer);
290 		return intel_pt_get_trace(b, data);
291 	}
292 
293 	return 0;
294 }
295 
296 struct intel_pt_cache_entry {
297 	struct auxtrace_cache_entry	entry;
298 	u64				insn_cnt;
299 	u64				byte_cnt;
300 	enum intel_pt_insn_op		op;
301 	enum intel_pt_insn_branch	branch;
302 	int				length;
303 	int32_t				rel;
304 	char				insn[INTEL_PT_INSN_BUF_SZ];
305 };
306 
intel_pt_config_div(const char * var,const char * value,void * data)307 static int intel_pt_config_div(const char *var, const char *value, void *data)
308 {
309 	int *d = data;
310 	long val;
311 
312 	if (!strcmp(var, "intel-pt.cache-divisor")) {
313 		val = strtol(value, NULL, 0);
314 		if (val > 0 && val <= INT_MAX)
315 			*d = val;
316 	}
317 
318 	return 0;
319 }
320 
intel_pt_cache_divisor(void)321 static int intel_pt_cache_divisor(void)
322 {
323 	static int d;
324 
325 	if (d)
326 		return d;
327 
328 	perf_config(intel_pt_config_div, &d);
329 
330 	if (!d)
331 		d = 64;
332 
333 	return d;
334 }
335 
intel_pt_cache_size(struct dso * dso,struct machine * machine)336 static unsigned int intel_pt_cache_size(struct dso *dso,
337 					struct machine *machine)
338 {
339 	off_t size;
340 
341 	size = dso__data_size(dso, machine);
342 	size /= intel_pt_cache_divisor();
343 	if (size < 1000)
344 		return 10;
345 	if (size > (1 << 21))
346 		return 21;
347 	return 32 - __builtin_clz(size);
348 }
349 
intel_pt_cache(struct dso * dso,struct machine * machine)350 static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
351 					     struct machine *machine)
352 {
353 	struct auxtrace_cache *c;
354 	unsigned int bits;
355 
356 	if (dso->auxtrace_cache)
357 		return dso->auxtrace_cache;
358 
359 	bits = intel_pt_cache_size(dso, machine);
360 
361 	/* Ignoring cache creation failure */
362 	c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
363 
364 	dso->auxtrace_cache = c;
365 
366 	return c;
367 }
368 
intel_pt_cache_add(struct dso * dso,struct machine * machine,u64 offset,u64 insn_cnt,u64 byte_cnt,struct intel_pt_insn * intel_pt_insn)369 static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
370 			      u64 offset, u64 insn_cnt, u64 byte_cnt,
371 			      struct intel_pt_insn *intel_pt_insn)
372 {
373 	struct auxtrace_cache *c = intel_pt_cache(dso, machine);
374 	struct intel_pt_cache_entry *e;
375 	int err;
376 
377 	if (!c)
378 		return -ENOMEM;
379 
380 	e = auxtrace_cache__alloc_entry(c);
381 	if (!e)
382 		return -ENOMEM;
383 
384 	e->insn_cnt = insn_cnt;
385 	e->byte_cnt = byte_cnt;
386 	e->op = intel_pt_insn->op;
387 	e->branch = intel_pt_insn->branch;
388 	e->length = intel_pt_insn->length;
389 	e->rel = intel_pt_insn->rel;
390 	memcpy(e->insn, intel_pt_insn->buf, INTEL_PT_INSN_BUF_SZ);
391 
392 	err = auxtrace_cache__add(c, offset, &e->entry);
393 	if (err)
394 		auxtrace_cache__free_entry(c, e);
395 
396 	return err;
397 }
398 
399 static struct intel_pt_cache_entry *
intel_pt_cache_lookup(struct dso * dso,struct machine * machine,u64 offset)400 intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
401 {
402 	struct auxtrace_cache *c = intel_pt_cache(dso, machine);
403 
404 	if (!c)
405 		return NULL;
406 
407 	return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
408 }
409 
intel_pt_cpumode(struct intel_pt * pt,uint64_t ip)410 static inline u8 intel_pt_cpumode(struct intel_pt *pt, uint64_t ip)
411 {
412 	return ip >= pt->kernel_start ?
413 	       PERF_RECORD_MISC_KERNEL :
414 	       PERF_RECORD_MISC_USER;
415 }
416 
intel_pt_walk_next_insn(struct intel_pt_insn * intel_pt_insn,uint64_t * insn_cnt_ptr,uint64_t * ip,uint64_t to_ip,uint64_t max_insn_cnt,void * data)417 static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
418 				   uint64_t *insn_cnt_ptr, uint64_t *ip,
419 				   uint64_t to_ip, uint64_t max_insn_cnt,
420 				   void *data)
421 {
422 	struct intel_pt_queue *ptq = data;
423 	struct machine *machine = ptq->pt->machine;
424 	struct thread *thread;
425 	struct addr_location al;
426 	unsigned char buf[INTEL_PT_INSN_BUF_SZ];
427 	ssize_t len;
428 	int x86_64;
429 	u8 cpumode;
430 	u64 offset, start_offset, start_ip;
431 	u64 insn_cnt = 0;
432 	bool one_map = true;
433 
434 	intel_pt_insn->length = 0;
435 
436 	if (to_ip && *ip == to_ip)
437 		goto out_no_cache;
438 
439 	cpumode = intel_pt_cpumode(ptq->pt, *ip);
440 
441 	thread = ptq->thread;
442 	if (!thread) {
443 		if (cpumode != PERF_RECORD_MISC_KERNEL)
444 			return -EINVAL;
445 		thread = ptq->pt->unknown_thread;
446 	}
447 
448 	while (1) {
449 		if (!thread__find_map(thread, cpumode, *ip, &al) || !al.map->dso)
450 			return -EINVAL;
451 
452 		if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
453 		    dso__data_status_seen(al.map->dso,
454 					  DSO_DATA_STATUS_SEEN_ITRACE))
455 			return -ENOENT;
456 
457 		offset = al.map->map_ip(al.map, *ip);
458 
459 		if (!to_ip && one_map) {
460 			struct intel_pt_cache_entry *e;
461 
462 			e = intel_pt_cache_lookup(al.map->dso, machine, offset);
463 			if (e &&
464 			    (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
465 				*insn_cnt_ptr = e->insn_cnt;
466 				*ip += e->byte_cnt;
467 				intel_pt_insn->op = e->op;
468 				intel_pt_insn->branch = e->branch;
469 				intel_pt_insn->length = e->length;
470 				intel_pt_insn->rel = e->rel;
471 				memcpy(intel_pt_insn->buf, e->insn,
472 				       INTEL_PT_INSN_BUF_SZ);
473 				intel_pt_log_insn_no_data(intel_pt_insn, *ip);
474 				return 0;
475 			}
476 		}
477 
478 		start_offset = offset;
479 		start_ip = *ip;
480 
481 		/* Load maps to ensure dso->is_64_bit has been updated */
482 		map__load(al.map);
483 
484 		x86_64 = al.map->dso->is_64_bit;
485 
486 		while (1) {
487 			len = dso__data_read_offset(al.map->dso, machine,
488 						    offset, buf,
489 						    INTEL_PT_INSN_BUF_SZ);
490 			if (len <= 0)
491 				return -EINVAL;
492 
493 			if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
494 				return -EINVAL;
495 
496 			intel_pt_log_insn(intel_pt_insn, *ip);
497 
498 			insn_cnt += 1;
499 
500 			if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
501 				goto out;
502 
503 			if (max_insn_cnt && insn_cnt >= max_insn_cnt)
504 				goto out_no_cache;
505 
506 			*ip += intel_pt_insn->length;
507 
508 			if (to_ip && *ip == to_ip)
509 				goto out_no_cache;
510 
511 			if (*ip >= al.map->end)
512 				break;
513 
514 			offset += intel_pt_insn->length;
515 		}
516 		one_map = false;
517 	}
518 out:
519 	*insn_cnt_ptr = insn_cnt;
520 
521 	if (!one_map)
522 		goto out_no_cache;
523 
524 	/*
525 	 * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
526 	 * entries.
527 	 */
528 	if (to_ip) {
529 		struct intel_pt_cache_entry *e;
530 
531 		e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
532 		if (e)
533 			return 0;
534 	}
535 
536 	/* Ignore cache errors */
537 	intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
538 			   *ip - start_ip, intel_pt_insn);
539 
540 	return 0;
541 
542 out_no_cache:
543 	*insn_cnt_ptr = insn_cnt;
544 	return 0;
545 }
546 
intel_pt_match_pgd_ip(struct intel_pt * pt,uint64_t ip,uint64_t offset,const char * filename)547 static bool intel_pt_match_pgd_ip(struct intel_pt *pt, uint64_t ip,
548 				  uint64_t offset, const char *filename)
549 {
550 	struct addr_filter *filt;
551 	bool have_filter   = false;
552 	bool hit_tracestop = false;
553 	bool hit_filter    = false;
554 
555 	list_for_each_entry(filt, &pt->filts.head, list) {
556 		if (filt->start)
557 			have_filter = true;
558 
559 		if ((filename && !filt->filename) ||
560 		    (!filename && filt->filename) ||
561 		    (filename && strcmp(filename, filt->filename)))
562 			continue;
563 
564 		if (!(offset >= filt->addr && offset < filt->addr + filt->size))
565 			continue;
566 
567 		intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s hit filter: %s offset %#"PRIx64" size %#"PRIx64"\n",
568 			     ip, offset, filename ? filename : "[kernel]",
569 			     filt->start ? "filter" : "stop",
570 			     filt->addr, filt->size);
571 
572 		if (filt->start)
573 			hit_filter = true;
574 		else
575 			hit_tracestop = true;
576 	}
577 
578 	if (!hit_tracestop && !hit_filter)
579 		intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s is not in a filter region\n",
580 			     ip, offset, filename ? filename : "[kernel]");
581 
582 	return hit_tracestop || (have_filter && !hit_filter);
583 }
584 
__intel_pt_pgd_ip(uint64_t ip,void * data)585 static int __intel_pt_pgd_ip(uint64_t ip, void *data)
586 {
587 	struct intel_pt_queue *ptq = data;
588 	struct thread *thread;
589 	struct addr_location al;
590 	u8 cpumode;
591 	u64 offset;
592 
593 	if (ip >= ptq->pt->kernel_start)
594 		return intel_pt_match_pgd_ip(ptq->pt, ip, ip, NULL);
595 
596 	cpumode = PERF_RECORD_MISC_USER;
597 
598 	thread = ptq->thread;
599 	if (!thread)
600 		return -EINVAL;
601 
602 	if (!thread__find_map(thread, cpumode, ip, &al) || !al.map->dso)
603 		return -EINVAL;
604 
605 	offset = al.map->map_ip(al.map, ip);
606 
607 	return intel_pt_match_pgd_ip(ptq->pt, ip, offset,
608 				     al.map->dso->long_name);
609 }
610 
intel_pt_pgd_ip(uint64_t ip,void * data)611 static bool intel_pt_pgd_ip(uint64_t ip, void *data)
612 {
613 	return __intel_pt_pgd_ip(ip, data) > 0;
614 }
615 
intel_pt_get_config(struct intel_pt * pt,struct perf_event_attr * attr,u64 * config)616 static bool intel_pt_get_config(struct intel_pt *pt,
617 				struct perf_event_attr *attr, u64 *config)
618 {
619 	if (attr->type == pt->pmu_type) {
620 		if (config)
621 			*config = attr->config;
622 		return true;
623 	}
624 
625 	return false;
626 }
627 
intel_pt_exclude_kernel(struct intel_pt * pt)628 static bool intel_pt_exclude_kernel(struct intel_pt *pt)
629 {
630 	struct perf_evsel *evsel;
631 
632 	evlist__for_each_entry(pt->session->evlist, evsel) {
633 		if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
634 		    !evsel->attr.exclude_kernel)
635 			return false;
636 	}
637 	return true;
638 }
639 
intel_pt_return_compression(struct intel_pt * pt)640 static bool intel_pt_return_compression(struct intel_pt *pt)
641 {
642 	struct perf_evsel *evsel;
643 	u64 config;
644 
645 	if (!pt->noretcomp_bit)
646 		return true;
647 
648 	evlist__for_each_entry(pt->session->evlist, evsel) {
649 		if (intel_pt_get_config(pt, &evsel->attr, &config) &&
650 		    (config & pt->noretcomp_bit))
651 			return false;
652 	}
653 	return true;
654 }
655 
intel_pt_branch_enable(struct intel_pt * pt)656 static bool intel_pt_branch_enable(struct intel_pt *pt)
657 {
658 	struct perf_evsel *evsel;
659 	u64 config;
660 
661 	evlist__for_each_entry(pt->session->evlist, evsel) {
662 		if (intel_pt_get_config(pt, &evsel->attr, &config) &&
663 		    (config & 1) && !(config & 0x2000))
664 			return false;
665 	}
666 	return true;
667 }
668 
intel_pt_mtc_period(struct intel_pt * pt)669 static unsigned int intel_pt_mtc_period(struct intel_pt *pt)
670 {
671 	struct perf_evsel *evsel;
672 	unsigned int shift;
673 	u64 config;
674 
675 	if (!pt->mtc_freq_bits)
676 		return 0;
677 
678 	for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)
679 		config >>= 1;
680 
681 	evlist__for_each_entry(pt->session->evlist, evsel) {
682 		if (intel_pt_get_config(pt, &evsel->attr, &config))
683 			return (config & pt->mtc_freq_bits) >> shift;
684 	}
685 	return 0;
686 }
687 
intel_pt_timeless_decoding(struct intel_pt * pt)688 static bool intel_pt_timeless_decoding(struct intel_pt *pt)
689 {
690 	struct perf_evsel *evsel;
691 	bool timeless_decoding = true;
692 	u64 config;
693 
694 	if (!pt->tsc_bit || !pt->cap_user_time_zero)
695 		return true;
696 
697 	evlist__for_each_entry(pt->session->evlist, evsel) {
698 		if (!(evsel->attr.sample_type & PERF_SAMPLE_TIME))
699 			return true;
700 		if (intel_pt_get_config(pt, &evsel->attr, &config)) {
701 			if (config & pt->tsc_bit)
702 				timeless_decoding = false;
703 			else
704 				return true;
705 		}
706 	}
707 	return timeless_decoding;
708 }
709 
intel_pt_tracing_kernel(struct intel_pt * pt)710 static bool intel_pt_tracing_kernel(struct intel_pt *pt)
711 {
712 	struct perf_evsel *evsel;
713 
714 	evlist__for_each_entry(pt->session->evlist, evsel) {
715 		if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
716 		    !evsel->attr.exclude_kernel)
717 			return true;
718 	}
719 	return false;
720 }
721 
intel_pt_have_tsc(struct intel_pt * pt)722 static bool intel_pt_have_tsc(struct intel_pt *pt)
723 {
724 	struct perf_evsel *evsel;
725 	bool have_tsc = false;
726 	u64 config;
727 
728 	if (!pt->tsc_bit)
729 		return false;
730 
731 	evlist__for_each_entry(pt->session->evlist, evsel) {
732 		if (intel_pt_get_config(pt, &evsel->attr, &config)) {
733 			if (config & pt->tsc_bit)
734 				have_tsc = true;
735 			else
736 				return false;
737 		}
738 	}
739 	return have_tsc;
740 }
741 
intel_pt_ns_to_ticks(const struct intel_pt * pt,u64 ns)742 static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
743 {
744 	u64 quot, rem;
745 
746 	quot = ns / pt->tc.time_mult;
747 	rem  = ns % pt->tc.time_mult;
748 	return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
749 		pt->tc.time_mult;
750 }
751 
intel_pt_alloc_queue(struct intel_pt * pt,unsigned int queue_nr)752 static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
753 						   unsigned int queue_nr)
754 {
755 	struct intel_pt_params params = { .get_trace = 0, };
756 	struct perf_env *env = pt->machine->env;
757 	struct intel_pt_queue *ptq;
758 
759 	ptq = zalloc(sizeof(struct intel_pt_queue));
760 	if (!ptq)
761 		return NULL;
762 
763 	if (pt->synth_opts.callchain) {
764 		size_t sz = sizeof(struct ip_callchain);
765 
766 		/* Add 1 to callchain_sz for callchain context */
767 		sz += (pt->synth_opts.callchain_sz + 1) * sizeof(u64);
768 		ptq->chain = zalloc(sz);
769 		if (!ptq->chain)
770 			goto out_free;
771 	}
772 
773 	if (pt->synth_opts.last_branch) {
774 		size_t sz = sizeof(struct branch_stack);
775 
776 		sz += pt->synth_opts.last_branch_sz *
777 		      sizeof(struct branch_entry);
778 		ptq->last_branch = zalloc(sz);
779 		if (!ptq->last_branch)
780 			goto out_free;
781 		ptq->last_branch_rb = zalloc(sz);
782 		if (!ptq->last_branch_rb)
783 			goto out_free;
784 	}
785 
786 	ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
787 	if (!ptq->event_buf)
788 		goto out_free;
789 
790 	ptq->pt = pt;
791 	ptq->queue_nr = queue_nr;
792 	ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
793 	ptq->pid = -1;
794 	ptq->tid = -1;
795 	ptq->cpu = -1;
796 	ptq->next_tid = -1;
797 
798 	params.get_trace = intel_pt_get_trace;
799 	params.walk_insn = intel_pt_walk_next_insn;
800 	params.data = ptq;
801 	params.return_compression = intel_pt_return_compression(pt);
802 	params.branch_enable = intel_pt_branch_enable(pt);
803 	params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
804 	params.mtc_period = intel_pt_mtc_period(pt);
805 	params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n;
806 	params.tsc_ctc_ratio_d = pt->tsc_ctc_ratio_d;
807 
808 	if (pt->filts.cnt > 0)
809 		params.pgd_ip = intel_pt_pgd_ip;
810 
811 	if (pt->synth_opts.instructions) {
812 		if (pt->synth_opts.period) {
813 			switch (pt->synth_opts.period_type) {
814 			case PERF_ITRACE_PERIOD_INSTRUCTIONS:
815 				params.period_type =
816 						INTEL_PT_PERIOD_INSTRUCTIONS;
817 				params.period = pt->synth_opts.period;
818 				break;
819 			case PERF_ITRACE_PERIOD_TICKS:
820 				params.period_type = INTEL_PT_PERIOD_TICKS;
821 				params.period = pt->synth_opts.period;
822 				break;
823 			case PERF_ITRACE_PERIOD_NANOSECS:
824 				params.period_type = INTEL_PT_PERIOD_TICKS;
825 				params.period = intel_pt_ns_to_ticks(pt,
826 							pt->synth_opts.period);
827 				break;
828 			default:
829 				break;
830 			}
831 		}
832 
833 		if (!params.period) {
834 			params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
835 			params.period = 1;
836 		}
837 	}
838 
839 	if (env->cpuid && !strncmp(env->cpuid, "GenuineIntel,6,92,", 18))
840 		params.flags |= INTEL_PT_FUP_WITH_NLIP;
841 
842 	ptq->decoder = intel_pt_decoder_new(&params);
843 	if (!ptq->decoder)
844 		goto out_free;
845 
846 	return ptq;
847 
848 out_free:
849 	zfree(&ptq->event_buf);
850 	zfree(&ptq->last_branch);
851 	zfree(&ptq->last_branch_rb);
852 	zfree(&ptq->chain);
853 	free(ptq);
854 	return NULL;
855 }
856 
intel_pt_free_queue(void * priv)857 static void intel_pt_free_queue(void *priv)
858 {
859 	struct intel_pt_queue *ptq = priv;
860 
861 	if (!ptq)
862 		return;
863 	thread__zput(ptq->thread);
864 	intel_pt_decoder_free(ptq->decoder);
865 	zfree(&ptq->event_buf);
866 	zfree(&ptq->last_branch);
867 	zfree(&ptq->last_branch_rb);
868 	zfree(&ptq->chain);
869 	free(ptq);
870 }
871 
intel_pt_set_pid_tid_cpu(struct intel_pt * pt,struct auxtrace_queue * queue)872 static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
873 				     struct auxtrace_queue *queue)
874 {
875 	struct intel_pt_queue *ptq = queue->priv;
876 
877 	if (queue->tid == -1 || pt->have_sched_switch) {
878 		ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
879 		if (ptq->tid == -1)
880 			ptq->pid = -1;
881 		thread__zput(ptq->thread);
882 	}
883 
884 	if (!ptq->thread && ptq->tid != -1)
885 		ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
886 
887 	if (ptq->thread) {
888 		ptq->pid = ptq->thread->pid_;
889 		if (queue->cpu == -1)
890 			ptq->cpu = ptq->thread->cpu;
891 	}
892 }
893 
intel_pt_sample_flags(struct intel_pt_queue * ptq)894 static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
895 {
896 	if (ptq->state->flags & INTEL_PT_ABORT_TX) {
897 		ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
898 	} else if (ptq->state->flags & INTEL_PT_ASYNC) {
899 		if (ptq->state->to_ip)
900 			ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
901 				     PERF_IP_FLAG_ASYNC |
902 				     PERF_IP_FLAG_INTERRUPT;
903 		else
904 			ptq->flags = PERF_IP_FLAG_BRANCH |
905 				     PERF_IP_FLAG_TRACE_END;
906 		ptq->insn_len = 0;
907 	} else {
908 		if (ptq->state->from_ip)
909 			ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
910 		else
911 			ptq->flags = PERF_IP_FLAG_BRANCH |
912 				     PERF_IP_FLAG_TRACE_BEGIN;
913 		if (ptq->state->flags & INTEL_PT_IN_TX)
914 			ptq->flags |= PERF_IP_FLAG_IN_TX;
915 		ptq->insn_len = ptq->state->insn_len;
916 		memcpy(ptq->insn, ptq->state->insn, INTEL_PT_INSN_BUF_SZ);
917 	}
918 }
919 
intel_pt_setup_queue(struct intel_pt * pt,struct auxtrace_queue * queue,unsigned int queue_nr)920 static int intel_pt_setup_queue(struct intel_pt *pt,
921 				struct auxtrace_queue *queue,
922 				unsigned int queue_nr)
923 {
924 	struct intel_pt_queue *ptq = queue->priv;
925 
926 	if (list_empty(&queue->head))
927 		return 0;
928 
929 	if (!ptq) {
930 		ptq = intel_pt_alloc_queue(pt, queue_nr);
931 		if (!ptq)
932 			return -ENOMEM;
933 		queue->priv = ptq;
934 
935 		if (queue->cpu != -1)
936 			ptq->cpu = queue->cpu;
937 		ptq->tid = queue->tid;
938 
939 		if (pt->sampling_mode && !pt->snapshot_mode &&
940 		    pt->timeless_decoding)
941 			ptq->step_through_buffers = true;
942 
943 		ptq->sync_switch = pt->sync_switch;
944 	}
945 
946 	if (!ptq->on_heap &&
947 	    (!ptq->sync_switch ||
948 	     ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
949 		const struct intel_pt_state *state;
950 		int ret;
951 
952 		if (pt->timeless_decoding)
953 			return 0;
954 
955 		intel_pt_log("queue %u getting timestamp\n", queue_nr);
956 		intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
957 			     queue_nr, ptq->cpu, ptq->pid, ptq->tid);
958 		while (1) {
959 			state = intel_pt_decode(ptq->decoder);
960 			if (state->err) {
961 				if (state->err == INTEL_PT_ERR_NODATA) {
962 					intel_pt_log("queue %u has no timestamp\n",
963 						     queue_nr);
964 					return 0;
965 				}
966 				continue;
967 			}
968 			if (state->timestamp)
969 				break;
970 		}
971 
972 		ptq->timestamp = state->timestamp;
973 		intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
974 			     queue_nr, ptq->timestamp);
975 		ptq->state = state;
976 		ptq->have_sample = true;
977 		intel_pt_sample_flags(ptq);
978 		ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
979 		if (ret)
980 			return ret;
981 		ptq->on_heap = true;
982 	}
983 
984 	return 0;
985 }
986 
intel_pt_setup_queues(struct intel_pt * pt)987 static int intel_pt_setup_queues(struct intel_pt *pt)
988 {
989 	unsigned int i;
990 	int ret;
991 
992 	for (i = 0; i < pt->queues.nr_queues; i++) {
993 		ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
994 		if (ret)
995 			return ret;
996 	}
997 	return 0;
998 }
999 
intel_pt_copy_last_branch_rb(struct intel_pt_queue * ptq)1000 static inline void intel_pt_copy_last_branch_rb(struct intel_pt_queue *ptq)
1001 {
1002 	struct branch_stack *bs_src = ptq->last_branch_rb;
1003 	struct branch_stack *bs_dst = ptq->last_branch;
1004 	size_t nr = 0;
1005 
1006 	bs_dst->nr = bs_src->nr;
1007 
1008 	if (!bs_src->nr)
1009 		return;
1010 
1011 	nr = ptq->pt->synth_opts.last_branch_sz - ptq->last_branch_pos;
1012 	memcpy(&bs_dst->entries[0],
1013 	       &bs_src->entries[ptq->last_branch_pos],
1014 	       sizeof(struct branch_entry) * nr);
1015 
1016 	if (bs_src->nr >= ptq->pt->synth_opts.last_branch_sz) {
1017 		memcpy(&bs_dst->entries[nr],
1018 		       &bs_src->entries[0],
1019 		       sizeof(struct branch_entry) * ptq->last_branch_pos);
1020 	}
1021 }
1022 
intel_pt_reset_last_branch_rb(struct intel_pt_queue * ptq)1023 static inline void intel_pt_reset_last_branch_rb(struct intel_pt_queue *ptq)
1024 {
1025 	ptq->last_branch_pos = 0;
1026 	ptq->last_branch_rb->nr = 0;
1027 }
1028 
intel_pt_update_last_branch_rb(struct intel_pt_queue * ptq)1029 static void intel_pt_update_last_branch_rb(struct intel_pt_queue *ptq)
1030 {
1031 	const struct intel_pt_state *state = ptq->state;
1032 	struct branch_stack *bs = ptq->last_branch_rb;
1033 	struct branch_entry *be;
1034 
1035 	if (!ptq->last_branch_pos)
1036 		ptq->last_branch_pos = ptq->pt->synth_opts.last_branch_sz;
1037 
1038 	ptq->last_branch_pos -= 1;
1039 
1040 	be              = &bs->entries[ptq->last_branch_pos];
1041 	be->from        = state->from_ip;
1042 	be->to          = state->to_ip;
1043 	be->flags.abort = !!(state->flags & INTEL_PT_ABORT_TX);
1044 	be->flags.in_tx = !!(state->flags & INTEL_PT_IN_TX);
1045 	/* No support for mispredict */
1046 	be->flags.mispred = ptq->pt->mispred_all;
1047 
1048 	if (bs->nr < ptq->pt->synth_opts.last_branch_sz)
1049 		bs->nr += 1;
1050 }
1051 
intel_pt_skip_event(struct intel_pt * pt)1052 static inline bool intel_pt_skip_event(struct intel_pt *pt)
1053 {
1054 	return pt->synth_opts.initial_skip &&
1055 	       pt->num_events++ < pt->synth_opts.initial_skip;
1056 }
1057 
intel_pt_prep_b_sample(struct intel_pt * pt,struct intel_pt_queue * ptq,union perf_event * event,struct perf_sample * sample)1058 static void intel_pt_prep_b_sample(struct intel_pt *pt,
1059 				   struct intel_pt_queue *ptq,
1060 				   union perf_event *event,
1061 				   struct perf_sample *sample)
1062 {
1063 	if (!pt->timeless_decoding)
1064 		sample->time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
1065 
1066 	sample->ip = ptq->state->from_ip;
1067 	sample->cpumode = intel_pt_cpumode(pt, sample->ip);
1068 	sample->pid = ptq->pid;
1069 	sample->tid = ptq->tid;
1070 	sample->addr = ptq->state->to_ip;
1071 	sample->period = 1;
1072 	sample->cpu = ptq->cpu;
1073 	sample->flags = ptq->flags;
1074 	sample->insn_len = ptq->insn_len;
1075 	memcpy(sample->insn, ptq->insn, INTEL_PT_INSN_BUF_SZ);
1076 
1077 	event->sample.header.type = PERF_RECORD_SAMPLE;
1078 	event->sample.header.misc = sample->cpumode;
1079 	event->sample.header.size = sizeof(struct perf_event_header);
1080 }
1081 
intel_pt_inject_event(union perf_event * event,struct perf_sample * sample,u64 type)1082 static int intel_pt_inject_event(union perf_event *event,
1083 				 struct perf_sample *sample, u64 type)
1084 {
1085 	event->header.size = perf_event__sample_event_size(sample, type, 0);
1086 	return perf_event__synthesize_sample(event, type, 0, sample);
1087 }
1088 
intel_pt_opt_inject(struct intel_pt * pt,union perf_event * event,struct perf_sample * sample,u64 type)1089 static inline int intel_pt_opt_inject(struct intel_pt *pt,
1090 				      union perf_event *event,
1091 				      struct perf_sample *sample, u64 type)
1092 {
1093 	if (!pt->synth_opts.inject)
1094 		return 0;
1095 
1096 	return intel_pt_inject_event(event, sample, type);
1097 }
1098 
intel_pt_deliver_synth_b_event(struct intel_pt * pt,union perf_event * event,struct perf_sample * sample,u64 type)1099 static int intel_pt_deliver_synth_b_event(struct intel_pt *pt,
1100 					  union perf_event *event,
1101 					  struct perf_sample *sample, u64 type)
1102 {
1103 	int ret;
1104 
1105 	ret = intel_pt_opt_inject(pt, event, sample, type);
1106 	if (ret)
1107 		return ret;
1108 
1109 	ret = perf_session__deliver_synth_event(pt->session, event, sample);
1110 	if (ret)
1111 		pr_err("Intel PT: failed to deliver event, error %d\n", ret);
1112 
1113 	return ret;
1114 }
1115 
intel_pt_synth_branch_sample(struct intel_pt_queue * ptq)1116 static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
1117 {
1118 	struct intel_pt *pt = ptq->pt;
1119 	union perf_event *event = ptq->event_buf;
1120 	struct perf_sample sample = { .ip = 0, };
1121 	struct dummy_branch_stack {
1122 		u64			nr;
1123 		struct branch_entry	entries;
1124 	} dummy_bs;
1125 
1126 	if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
1127 		return 0;
1128 
1129 	if (intel_pt_skip_event(pt))
1130 		return 0;
1131 
1132 	intel_pt_prep_b_sample(pt, ptq, event, &sample);
1133 
1134 	sample.id = ptq->pt->branches_id;
1135 	sample.stream_id = ptq->pt->branches_id;
1136 
1137 	/*
1138 	 * perf report cannot handle events without a branch stack when using
1139 	 * SORT_MODE__BRANCH so make a dummy one.
1140 	 */
1141 	if (pt->synth_opts.last_branch && sort__mode == SORT_MODE__BRANCH) {
1142 		dummy_bs = (struct dummy_branch_stack){
1143 			.nr = 1,
1144 			.entries = {
1145 				.from = sample.ip,
1146 				.to = sample.addr,
1147 			},
1148 		};
1149 		sample.branch_stack = (struct branch_stack *)&dummy_bs;
1150 	}
1151 
1152 	return intel_pt_deliver_synth_b_event(pt, event, &sample,
1153 					      pt->branches_sample_type);
1154 }
1155 
intel_pt_prep_sample(struct intel_pt * pt,struct intel_pt_queue * ptq,union perf_event * event,struct perf_sample * sample)1156 static void intel_pt_prep_sample(struct intel_pt *pt,
1157 				 struct intel_pt_queue *ptq,
1158 				 union perf_event *event,
1159 				 struct perf_sample *sample)
1160 {
1161 	intel_pt_prep_b_sample(pt, ptq, event, sample);
1162 
1163 	if (pt->synth_opts.callchain) {
1164 		thread_stack__sample(ptq->thread, ptq->chain,
1165 				     pt->synth_opts.callchain_sz + 1,
1166 				     sample->ip, pt->kernel_start);
1167 		sample->callchain = ptq->chain;
1168 	}
1169 
1170 	if (pt->synth_opts.last_branch) {
1171 		intel_pt_copy_last_branch_rb(ptq);
1172 		sample->branch_stack = ptq->last_branch;
1173 	}
1174 }
1175 
intel_pt_deliver_synth_event(struct intel_pt * pt,struct intel_pt_queue * ptq,union perf_event * event,struct perf_sample * sample,u64 type)1176 static inline int intel_pt_deliver_synth_event(struct intel_pt *pt,
1177 					       struct intel_pt_queue *ptq,
1178 					       union perf_event *event,
1179 					       struct perf_sample *sample,
1180 					       u64 type)
1181 {
1182 	int ret;
1183 
1184 	ret = intel_pt_deliver_synth_b_event(pt, event, sample, type);
1185 
1186 	if (pt->synth_opts.last_branch)
1187 		intel_pt_reset_last_branch_rb(ptq);
1188 
1189 	return ret;
1190 }
1191 
intel_pt_synth_instruction_sample(struct intel_pt_queue * ptq)1192 static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
1193 {
1194 	struct intel_pt *pt = ptq->pt;
1195 	union perf_event *event = ptq->event_buf;
1196 	struct perf_sample sample = { .ip = 0, };
1197 
1198 	if (intel_pt_skip_event(pt))
1199 		return 0;
1200 
1201 	intel_pt_prep_sample(pt, ptq, event, &sample);
1202 
1203 	sample.id = ptq->pt->instructions_id;
1204 	sample.stream_id = ptq->pt->instructions_id;
1205 	sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
1206 
1207 	ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
1208 
1209 	return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1210 					    pt->instructions_sample_type);
1211 }
1212 
intel_pt_synth_transaction_sample(struct intel_pt_queue * ptq)1213 static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
1214 {
1215 	struct intel_pt *pt = ptq->pt;
1216 	union perf_event *event = ptq->event_buf;
1217 	struct perf_sample sample = { .ip = 0, };
1218 
1219 	if (intel_pt_skip_event(pt))
1220 		return 0;
1221 
1222 	intel_pt_prep_sample(pt, ptq, event, &sample);
1223 
1224 	sample.id = ptq->pt->transactions_id;
1225 	sample.stream_id = ptq->pt->transactions_id;
1226 
1227 	return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1228 					    pt->transactions_sample_type);
1229 }
1230 
intel_pt_prep_p_sample(struct intel_pt * pt,struct intel_pt_queue * ptq,union perf_event * event,struct perf_sample * sample)1231 static void intel_pt_prep_p_sample(struct intel_pt *pt,
1232 				   struct intel_pt_queue *ptq,
1233 				   union perf_event *event,
1234 				   struct perf_sample *sample)
1235 {
1236 	intel_pt_prep_sample(pt, ptq, event, sample);
1237 
1238 	/*
1239 	 * Zero IP is used to mean "trace start" but that is not the case for
1240 	 * power or PTWRITE events with no IP, so clear the flags.
1241 	 */
1242 	if (!sample->ip)
1243 		sample->flags = 0;
1244 }
1245 
intel_pt_synth_ptwrite_sample(struct intel_pt_queue * ptq)1246 static int intel_pt_synth_ptwrite_sample(struct intel_pt_queue *ptq)
1247 {
1248 	struct intel_pt *pt = ptq->pt;
1249 	union perf_event *event = ptq->event_buf;
1250 	struct perf_sample sample = { .ip = 0, };
1251 	struct perf_synth_intel_ptwrite raw;
1252 
1253 	if (intel_pt_skip_event(pt))
1254 		return 0;
1255 
1256 	intel_pt_prep_p_sample(pt, ptq, event, &sample);
1257 
1258 	sample.id = ptq->pt->ptwrites_id;
1259 	sample.stream_id = ptq->pt->ptwrites_id;
1260 
1261 	raw.flags = 0;
1262 	raw.ip = !!(ptq->state->flags & INTEL_PT_FUP_IP);
1263 	raw.payload = cpu_to_le64(ptq->state->ptw_payload);
1264 
1265 	sample.raw_size = perf_synth__raw_size(raw);
1266 	sample.raw_data = perf_synth__raw_data(&raw);
1267 
1268 	return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1269 					    pt->ptwrites_sample_type);
1270 }
1271 
intel_pt_synth_cbr_sample(struct intel_pt_queue * ptq)1272 static int intel_pt_synth_cbr_sample(struct intel_pt_queue *ptq)
1273 {
1274 	struct intel_pt *pt = ptq->pt;
1275 	union perf_event *event = ptq->event_buf;
1276 	struct perf_sample sample = { .ip = 0, };
1277 	struct perf_synth_intel_cbr raw;
1278 	u32 flags;
1279 
1280 	if (intel_pt_skip_event(pt))
1281 		return 0;
1282 
1283 	intel_pt_prep_p_sample(pt, ptq, event, &sample);
1284 
1285 	sample.id = ptq->pt->cbr_id;
1286 	sample.stream_id = ptq->pt->cbr_id;
1287 
1288 	flags = (u16)ptq->state->cbr_payload | (pt->max_non_turbo_ratio << 16);
1289 	raw.flags = cpu_to_le32(flags);
1290 	raw.freq = cpu_to_le32(raw.cbr * pt->cbr2khz);
1291 	raw.reserved3 = 0;
1292 
1293 	sample.raw_size = perf_synth__raw_size(raw);
1294 	sample.raw_data = perf_synth__raw_data(&raw);
1295 
1296 	return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1297 					    pt->pwr_events_sample_type);
1298 }
1299 
intel_pt_synth_mwait_sample(struct intel_pt_queue * ptq)1300 static int intel_pt_synth_mwait_sample(struct intel_pt_queue *ptq)
1301 {
1302 	struct intel_pt *pt = ptq->pt;
1303 	union perf_event *event = ptq->event_buf;
1304 	struct perf_sample sample = { .ip = 0, };
1305 	struct perf_synth_intel_mwait raw;
1306 
1307 	if (intel_pt_skip_event(pt))
1308 		return 0;
1309 
1310 	intel_pt_prep_p_sample(pt, ptq, event, &sample);
1311 
1312 	sample.id = ptq->pt->mwait_id;
1313 	sample.stream_id = ptq->pt->mwait_id;
1314 
1315 	raw.reserved = 0;
1316 	raw.payload = cpu_to_le64(ptq->state->mwait_payload);
1317 
1318 	sample.raw_size = perf_synth__raw_size(raw);
1319 	sample.raw_data = perf_synth__raw_data(&raw);
1320 
1321 	return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1322 					    pt->pwr_events_sample_type);
1323 }
1324 
intel_pt_synth_pwre_sample(struct intel_pt_queue * ptq)1325 static int intel_pt_synth_pwre_sample(struct intel_pt_queue *ptq)
1326 {
1327 	struct intel_pt *pt = ptq->pt;
1328 	union perf_event *event = ptq->event_buf;
1329 	struct perf_sample sample = { .ip = 0, };
1330 	struct perf_synth_intel_pwre raw;
1331 
1332 	if (intel_pt_skip_event(pt))
1333 		return 0;
1334 
1335 	intel_pt_prep_p_sample(pt, ptq, event, &sample);
1336 
1337 	sample.id = ptq->pt->pwre_id;
1338 	sample.stream_id = ptq->pt->pwre_id;
1339 
1340 	raw.reserved = 0;
1341 	raw.payload = cpu_to_le64(ptq->state->pwre_payload);
1342 
1343 	sample.raw_size = perf_synth__raw_size(raw);
1344 	sample.raw_data = perf_synth__raw_data(&raw);
1345 
1346 	return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1347 					    pt->pwr_events_sample_type);
1348 }
1349 
intel_pt_synth_exstop_sample(struct intel_pt_queue * ptq)1350 static int intel_pt_synth_exstop_sample(struct intel_pt_queue *ptq)
1351 {
1352 	struct intel_pt *pt = ptq->pt;
1353 	union perf_event *event = ptq->event_buf;
1354 	struct perf_sample sample = { .ip = 0, };
1355 	struct perf_synth_intel_exstop raw;
1356 
1357 	if (intel_pt_skip_event(pt))
1358 		return 0;
1359 
1360 	intel_pt_prep_p_sample(pt, ptq, event, &sample);
1361 
1362 	sample.id = ptq->pt->exstop_id;
1363 	sample.stream_id = ptq->pt->exstop_id;
1364 
1365 	raw.flags = 0;
1366 	raw.ip = !!(ptq->state->flags & INTEL_PT_FUP_IP);
1367 
1368 	sample.raw_size = perf_synth__raw_size(raw);
1369 	sample.raw_data = perf_synth__raw_data(&raw);
1370 
1371 	return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1372 					    pt->pwr_events_sample_type);
1373 }
1374 
intel_pt_synth_pwrx_sample(struct intel_pt_queue * ptq)1375 static int intel_pt_synth_pwrx_sample(struct intel_pt_queue *ptq)
1376 {
1377 	struct intel_pt *pt = ptq->pt;
1378 	union perf_event *event = ptq->event_buf;
1379 	struct perf_sample sample = { .ip = 0, };
1380 	struct perf_synth_intel_pwrx raw;
1381 
1382 	if (intel_pt_skip_event(pt))
1383 		return 0;
1384 
1385 	intel_pt_prep_p_sample(pt, ptq, event, &sample);
1386 
1387 	sample.id = ptq->pt->pwrx_id;
1388 	sample.stream_id = ptq->pt->pwrx_id;
1389 
1390 	raw.reserved = 0;
1391 	raw.payload = cpu_to_le64(ptq->state->pwrx_payload);
1392 
1393 	sample.raw_size = perf_synth__raw_size(raw);
1394 	sample.raw_data = perf_synth__raw_data(&raw);
1395 
1396 	return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1397 					    pt->pwr_events_sample_type);
1398 }
1399 
intel_pt_synth_error(struct intel_pt * pt,int code,int cpu,pid_t pid,pid_t tid,u64 ip)1400 static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
1401 				pid_t pid, pid_t tid, u64 ip)
1402 {
1403 	union perf_event event;
1404 	char msg[MAX_AUXTRACE_ERROR_MSG];
1405 	int err;
1406 
1407 	intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
1408 
1409 	auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
1410 			     code, cpu, pid, tid, ip, msg);
1411 
1412 	err = perf_session__deliver_synth_event(pt->session, &event, NULL);
1413 	if (err)
1414 		pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
1415 		       err);
1416 
1417 	return err;
1418 }
1419 
intel_pt_next_tid(struct intel_pt * pt,struct intel_pt_queue * ptq)1420 static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
1421 {
1422 	struct auxtrace_queue *queue;
1423 	pid_t tid = ptq->next_tid;
1424 	int err;
1425 
1426 	if (tid == -1)
1427 		return 0;
1428 
1429 	intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
1430 
1431 	err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
1432 
1433 	queue = &pt->queues.queue_array[ptq->queue_nr];
1434 	intel_pt_set_pid_tid_cpu(pt, queue);
1435 
1436 	ptq->next_tid = -1;
1437 
1438 	return err;
1439 }
1440 
intel_pt_is_switch_ip(struct intel_pt_queue * ptq,u64 ip)1441 static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
1442 {
1443 	struct intel_pt *pt = ptq->pt;
1444 
1445 	return ip == pt->switch_ip &&
1446 	       (ptq->flags & PERF_IP_FLAG_BRANCH) &&
1447 	       !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
1448 			       PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
1449 }
1450 
1451 #define INTEL_PT_PWR_EVT (INTEL_PT_MWAIT_OP | INTEL_PT_PWR_ENTRY | \
1452 			  INTEL_PT_EX_STOP | INTEL_PT_PWR_EXIT | \
1453 			  INTEL_PT_CBR_CHG)
1454 
intel_pt_sample(struct intel_pt_queue * ptq)1455 static int intel_pt_sample(struct intel_pt_queue *ptq)
1456 {
1457 	const struct intel_pt_state *state = ptq->state;
1458 	struct intel_pt *pt = ptq->pt;
1459 	int err;
1460 
1461 	if (!ptq->have_sample)
1462 		return 0;
1463 
1464 	ptq->have_sample = false;
1465 
1466 	if (pt->sample_pwr_events && (state->type & INTEL_PT_PWR_EVT)) {
1467 		if (state->type & INTEL_PT_CBR_CHG) {
1468 			err = intel_pt_synth_cbr_sample(ptq);
1469 			if (err)
1470 				return err;
1471 		}
1472 		if (state->type & INTEL_PT_MWAIT_OP) {
1473 			err = intel_pt_synth_mwait_sample(ptq);
1474 			if (err)
1475 				return err;
1476 		}
1477 		if (state->type & INTEL_PT_PWR_ENTRY) {
1478 			err = intel_pt_synth_pwre_sample(ptq);
1479 			if (err)
1480 				return err;
1481 		}
1482 		if (state->type & INTEL_PT_EX_STOP) {
1483 			err = intel_pt_synth_exstop_sample(ptq);
1484 			if (err)
1485 				return err;
1486 		}
1487 		if (state->type & INTEL_PT_PWR_EXIT) {
1488 			err = intel_pt_synth_pwrx_sample(ptq);
1489 			if (err)
1490 				return err;
1491 		}
1492 	}
1493 
1494 	if (pt->sample_instructions && (state->type & INTEL_PT_INSTRUCTION)) {
1495 		err = intel_pt_synth_instruction_sample(ptq);
1496 		if (err)
1497 			return err;
1498 	}
1499 
1500 	if (pt->sample_transactions && (state->type & INTEL_PT_TRANSACTION)) {
1501 		err = intel_pt_synth_transaction_sample(ptq);
1502 		if (err)
1503 			return err;
1504 	}
1505 
1506 	if (pt->sample_ptwrites && (state->type & INTEL_PT_PTW)) {
1507 		err = intel_pt_synth_ptwrite_sample(ptq);
1508 		if (err)
1509 			return err;
1510 	}
1511 
1512 	if (!(state->type & INTEL_PT_BRANCH))
1513 		return 0;
1514 
1515 	if (pt->synth_opts.callchain || pt->synth_opts.thread_stack)
1516 		thread_stack__event(ptq->thread, ptq->flags, state->from_ip,
1517 				    state->to_ip, ptq->insn_len,
1518 				    state->trace_nr);
1519 	else
1520 		thread_stack__set_trace_nr(ptq->thread, state->trace_nr);
1521 
1522 	if (pt->sample_branches) {
1523 		err = intel_pt_synth_branch_sample(ptq);
1524 		if (err)
1525 			return err;
1526 	}
1527 
1528 	if (pt->synth_opts.last_branch)
1529 		intel_pt_update_last_branch_rb(ptq);
1530 
1531 	if (!ptq->sync_switch)
1532 		return 0;
1533 
1534 	if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
1535 		switch (ptq->switch_state) {
1536 		case INTEL_PT_SS_NOT_TRACING:
1537 		case INTEL_PT_SS_UNKNOWN:
1538 		case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1539 			err = intel_pt_next_tid(pt, ptq);
1540 			if (err)
1541 				return err;
1542 			ptq->switch_state = INTEL_PT_SS_TRACING;
1543 			break;
1544 		default:
1545 			ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
1546 			return 1;
1547 		}
1548 	} else if (!state->to_ip) {
1549 		ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
1550 	} else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
1551 		ptq->switch_state = INTEL_PT_SS_UNKNOWN;
1552 	} else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1553 		   state->to_ip == pt->ptss_ip &&
1554 		   (ptq->flags & PERF_IP_FLAG_CALL)) {
1555 		ptq->switch_state = INTEL_PT_SS_TRACING;
1556 	}
1557 
1558 	return 0;
1559 }
1560 
intel_pt_switch_ip(struct intel_pt * pt,u64 * ptss_ip)1561 static u64 intel_pt_switch_ip(struct intel_pt *pt, u64 *ptss_ip)
1562 {
1563 	struct machine *machine = pt->machine;
1564 	struct map *map;
1565 	struct symbol *sym, *start;
1566 	u64 ip, switch_ip = 0;
1567 	const char *ptss;
1568 
1569 	if (ptss_ip)
1570 		*ptss_ip = 0;
1571 
1572 	map = machine__kernel_map(machine);
1573 	if (!map)
1574 		return 0;
1575 
1576 	if (map__load(map))
1577 		return 0;
1578 
1579 	start = dso__first_symbol(map->dso);
1580 
1581 	for (sym = start; sym; sym = dso__next_symbol(sym)) {
1582 		if (sym->binding == STB_GLOBAL &&
1583 		    !strcmp(sym->name, "__switch_to")) {
1584 			ip = map->unmap_ip(map, sym->start);
1585 			if (ip >= map->start && ip < map->end) {
1586 				switch_ip = ip;
1587 				break;
1588 			}
1589 		}
1590 	}
1591 
1592 	if (!switch_ip || !ptss_ip)
1593 		return 0;
1594 
1595 	if (pt->have_sched_switch == 1)
1596 		ptss = "perf_trace_sched_switch";
1597 	else
1598 		ptss = "__perf_event_task_sched_out";
1599 
1600 	for (sym = start; sym; sym = dso__next_symbol(sym)) {
1601 		if (!strcmp(sym->name, ptss)) {
1602 			ip = map->unmap_ip(map, sym->start);
1603 			if (ip >= map->start && ip < map->end) {
1604 				*ptss_ip = ip;
1605 				break;
1606 			}
1607 		}
1608 	}
1609 
1610 	return switch_ip;
1611 }
1612 
intel_pt_enable_sync_switch(struct intel_pt * pt)1613 static void intel_pt_enable_sync_switch(struct intel_pt *pt)
1614 {
1615 	unsigned int i;
1616 
1617 	pt->sync_switch = true;
1618 
1619 	for (i = 0; i < pt->queues.nr_queues; i++) {
1620 		struct auxtrace_queue *queue = &pt->queues.queue_array[i];
1621 		struct intel_pt_queue *ptq = queue->priv;
1622 
1623 		if (ptq)
1624 			ptq->sync_switch = true;
1625 	}
1626 }
1627 
intel_pt_run_decoder(struct intel_pt_queue * ptq,u64 * timestamp)1628 static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
1629 {
1630 	const struct intel_pt_state *state = ptq->state;
1631 	struct intel_pt *pt = ptq->pt;
1632 	int err;
1633 
1634 	if (!pt->kernel_start) {
1635 		pt->kernel_start = machine__kernel_start(pt->machine);
1636 		if (pt->per_cpu_mmaps &&
1637 		    (pt->have_sched_switch == 1 || pt->have_sched_switch == 3) &&
1638 		    !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
1639 		    !pt->sampling_mode) {
1640 			pt->switch_ip = intel_pt_switch_ip(pt, &pt->ptss_ip);
1641 			if (pt->switch_ip) {
1642 				intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
1643 					     pt->switch_ip, pt->ptss_ip);
1644 				intel_pt_enable_sync_switch(pt);
1645 			}
1646 		}
1647 	}
1648 
1649 	intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
1650 		     ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
1651 	while (1) {
1652 		err = intel_pt_sample(ptq);
1653 		if (err)
1654 			return err;
1655 
1656 		state = intel_pt_decode(ptq->decoder);
1657 		if (state->err) {
1658 			if (state->err == INTEL_PT_ERR_NODATA)
1659 				return 1;
1660 			if (ptq->sync_switch &&
1661 			    state->from_ip >= pt->kernel_start) {
1662 				ptq->sync_switch = false;
1663 				intel_pt_next_tid(pt, ptq);
1664 			}
1665 			if (pt->synth_opts.errors) {
1666 				err = intel_pt_synth_error(pt, state->err,
1667 							   ptq->cpu, ptq->pid,
1668 							   ptq->tid,
1669 							   state->from_ip);
1670 				if (err)
1671 					return err;
1672 			}
1673 			continue;
1674 		}
1675 
1676 		ptq->state = state;
1677 		ptq->have_sample = true;
1678 		intel_pt_sample_flags(ptq);
1679 
1680 		/* Use estimated TSC upon return to user space */
1681 		if (pt->est_tsc &&
1682 		    (state->from_ip >= pt->kernel_start || !state->from_ip) &&
1683 		    state->to_ip && state->to_ip < pt->kernel_start) {
1684 			intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1685 				     state->timestamp, state->est_timestamp);
1686 			ptq->timestamp = state->est_timestamp;
1687 		/* Use estimated TSC in unknown switch state */
1688 		} else if (ptq->sync_switch &&
1689 			   ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1690 			   intel_pt_is_switch_ip(ptq, state->to_ip) &&
1691 			   ptq->next_tid == -1) {
1692 			intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1693 				     state->timestamp, state->est_timestamp);
1694 			ptq->timestamp = state->est_timestamp;
1695 		} else if (state->timestamp > ptq->timestamp) {
1696 			ptq->timestamp = state->timestamp;
1697 		}
1698 
1699 		if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
1700 			*timestamp = ptq->timestamp;
1701 			return 0;
1702 		}
1703 	}
1704 	return 0;
1705 }
1706 
intel_pt_update_queues(struct intel_pt * pt)1707 static inline int intel_pt_update_queues(struct intel_pt *pt)
1708 {
1709 	if (pt->queues.new_data) {
1710 		pt->queues.new_data = false;
1711 		return intel_pt_setup_queues(pt);
1712 	}
1713 	return 0;
1714 }
1715 
intel_pt_process_queues(struct intel_pt * pt,u64 timestamp)1716 static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
1717 {
1718 	unsigned int queue_nr;
1719 	u64 ts;
1720 	int ret;
1721 
1722 	while (1) {
1723 		struct auxtrace_queue *queue;
1724 		struct intel_pt_queue *ptq;
1725 
1726 		if (!pt->heap.heap_cnt)
1727 			return 0;
1728 
1729 		if (pt->heap.heap_array[0].ordinal >= timestamp)
1730 			return 0;
1731 
1732 		queue_nr = pt->heap.heap_array[0].queue_nr;
1733 		queue = &pt->queues.queue_array[queue_nr];
1734 		ptq = queue->priv;
1735 
1736 		intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
1737 			     queue_nr, pt->heap.heap_array[0].ordinal,
1738 			     timestamp);
1739 
1740 		auxtrace_heap__pop(&pt->heap);
1741 
1742 		if (pt->heap.heap_cnt) {
1743 			ts = pt->heap.heap_array[0].ordinal + 1;
1744 			if (ts > timestamp)
1745 				ts = timestamp;
1746 		} else {
1747 			ts = timestamp;
1748 		}
1749 
1750 		intel_pt_set_pid_tid_cpu(pt, queue);
1751 
1752 		ret = intel_pt_run_decoder(ptq, &ts);
1753 
1754 		if (ret < 0) {
1755 			auxtrace_heap__add(&pt->heap, queue_nr, ts);
1756 			return ret;
1757 		}
1758 
1759 		if (!ret) {
1760 			ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
1761 			if (ret < 0)
1762 				return ret;
1763 		} else {
1764 			ptq->on_heap = false;
1765 		}
1766 	}
1767 
1768 	return 0;
1769 }
1770 
intel_pt_process_timeless_queues(struct intel_pt * pt,pid_t tid,u64 time_)1771 static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
1772 					    u64 time_)
1773 {
1774 	struct auxtrace_queues *queues = &pt->queues;
1775 	unsigned int i;
1776 	u64 ts = 0;
1777 
1778 	for (i = 0; i < queues->nr_queues; i++) {
1779 		struct auxtrace_queue *queue = &pt->queues.queue_array[i];
1780 		struct intel_pt_queue *ptq = queue->priv;
1781 
1782 		if (ptq && (tid == -1 || ptq->tid == tid)) {
1783 			ptq->time = time_;
1784 			intel_pt_set_pid_tid_cpu(pt, queue);
1785 			intel_pt_run_decoder(ptq, &ts);
1786 		}
1787 	}
1788 	return 0;
1789 }
1790 
intel_pt_lost(struct intel_pt * pt,struct perf_sample * sample)1791 static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
1792 {
1793 	return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
1794 				    sample->pid, sample->tid, 0);
1795 }
1796 
intel_pt_cpu_to_ptq(struct intel_pt * pt,int cpu)1797 static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
1798 {
1799 	unsigned i, j;
1800 
1801 	if (cpu < 0 || !pt->queues.nr_queues)
1802 		return NULL;
1803 
1804 	if ((unsigned)cpu >= pt->queues.nr_queues)
1805 		i = pt->queues.nr_queues - 1;
1806 	else
1807 		i = cpu;
1808 
1809 	if (pt->queues.queue_array[i].cpu == cpu)
1810 		return pt->queues.queue_array[i].priv;
1811 
1812 	for (j = 0; i > 0; j++) {
1813 		if (pt->queues.queue_array[--i].cpu == cpu)
1814 			return pt->queues.queue_array[i].priv;
1815 	}
1816 
1817 	for (; j < pt->queues.nr_queues; j++) {
1818 		if (pt->queues.queue_array[j].cpu == cpu)
1819 			return pt->queues.queue_array[j].priv;
1820 	}
1821 
1822 	return NULL;
1823 }
1824 
intel_pt_sync_switch(struct intel_pt * pt,int cpu,pid_t tid,u64 timestamp)1825 static int intel_pt_sync_switch(struct intel_pt *pt, int cpu, pid_t tid,
1826 				u64 timestamp)
1827 {
1828 	struct intel_pt_queue *ptq;
1829 	int err;
1830 
1831 	if (!pt->sync_switch)
1832 		return 1;
1833 
1834 	ptq = intel_pt_cpu_to_ptq(pt, cpu);
1835 	if (!ptq || !ptq->sync_switch)
1836 		return 1;
1837 
1838 	switch (ptq->switch_state) {
1839 	case INTEL_PT_SS_NOT_TRACING:
1840 		ptq->next_tid = -1;
1841 		break;
1842 	case INTEL_PT_SS_UNKNOWN:
1843 	case INTEL_PT_SS_TRACING:
1844 		ptq->next_tid = tid;
1845 		ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
1846 		return 0;
1847 	case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
1848 		if (!ptq->on_heap) {
1849 			ptq->timestamp = perf_time_to_tsc(timestamp,
1850 							  &pt->tc);
1851 			err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
1852 						 ptq->timestamp);
1853 			if (err)
1854 				return err;
1855 			ptq->on_heap = true;
1856 		}
1857 		ptq->switch_state = INTEL_PT_SS_TRACING;
1858 		break;
1859 	case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1860 		ptq->next_tid = tid;
1861 		intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
1862 		break;
1863 	default:
1864 		break;
1865 	}
1866 
1867 	return 1;
1868 }
1869 
intel_pt_process_switch(struct intel_pt * pt,struct perf_sample * sample)1870 static int intel_pt_process_switch(struct intel_pt *pt,
1871 				   struct perf_sample *sample)
1872 {
1873 	struct perf_evsel *evsel;
1874 	pid_t tid;
1875 	int cpu, ret;
1876 
1877 	evsel = perf_evlist__id2evsel(pt->session->evlist, sample->id);
1878 	if (evsel != pt->switch_evsel)
1879 		return 0;
1880 
1881 	tid = perf_evsel__intval(evsel, sample, "next_pid");
1882 	cpu = sample->cpu;
1883 
1884 	intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1885 		     cpu, tid, sample->time, perf_time_to_tsc(sample->time,
1886 		     &pt->tc));
1887 
1888 	ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
1889 	if (ret <= 0)
1890 		return ret;
1891 
1892 	return machine__set_current_tid(pt->machine, cpu, -1, tid);
1893 }
1894 
intel_pt_context_switch(struct intel_pt * pt,union perf_event * event,struct perf_sample * sample)1895 static int intel_pt_context_switch(struct intel_pt *pt, union perf_event *event,
1896 				   struct perf_sample *sample)
1897 {
1898 	bool out = event->header.misc & PERF_RECORD_MISC_SWITCH_OUT;
1899 	pid_t pid, tid;
1900 	int cpu, ret;
1901 
1902 	cpu = sample->cpu;
1903 
1904 	if (pt->have_sched_switch == 3) {
1905 		if (!out)
1906 			return 0;
1907 		if (event->header.type != PERF_RECORD_SWITCH_CPU_WIDE) {
1908 			pr_err("Expecting CPU-wide context switch event\n");
1909 			return -EINVAL;
1910 		}
1911 		pid = event->context_switch.next_prev_pid;
1912 		tid = event->context_switch.next_prev_tid;
1913 	} else {
1914 		if (out)
1915 			return 0;
1916 		pid = sample->pid;
1917 		tid = sample->tid;
1918 	}
1919 
1920 	if (tid == -1)
1921 		intel_pt_log("context_switch event has no tid\n");
1922 
1923 	intel_pt_log("context_switch: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1924 		     cpu, pid, tid, sample->time, perf_time_to_tsc(sample->time,
1925 		     &pt->tc));
1926 
1927 	ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
1928 	if (ret <= 0)
1929 		return ret;
1930 
1931 	return machine__set_current_tid(pt->machine, cpu, pid, tid);
1932 }
1933 
intel_pt_process_itrace_start(struct intel_pt * pt,union perf_event * event,struct perf_sample * sample)1934 static int intel_pt_process_itrace_start(struct intel_pt *pt,
1935 					 union perf_event *event,
1936 					 struct perf_sample *sample)
1937 {
1938 	if (!pt->per_cpu_mmaps)
1939 		return 0;
1940 
1941 	intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1942 		     sample->cpu, event->itrace_start.pid,
1943 		     event->itrace_start.tid, sample->time,
1944 		     perf_time_to_tsc(sample->time, &pt->tc));
1945 
1946 	return machine__set_current_tid(pt->machine, sample->cpu,
1947 					event->itrace_start.pid,
1948 					event->itrace_start.tid);
1949 }
1950 
intel_pt_process_event(struct perf_session * session,union perf_event * event,struct perf_sample * sample,struct perf_tool * tool)1951 static int intel_pt_process_event(struct perf_session *session,
1952 				  union perf_event *event,
1953 				  struct perf_sample *sample,
1954 				  struct perf_tool *tool)
1955 {
1956 	struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1957 					   auxtrace);
1958 	u64 timestamp;
1959 	int err = 0;
1960 
1961 	if (dump_trace)
1962 		return 0;
1963 
1964 	if (!tool->ordered_events) {
1965 		pr_err("Intel Processor Trace requires ordered events\n");
1966 		return -EINVAL;
1967 	}
1968 
1969 	if (sample->time && sample->time != (u64)-1)
1970 		timestamp = perf_time_to_tsc(sample->time, &pt->tc);
1971 	else
1972 		timestamp = 0;
1973 
1974 	if (timestamp || pt->timeless_decoding) {
1975 		err = intel_pt_update_queues(pt);
1976 		if (err)
1977 			return err;
1978 	}
1979 
1980 	if (pt->timeless_decoding) {
1981 		if (event->header.type == PERF_RECORD_EXIT) {
1982 			err = intel_pt_process_timeless_queues(pt,
1983 							       event->fork.tid,
1984 							       sample->time);
1985 		}
1986 	} else if (timestamp) {
1987 		err = intel_pt_process_queues(pt, timestamp);
1988 	}
1989 	if (err)
1990 		return err;
1991 
1992 	if (event->header.type == PERF_RECORD_AUX &&
1993 	    (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
1994 	    pt->synth_opts.errors) {
1995 		err = intel_pt_lost(pt, sample);
1996 		if (err)
1997 			return err;
1998 	}
1999 
2000 	if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
2001 		err = intel_pt_process_switch(pt, sample);
2002 	else if (event->header.type == PERF_RECORD_ITRACE_START)
2003 		err = intel_pt_process_itrace_start(pt, event, sample);
2004 	else if (event->header.type == PERF_RECORD_SWITCH ||
2005 		 event->header.type == PERF_RECORD_SWITCH_CPU_WIDE)
2006 		err = intel_pt_context_switch(pt, event, sample);
2007 
2008 	intel_pt_log("event %s (%u): cpu %d time %"PRIu64" tsc %#"PRIx64"\n",
2009 		     perf_event__name(event->header.type), event->header.type,
2010 		     sample->cpu, sample->time, timestamp);
2011 
2012 	return err;
2013 }
2014 
intel_pt_flush(struct perf_session * session,struct perf_tool * tool)2015 static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
2016 {
2017 	struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2018 					   auxtrace);
2019 	int ret;
2020 
2021 	if (dump_trace)
2022 		return 0;
2023 
2024 	if (!tool->ordered_events)
2025 		return -EINVAL;
2026 
2027 	ret = intel_pt_update_queues(pt);
2028 	if (ret < 0)
2029 		return ret;
2030 
2031 	if (pt->timeless_decoding)
2032 		return intel_pt_process_timeless_queues(pt, -1,
2033 							MAX_TIMESTAMP - 1);
2034 
2035 	return intel_pt_process_queues(pt, MAX_TIMESTAMP);
2036 }
2037 
intel_pt_free_events(struct perf_session * session)2038 static void intel_pt_free_events(struct perf_session *session)
2039 {
2040 	struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2041 					   auxtrace);
2042 	struct auxtrace_queues *queues = &pt->queues;
2043 	unsigned int i;
2044 
2045 	for (i = 0; i < queues->nr_queues; i++) {
2046 		intel_pt_free_queue(queues->queue_array[i].priv);
2047 		queues->queue_array[i].priv = NULL;
2048 	}
2049 	intel_pt_log_disable();
2050 	auxtrace_queues__free(queues);
2051 }
2052 
intel_pt_free(struct perf_session * session)2053 static void intel_pt_free(struct perf_session *session)
2054 {
2055 	struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2056 					   auxtrace);
2057 
2058 	auxtrace_heap__free(&pt->heap);
2059 	intel_pt_free_events(session);
2060 	session->auxtrace = NULL;
2061 	thread__put(pt->unknown_thread);
2062 	addr_filters__exit(&pt->filts);
2063 	zfree(&pt->filter);
2064 	free(pt);
2065 }
2066 
intel_pt_process_auxtrace_event(struct perf_session * session,union perf_event * event,struct perf_tool * tool __maybe_unused)2067 static int intel_pt_process_auxtrace_event(struct perf_session *session,
2068 					   union perf_event *event,
2069 					   struct perf_tool *tool __maybe_unused)
2070 {
2071 	struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2072 					   auxtrace);
2073 
2074 	if (!pt->data_queued) {
2075 		struct auxtrace_buffer *buffer;
2076 		off_t data_offset;
2077 		int fd = perf_data__fd(session->data);
2078 		int err;
2079 
2080 		if (perf_data__is_pipe(session->data)) {
2081 			data_offset = 0;
2082 		} else {
2083 			data_offset = lseek(fd, 0, SEEK_CUR);
2084 			if (data_offset == -1)
2085 				return -errno;
2086 		}
2087 
2088 		err = auxtrace_queues__add_event(&pt->queues, session, event,
2089 						 data_offset, &buffer);
2090 		if (err)
2091 			return err;
2092 
2093 		/* Dump here now we have copied a piped trace out of the pipe */
2094 		if (dump_trace) {
2095 			if (auxtrace_buffer__get_data(buffer, fd)) {
2096 				intel_pt_dump_event(pt, buffer->data,
2097 						    buffer->size);
2098 				auxtrace_buffer__put_data(buffer);
2099 			}
2100 		}
2101 	}
2102 
2103 	return 0;
2104 }
2105 
2106 struct intel_pt_synth {
2107 	struct perf_tool dummy_tool;
2108 	struct perf_session *session;
2109 };
2110 
intel_pt_event_synth(struct perf_tool * tool,union perf_event * event,struct perf_sample * sample __maybe_unused,struct machine * machine __maybe_unused)2111 static int intel_pt_event_synth(struct perf_tool *tool,
2112 				union perf_event *event,
2113 				struct perf_sample *sample __maybe_unused,
2114 				struct machine *machine __maybe_unused)
2115 {
2116 	struct intel_pt_synth *intel_pt_synth =
2117 			container_of(tool, struct intel_pt_synth, dummy_tool);
2118 
2119 	return perf_session__deliver_synth_event(intel_pt_synth->session, event,
2120 						 NULL);
2121 }
2122 
intel_pt_synth_event(struct perf_session * session,const char * name,struct perf_event_attr * attr,u64 id)2123 static int intel_pt_synth_event(struct perf_session *session, const char *name,
2124 				struct perf_event_attr *attr, u64 id)
2125 {
2126 	struct intel_pt_synth intel_pt_synth;
2127 	int err;
2128 
2129 	pr_debug("Synthesizing '%s' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
2130 		 name, id, (u64)attr->sample_type);
2131 
2132 	memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
2133 	intel_pt_synth.session = session;
2134 
2135 	err = perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
2136 					  &id, intel_pt_event_synth);
2137 	if (err)
2138 		pr_err("%s: failed to synthesize '%s' event type\n",
2139 		       __func__, name);
2140 
2141 	return err;
2142 }
2143 
intel_pt_set_event_name(struct perf_evlist * evlist,u64 id,const char * name)2144 static void intel_pt_set_event_name(struct perf_evlist *evlist, u64 id,
2145 				    const char *name)
2146 {
2147 	struct perf_evsel *evsel;
2148 
2149 	evlist__for_each_entry(evlist, evsel) {
2150 		if (evsel->id && evsel->id[0] == id) {
2151 			if (evsel->name)
2152 				zfree(&evsel->name);
2153 			evsel->name = strdup(name);
2154 			break;
2155 		}
2156 	}
2157 }
2158 
intel_pt_evsel(struct intel_pt * pt,struct perf_evlist * evlist)2159 static struct perf_evsel *intel_pt_evsel(struct intel_pt *pt,
2160 					 struct perf_evlist *evlist)
2161 {
2162 	struct perf_evsel *evsel;
2163 
2164 	evlist__for_each_entry(evlist, evsel) {
2165 		if (evsel->attr.type == pt->pmu_type && evsel->ids)
2166 			return evsel;
2167 	}
2168 
2169 	return NULL;
2170 }
2171 
intel_pt_synth_events(struct intel_pt * pt,struct perf_session * session)2172 static int intel_pt_synth_events(struct intel_pt *pt,
2173 				 struct perf_session *session)
2174 {
2175 	struct perf_evlist *evlist = session->evlist;
2176 	struct perf_evsel *evsel = intel_pt_evsel(pt, evlist);
2177 	struct perf_event_attr attr;
2178 	u64 id;
2179 	int err;
2180 
2181 	if (!evsel) {
2182 		pr_debug("There are no selected events with Intel Processor Trace data\n");
2183 		return 0;
2184 	}
2185 
2186 	memset(&attr, 0, sizeof(struct perf_event_attr));
2187 	attr.size = sizeof(struct perf_event_attr);
2188 	attr.type = PERF_TYPE_HARDWARE;
2189 	attr.sample_type = evsel->attr.sample_type & PERF_SAMPLE_MASK;
2190 	attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
2191 			    PERF_SAMPLE_PERIOD;
2192 	if (pt->timeless_decoding)
2193 		attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
2194 	else
2195 		attr.sample_type |= PERF_SAMPLE_TIME;
2196 	if (!pt->per_cpu_mmaps)
2197 		attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
2198 	attr.exclude_user = evsel->attr.exclude_user;
2199 	attr.exclude_kernel = evsel->attr.exclude_kernel;
2200 	attr.exclude_hv = evsel->attr.exclude_hv;
2201 	attr.exclude_host = evsel->attr.exclude_host;
2202 	attr.exclude_guest = evsel->attr.exclude_guest;
2203 	attr.sample_id_all = evsel->attr.sample_id_all;
2204 	attr.read_format = evsel->attr.read_format;
2205 
2206 	id = evsel->id[0] + 1000000000;
2207 	if (!id)
2208 		id = 1;
2209 
2210 	if (pt->synth_opts.branches) {
2211 		attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
2212 		attr.sample_period = 1;
2213 		attr.sample_type |= PERF_SAMPLE_ADDR;
2214 		err = intel_pt_synth_event(session, "branches", &attr, id);
2215 		if (err)
2216 			return err;
2217 		pt->sample_branches = true;
2218 		pt->branches_sample_type = attr.sample_type;
2219 		pt->branches_id = id;
2220 		id += 1;
2221 		attr.sample_type &= ~(u64)PERF_SAMPLE_ADDR;
2222 	}
2223 
2224 	if (pt->synth_opts.callchain)
2225 		attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
2226 	if (pt->synth_opts.last_branch)
2227 		attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
2228 
2229 	if (pt->synth_opts.instructions) {
2230 		attr.config = PERF_COUNT_HW_INSTRUCTIONS;
2231 		if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
2232 			attr.sample_period =
2233 				intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
2234 		else
2235 			attr.sample_period = pt->synth_opts.period;
2236 		err = intel_pt_synth_event(session, "instructions", &attr, id);
2237 		if (err)
2238 			return err;
2239 		pt->sample_instructions = true;
2240 		pt->instructions_sample_type = attr.sample_type;
2241 		pt->instructions_id = id;
2242 		id += 1;
2243 	}
2244 
2245 	attr.sample_type &= ~(u64)PERF_SAMPLE_PERIOD;
2246 	attr.sample_period = 1;
2247 
2248 	if (pt->synth_opts.transactions) {
2249 		attr.config = PERF_COUNT_HW_INSTRUCTIONS;
2250 		err = intel_pt_synth_event(session, "transactions", &attr, id);
2251 		if (err)
2252 			return err;
2253 		pt->sample_transactions = true;
2254 		pt->transactions_sample_type = attr.sample_type;
2255 		pt->transactions_id = id;
2256 		intel_pt_set_event_name(evlist, id, "transactions");
2257 		id += 1;
2258 	}
2259 
2260 	attr.type = PERF_TYPE_SYNTH;
2261 	attr.sample_type |= PERF_SAMPLE_RAW;
2262 
2263 	if (pt->synth_opts.ptwrites) {
2264 		attr.config = PERF_SYNTH_INTEL_PTWRITE;
2265 		err = intel_pt_synth_event(session, "ptwrite", &attr, id);
2266 		if (err)
2267 			return err;
2268 		pt->sample_ptwrites = true;
2269 		pt->ptwrites_sample_type = attr.sample_type;
2270 		pt->ptwrites_id = id;
2271 		intel_pt_set_event_name(evlist, id, "ptwrite");
2272 		id += 1;
2273 	}
2274 
2275 	if (pt->synth_opts.pwr_events) {
2276 		pt->sample_pwr_events = true;
2277 		pt->pwr_events_sample_type = attr.sample_type;
2278 
2279 		attr.config = PERF_SYNTH_INTEL_CBR;
2280 		err = intel_pt_synth_event(session, "cbr", &attr, id);
2281 		if (err)
2282 			return err;
2283 		pt->cbr_id = id;
2284 		intel_pt_set_event_name(evlist, id, "cbr");
2285 		id += 1;
2286 	}
2287 
2288 	if (pt->synth_opts.pwr_events && (evsel->attr.config & 0x10)) {
2289 		attr.config = PERF_SYNTH_INTEL_MWAIT;
2290 		err = intel_pt_synth_event(session, "mwait", &attr, id);
2291 		if (err)
2292 			return err;
2293 		pt->mwait_id = id;
2294 		intel_pt_set_event_name(evlist, id, "mwait");
2295 		id += 1;
2296 
2297 		attr.config = PERF_SYNTH_INTEL_PWRE;
2298 		err = intel_pt_synth_event(session, "pwre", &attr, id);
2299 		if (err)
2300 			return err;
2301 		pt->pwre_id = id;
2302 		intel_pt_set_event_name(evlist, id, "pwre");
2303 		id += 1;
2304 
2305 		attr.config = PERF_SYNTH_INTEL_EXSTOP;
2306 		err = intel_pt_synth_event(session, "exstop", &attr, id);
2307 		if (err)
2308 			return err;
2309 		pt->exstop_id = id;
2310 		intel_pt_set_event_name(evlist, id, "exstop");
2311 		id += 1;
2312 
2313 		attr.config = PERF_SYNTH_INTEL_PWRX;
2314 		err = intel_pt_synth_event(session, "pwrx", &attr, id);
2315 		if (err)
2316 			return err;
2317 		pt->pwrx_id = id;
2318 		intel_pt_set_event_name(evlist, id, "pwrx");
2319 		id += 1;
2320 	}
2321 
2322 	return 0;
2323 }
2324 
intel_pt_find_sched_switch(struct perf_evlist * evlist)2325 static struct perf_evsel *intel_pt_find_sched_switch(struct perf_evlist *evlist)
2326 {
2327 	struct perf_evsel *evsel;
2328 
2329 	evlist__for_each_entry_reverse(evlist, evsel) {
2330 		const char *name = perf_evsel__name(evsel);
2331 
2332 		if (!strcmp(name, "sched:sched_switch"))
2333 			return evsel;
2334 	}
2335 
2336 	return NULL;
2337 }
2338 
intel_pt_find_switch(struct perf_evlist * evlist)2339 static bool intel_pt_find_switch(struct perf_evlist *evlist)
2340 {
2341 	struct perf_evsel *evsel;
2342 
2343 	evlist__for_each_entry(evlist, evsel) {
2344 		if (evsel->attr.context_switch)
2345 			return true;
2346 	}
2347 
2348 	return false;
2349 }
2350 
intel_pt_perf_config(const char * var,const char * value,void * data)2351 static int intel_pt_perf_config(const char *var, const char *value, void *data)
2352 {
2353 	struct intel_pt *pt = data;
2354 
2355 	if (!strcmp(var, "intel-pt.mispred-all"))
2356 		pt->mispred_all = perf_config_bool(var, value);
2357 
2358 	return 0;
2359 }
2360 
2361 static const char * const intel_pt_info_fmts[] = {
2362 	[INTEL_PT_PMU_TYPE]		= "  PMU Type            %"PRId64"\n",
2363 	[INTEL_PT_TIME_SHIFT]		= "  Time Shift          %"PRIu64"\n",
2364 	[INTEL_PT_TIME_MULT]		= "  Time Muliplier      %"PRIu64"\n",
2365 	[INTEL_PT_TIME_ZERO]		= "  Time Zero           %"PRIu64"\n",
2366 	[INTEL_PT_CAP_USER_TIME_ZERO]	= "  Cap Time Zero       %"PRId64"\n",
2367 	[INTEL_PT_TSC_BIT]		= "  TSC bit             %#"PRIx64"\n",
2368 	[INTEL_PT_NORETCOMP_BIT]	= "  NoRETComp bit       %#"PRIx64"\n",
2369 	[INTEL_PT_HAVE_SCHED_SWITCH]	= "  Have sched_switch   %"PRId64"\n",
2370 	[INTEL_PT_SNAPSHOT_MODE]	= "  Snapshot mode       %"PRId64"\n",
2371 	[INTEL_PT_PER_CPU_MMAPS]	= "  Per-cpu maps        %"PRId64"\n",
2372 	[INTEL_PT_MTC_BIT]		= "  MTC bit             %#"PRIx64"\n",
2373 	[INTEL_PT_TSC_CTC_N]		= "  TSC:CTC numerator   %"PRIu64"\n",
2374 	[INTEL_PT_TSC_CTC_D]		= "  TSC:CTC denominator %"PRIu64"\n",
2375 	[INTEL_PT_CYC_BIT]		= "  CYC bit             %#"PRIx64"\n",
2376 	[INTEL_PT_MAX_NONTURBO_RATIO]	= "  Max non-turbo ratio %"PRIu64"\n",
2377 	[INTEL_PT_FILTER_STR_LEN]	= "  Filter string len.  %"PRIu64"\n",
2378 };
2379 
intel_pt_print_info(u64 * arr,int start,int finish)2380 static void intel_pt_print_info(u64 *arr, int start, int finish)
2381 {
2382 	int i;
2383 
2384 	if (!dump_trace)
2385 		return;
2386 
2387 	for (i = start; i <= finish; i++)
2388 		fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
2389 }
2390 
intel_pt_print_info_str(const char * name,const char * str)2391 static void intel_pt_print_info_str(const char *name, const char *str)
2392 {
2393 	if (!dump_trace)
2394 		return;
2395 
2396 	fprintf(stdout, "  %-20s%s\n", name, str ? str : "");
2397 }
2398 
intel_pt_has(struct auxtrace_info_event * auxtrace_info,int pos)2399 static bool intel_pt_has(struct auxtrace_info_event *auxtrace_info, int pos)
2400 {
2401 	return auxtrace_info->header.size >=
2402 		sizeof(struct auxtrace_info_event) + (sizeof(u64) * (pos + 1));
2403 }
2404 
intel_pt_process_auxtrace_info(union perf_event * event,struct perf_session * session)2405 int intel_pt_process_auxtrace_info(union perf_event *event,
2406 				   struct perf_session *session)
2407 {
2408 	struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
2409 	size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
2410 	struct intel_pt *pt;
2411 	void *info_end;
2412 	u64 *info;
2413 	int err;
2414 
2415 	if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event) +
2416 					min_sz)
2417 		return -EINVAL;
2418 
2419 	pt = zalloc(sizeof(struct intel_pt));
2420 	if (!pt)
2421 		return -ENOMEM;
2422 
2423 	addr_filters__init(&pt->filts);
2424 
2425 	err = perf_config(intel_pt_perf_config, pt);
2426 	if (err)
2427 		goto err_free;
2428 
2429 	err = auxtrace_queues__init(&pt->queues);
2430 	if (err)
2431 		goto err_free;
2432 
2433 	intel_pt_log_set_name(INTEL_PT_PMU_NAME);
2434 
2435 	pt->session = session;
2436 	pt->machine = &session->machines.host; /* No kvm support */
2437 	pt->auxtrace_type = auxtrace_info->type;
2438 	pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
2439 	pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
2440 	pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
2441 	pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
2442 	pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
2443 	pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
2444 	pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
2445 	pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
2446 	pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
2447 	pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
2448 	intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
2449 			    INTEL_PT_PER_CPU_MMAPS);
2450 
2451 	if (intel_pt_has(auxtrace_info, INTEL_PT_CYC_BIT)) {
2452 		pt->mtc_bit = auxtrace_info->priv[INTEL_PT_MTC_BIT];
2453 		pt->mtc_freq_bits = auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS];
2454 		pt->tsc_ctc_ratio_n = auxtrace_info->priv[INTEL_PT_TSC_CTC_N];
2455 		pt->tsc_ctc_ratio_d = auxtrace_info->priv[INTEL_PT_TSC_CTC_D];
2456 		pt->cyc_bit = auxtrace_info->priv[INTEL_PT_CYC_BIT];
2457 		intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_MTC_BIT,
2458 				    INTEL_PT_CYC_BIT);
2459 	}
2460 
2461 	if (intel_pt_has(auxtrace_info, INTEL_PT_MAX_NONTURBO_RATIO)) {
2462 		pt->max_non_turbo_ratio =
2463 			auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO];
2464 		intel_pt_print_info(&auxtrace_info->priv[0],
2465 				    INTEL_PT_MAX_NONTURBO_RATIO,
2466 				    INTEL_PT_MAX_NONTURBO_RATIO);
2467 	}
2468 
2469 	info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
2470 	info_end = (void *)info + auxtrace_info->header.size;
2471 
2472 	if (intel_pt_has(auxtrace_info, INTEL_PT_FILTER_STR_LEN)) {
2473 		size_t len;
2474 
2475 		len = auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN];
2476 		intel_pt_print_info(&auxtrace_info->priv[0],
2477 				    INTEL_PT_FILTER_STR_LEN,
2478 				    INTEL_PT_FILTER_STR_LEN);
2479 		if (len) {
2480 			const char *filter = (const char *)info;
2481 
2482 			len = roundup(len + 1, 8);
2483 			info += len >> 3;
2484 			if ((void *)info > info_end) {
2485 				pr_err("%s: bad filter string length\n", __func__);
2486 				err = -EINVAL;
2487 				goto err_free_queues;
2488 			}
2489 			pt->filter = memdup(filter, len);
2490 			if (!pt->filter) {
2491 				err = -ENOMEM;
2492 				goto err_free_queues;
2493 			}
2494 			if (session->header.needs_swap)
2495 				mem_bswap_64(pt->filter, len);
2496 			if (pt->filter[len - 1]) {
2497 				pr_err("%s: filter string not null terminated\n", __func__);
2498 				err = -EINVAL;
2499 				goto err_free_queues;
2500 			}
2501 			err = addr_filters__parse_bare_filter(&pt->filts,
2502 							      filter);
2503 			if (err)
2504 				goto err_free_queues;
2505 		}
2506 		intel_pt_print_info_str("Filter string", pt->filter);
2507 	}
2508 
2509 	pt->timeless_decoding = intel_pt_timeless_decoding(pt);
2510 	if (pt->timeless_decoding && !pt->tc.time_mult)
2511 		pt->tc.time_mult = 1;
2512 	pt->have_tsc = intel_pt_have_tsc(pt);
2513 	pt->sampling_mode = false;
2514 	pt->est_tsc = !pt->timeless_decoding;
2515 
2516 	pt->unknown_thread = thread__new(999999999, 999999999);
2517 	if (!pt->unknown_thread) {
2518 		err = -ENOMEM;
2519 		goto err_free_queues;
2520 	}
2521 
2522 	/*
2523 	 * Since this thread will not be kept in any rbtree not in a
2524 	 * list, initialize its list node so that at thread__put() the
2525 	 * current thread lifetime assuption is kept and we don't segfault
2526 	 * at list_del_init().
2527 	 */
2528 	INIT_LIST_HEAD(&pt->unknown_thread->node);
2529 
2530 	err = thread__set_comm(pt->unknown_thread, "unknown", 0);
2531 	if (err)
2532 		goto err_delete_thread;
2533 	if (thread__init_map_groups(pt->unknown_thread, pt->machine)) {
2534 		err = -ENOMEM;
2535 		goto err_delete_thread;
2536 	}
2537 
2538 	pt->auxtrace.process_event = intel_pt_process_event;
2539 	pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
2540 	pt->auxtrace.flush_events = intel_pt_flush;
2541 	pt->auxtrace.free_events = intel_pt_free_events;
2542 	pt->auxtrace.free = intel_pt_free;
2543 	session->auxtrace = &pt->auxtrace;
2544 
2545 	if (dump_trace)
2546 		return 0;
2547 
2548 	if (pt->have_sched_switch == 1) {
2549 		pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
2550 		if (!pt->switch_evsel) {
2551 			pr_err("%s: missing sched_switch event\n", __func__);
2552 			err = -EINVAL;
2553 			goto err_delete_thread;
2554 		}
2555 	} else if (pt->have_sched_switch == 2 &&
2556 		   !intel_pt_find_switch(session->evlist)) {
2557 		pr_err("%s: missing context_switch attribute flag\n", __func__);
2558 		err = -EINVAL;
2559 		goto err_delete_thread;
2560 	}
2561 
2562 	if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
2563 		pt->synth_opts = *session->itrace_synth_opts;
2564 	} else {
2565 		itrace_synth_opts__set_default(&pt->synth_opts);
2566 		if (use_browser != -1) {
2567 			pt->synth_opts.branches = false;
2568 			pt->synth_opts.callchain = true;
2569 		}
2570 		if (session->itrace_synth_opts)
2571 			pt->synth_opts.thread_stack =
2572 				session->itrace_synth_opts->thread_stack;
2573 	}
2574 
2575 	if (pt->synth_opts.log)
2576 		intel_pt_log_enable();
2577 
2578 	/* Maximum non-turbo ratio is TSC freq / 100 MHz */
2579 	if (pt->tc.time_mult) {
2580 		u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
2581 
2582 		if (!pt->max_non_turbo_ratio)
2583 			pt->max_non_turbo_ratio =
2584 					(tsc_freq + 50000000) / 100000000;
2585 		intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
2586 		intel_pt_log("Maximum non-turbo ratio %u\n",
2587 			     pt->max_non_turbo_ratio);
2588 		pt->cbr2khz = tsc_freq / pt->max_non_turbo_ratio / 1000;
2589 	}
2590 
2591 	if (pt->synth_opts.calls)
2592 		pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
2593 				       PERF_IP_FLAG_TRACE_END;
2594 	if (pt->synth_opts.returns)
2595 		pt->branches_filter |= PERF_IP_FLAG_RETURN |
2596 				       PERF_IP_FLAG_TRACE_BEGIN;
2597 
2598 	if (pt->synth_opts.callchain && !symbol_conf.use_callchain) {
2599 		symbol_conf.use_callchain = true;
2600 		if (callchain_register_param(&callchain_param) < 0) {
2601 			symbol_conf.use_callchain = false;
2602 			pt->synth_opts.callchain = false;
2603 		}
2604 	}
2605 
2606 	err = intel_pt_synth_events(pt, session);
2607 	if (err)
2608 		goto err_delete_thread;
2609 
2610 	err = auxtrace_queues__process_index(&pt->queues, session);
2611 	if (err)
2612 		goto err_delete_thread;
2613 
2614 	if (pt->queues.populated)
2615 		pt->data_queued = true;
2616 
2617 	if (pt->timeless_decoding)
2618 		pr_debug2("Intel PT decoding without timestamps\n");
2619 
2620 	return 0;
2621 
2622 err_delete_thread:
2623 	thread__zput(pt->unknown_thread);
2624 err_free_queues:
2625 	intel_pt_log_disable();
2626 	auxtrace_queues__free(&pt->queues);
2627 	session->auxtrace = NULL;
2628 err_free:
2629 	addr_filters__exit(&pt->filts);
2630 	zfree(&pt->filter);
2631 	free(pt);
2632 	return err;
2633 }
2634