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5 …en.wikipedia.org/wiki/Logic_gate) are nodes, wires are directed edges. For every gate, inputs are …
9 …are named **state gates** (since they acted like a [finite state machine](https://en.wikipedia.org…
11 …are named **computation gates**. A computation gate can do simple things such as adding two intege…
13 …are [linearly ordered](https://en.wikipedia.org/wiki/Total_order). However, in Circuit IR, computa…
17 …are **[selector](https://en.wikipedia.org/wiki/Multiplexer) gates** such as `VALUE_SELECTOR` and `…
19 …lem, **[relay](https://en.wikipedia.org/wiki/Relay) gates** `DEPEND_RELAY` are introduced. They ta…
23 …are several nodes named **root nodes** in Circuit IR. They are not called "gates" since they do no…
33 …IST`: Registering all value origins such as constants and arguments. (they are special computation…
35 The offsets of root nodes are fixed, so they can be accessed instantly via `GateRef Circuit::GetRoo…
41 There are two levels of types of values in Circuit IR:
43 …are **low level** (closer to target architectures) and **fundamental** for Circuit IR, and are det…
45 * Secondary types: This level of types are **high level** (closer to languages) and **optional**. T…
47 Validation rules of primary type are already builtin for Circuit IR. Validation rules of secondary …
55 * The 30th and 29th bits are used to indicate whether the output values of the MIR gates are GC rel…
61 * In the case of MIR type, the 1st bit in GateType is used to indicate whether there are output val…
65 Primary types are all set during construction of Circuit IR, so no furthermore type inference is re…
69 …are three levels of instructions in Circuit IR: high-level instructions (HIR), middle-level instru…
72 * MIR instructions are language-independent and target-independent, which are similar to LLVM IR, b…
73 * LIR instructions are target-related, which usually correspond to the machine instructions of targ…
233 Intermediate gates are gates that connect sequential logic and combinational logic parts (relays an…
378 …ting the kind of comparison to perform is stored in the bitfield. The possible condition codes are:
379 …* `0001` `EQ`: yields true if the operands are equal, false otherwise. No sign interpretation is n…
384 …* `0110` `NE`: yields true if the operands are unequal, false otherwise. No sign interpretation is…
403 …ting the kind of comparison to perform is stored in the bitfield. The possible condition codes are:
522 Currently, LIR instructions are not implemented. They will be added later for JIT compilation.