2  * linux/arch/arm/mach-omap1/pm.c
57 #include <linux/omap-dma.h>
58 #include <clocksource/timer-ti-dm.h>
91 		return -EINVAL;  in idle_store()
163 	 * Turn off all interrupts except GPIO bank 1, L1-2nd level cascade,  in omap_pm_wakeup_setup()
166 	 * wake up to a GPIO interrupt.  in omap_pm_wakeup_setup()
192 		/* INT_1610_WAKE_UP_REQ is needed for GPIO wakeup... */  in omap_pm_wakeup_setup()
281 	/* (Step 3 removed - we now allow deep sleep by default) */  in omap1_pm_suspend()
284 	 * Step 4: OMAP DSP Shutdown  in omap1_pm_suspend()
287 	/* stop DSP */  in omap1_pm_suspend()
294 	/* temporarily enabling api_ck to access DSP registers */  in omap1_pm_suspend()
297 	/* save DSP registers */  in omap1_pm_suspend()
300 	/* Stop all DSP domain clocks */  in omap1_pm_suspend()
345 	 * Restore DSP clocks  in omap1_pm_suspend()
348 	/* again temporarily enabling api_ck to access DSP registers */  in omap1_pm_suspend()
351 	/* Restore DSP domain clocks */  in omap1_pm_suspend()
400 	 * Re-enable interrupts  in omap1_pm_suspend()
408 	printk(KERN_INFO "PM: OMAP%x is re-starting from deep sleep...\n",  in omap1_pm_suspend()
459 		   "ARM_CKCTL_REG:            0x%-8x     \n"  in omap_pm_debug_show()
460 		   "ARM_IDLECT1_REG:          0x%-8x     \n"  in omap_pm_debug_show()
461 		   "ARM_IDLECT2_REG:          0x%-8x     \n"  in omap_pm_debug_show()
462 		   "ARM_IDLECT3_REG:	      0x%-8x     \n"  in omap_pm_debug_show()
463 		   "ARM_EWUPCT_REG:           0x%-8x     \n"  in omap_pm_debug_show()
464 		   "ARM_RSTCT1_REG:           0x%-8x     \n"  in omap_pm_debug_show()
465 		   "ARM_RSTCT2_REG:           0x%-8x     \n"  in omap_pm_debug_show()
466 		   "ARM_SYSST_REG:            0x%-8x     \n"  in omap_pm_debug_show()
467 		   "ULPD_IT_STATUS_REG:       0x%-4x     \n"  in omap_pm_debug_show()
468 		   "ULPD_CLOCK_CTRL_REG:      0x%-4x     \n"  in omap_pm_debug_show()
469 		   "ULPD_SOFT_REQ_REG:        0x%-4x     \n"  in omap_pm_debug_show()
470 		   "ULPD_DPLL_CTRL_REG:       0x%-4x     \n"  in omap_pm_debug_show()
471 		   "ULPD_STATUS_REQ_REG:      0x%-4x     \n"  in omap_pm_debug_show()
472 		   "ULPD_POWER_CTRL_REG:      0x%-4x     \n",  in omap_pm_debug_show()
490 			   "MPUI7XX_CTRL_REG	     0x%-8x \n"  in omap_pm_debug_show()
491 			   "MPUI7XX_DSP_STATUS_REG:      0x%-8x \n"  in omap_pm_debug_show()
492 			   "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n"  in omap_pm_debug_show()
493 			   "MPUI7XX_DSP_API_CONFIG_REG:  0x%-8x \n"  in omap_pm_debug_show()
494 			   "MPUI7XX_SDRAM_CONFIG_REG:    0x%-8x \n"  in omap_pm_debug_show()
495 			   "MPUI7XX_EMIFS_CONFIG_REG:    0x%-8x \n",  in omap_pm_debug_show()
504 			   "MPUI1510_CTRL_REG             0x%-8x \n"  in omap_pm_debug_show()
505 			   "MPUI1510_DSP_STATUS_REG:      0x%-8x \n"  in omap_pm_debug_show()
506 			   "MPUI1510_DSP_BOOT_CONFIG_REG: 0x%-8x \n"  in omap_pm_debug_show()
507 			   "MPUI1510_DSP_API_CONFIG_REG:  0x%-8x \n"  in omap_pm_debug_show()
508 			   "MPUI1510_SDRAM_CONFIG_REG:    0x%-8x \n"  in omap_pm_debug_show()
509 			   "MPUI1510_EMIFS_CONFIG_REG:    0x%-8x \n",  in omap_pm_debug_show()
518 			   "MPUI1610_CTRL_REG             0x%-8x \n"  in omap_pm_debug_show()
519 			   "MPUI1610_DSP_STATUS_REG:      0x%-8x \n"  in omap_pm_debug_show()
520 			   "MPUI1610_DSP_BOOT_CONFIG_REG: 0x%-8x \n"  in omap_pm_debug_show()
521 			   "MPUI1610_DSP_API_CONFIG_REG:  0x%-8x \n"  in omap_pm_debug_show()
522 			   "MPUI1610_SDRAM_CONFIG_REG:    0x%-8x \n"  in omap_pm_debug_show()
523 			   "MPUI1610_EMIFS_CONFIG_REG:    0x%-8x \n",  in omap_pm_debug_show()
549  *	omap_pm_prepare - Do preliminary suspend work.
561  *	omap_pm_enter - Actually enter a sleep state.
574 		return -EINVAL;  in omap_pm_enter()
582  *	omap_pm_finish - Finish up suspend sequence.
614 		return -ENODEV;  in omap_pm_init()
649 		return -ENODEV;  in omap_pm_init()
659 		irq = -1;  in omap_pm_init()
666 	/* Program new power ramp-up time  in omap_pm_init()
671 	/* Setup ULPD POWER_CTRL_REG - enter deep sleep whenever possible */  in omap_pm_init()