Lines Matching +full:switch +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012,2013 - ARM Ltd
7 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
98 * Return a pointer to the register number valid in the current mode of
103 unsigned long *reg_array = (unsigned long *)&vcpu->arch.ctxt.regs; in vcpu_reg32()
104 unsigned long mode = *vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK; in vcpu_reg32() local
106 switch (mode) { in vcpu_reg32()
108 mode &= ~PSR_MODE32_BIT; /* 0 ... 3 */ in vcpu_reg32()
112 mode = 4; in vcpu_reg32()
116 mode = 5; in vcpu_reg32()
120 mode = 0; /* SYS maps to USR */ in vcpu_reg32()
127 return reg_array + vcpu_reg_offsets[mode][reg_num]; in vcpu_reg32()
131 * Return the SPSR for the current mode of the virtual CPU.
135 unsigned long mode = *vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK; in vcpu_spsr32_mode() local
136 switch (mode) { in vcpu_spsr32_mode()
150 if (!vcpu->arch.sysregs_loaded_on_cpu) { in vcpu_read_spsr32()
151 switch (spsr_idx) { in vcpu_read_spsr32()
155 return vcpu->arch.ctxt.spsr_abt; in vcpu_read_spsr32()
157 return vcpu->arch.ctxt.spsr_und; in vcpu_read_spsr32()
159 return vcpu->arch.ctxt.spsr_irq; in vcpu_read_spsr32()
161 return vcpu->arch.ctxt.spsr_fiq; in vcpu_read_spsr32()
165 switch (spsr_idx) { in vcpu_read_spsr32()
185 if (!vcpu->arch.sysregs_loaded_on_cpu) { in vcpu_write_spsr32()
186 switch (spsr_idx) { in vcpu_write_spsr32()
191 vcpu->arch.ctxt.spsr_abt = v; in vcpu_write_spsr32()
194 vcpu->arch.ctxt.spsr_und = v; in vcpu_write_spsr32()
197 vcpu->arch.ctxt.spsr_irq = v; in vcpu_write_spsr32()
200 vcpu->arch.ctxt.spsr_fiq = v; in vcpu_write_spsr32()
207 switch (spsr_idx) { in vcpu_write_spsr32()