Lines Matching +full:0 +full:- +full:128
1 // SPDX-License-Identifier: GPL-2.0-or-later
141 .pvr_mask = 0xffff0000,
142 .pvr_value = 0x00390000,
148 .icache_bsize = 128,
149 .dcache_bsize = 128,
159 .pvr_mask = 0xffff0000,
160 .pvr_value = 0x003c0000,
166 .icache_bsize = 128,
167 .dcache_bsize = 128,
176 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
177 .pvr_mask = 0xffffffff,
178 .pvr_value = 0x00440100,
184 .icache_bsize = 128,
185 .dcache_bsize = 128,
195 .pvr_mask = 0xffff0000,
196 .pvr_value = 0x00440000,
202 .icache_bsize = 128,
203 .dcache_bsize = 128,
213 .pvr_mask = 0xffff0000,
214 .pvr_value = 0x00450000,
220 .icache_bsize = 128,
221 .dcache_bsize = 128,
230 .pvr_mask = 0xffff0000,
231 .pvr_value = 0x003a0000,
236 .icache_bsize = 128,
237 .dcache_bsize = 128,
250 .pvr_mask = 0xffffff00,
251 .pvr_value = 0x003b0300,
256 .icache_bsize = 128,
257 .dcache_bsize = 128,
266 .pvr_mask = 0xffff0000,
267 .pvr_value = 0x003b0000,
272 .icache_bsize = 128,
273 .dcache_bsize = 128,
282 { /* POWER6 in P5+ mode; 2.04-compliant processor */
283 .pvr_mask = 0xffffffff,
284 .pvr_value = 0x0f000001,
289 .icache_bsize = 128,
290 .dcache_bsize = 128,
291 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
296 .pvr_mask = 0xffff0000,
297 .pvr_value = 0x003e0000,
303 .icache_bsize = 128,
304 .dcache_bsize = 128,
315 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
316 .pvr_mask = 0xffffffff,
317 .pvr_value = 0x0f000002,
322 .icache_bsize = 128,
323 .dcache_bsize = 128,
324 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
328 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
329 .pvr_mask = 0xffffffff,
330 .pvr_value = 0x0f000003,
336 .icache_bsize = 128,
337 .dcache_bsize = 128,
339 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
345 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
346 .pvr_mask = 0xffffffff,
347 .pvr_value = 0x0f000004,
353 .icache_bsize = 128,
354 .dcache_bsize = 128,
356 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
362 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */
363 .pvr_mask = 0xffffffff,
364 .pvr_value = 0x0f000005,
370 .icache_bsize = 128,
371 .dcache_bsize = 128,
373 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
378 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */
379 .pvr_mask = 0xffffffff,
380 .pvr_value = 0x0f000006,
386 .icache_bsize = 128,
387 .dcache_bsize = 128,
389 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
395 .pvr_mask = 0xffff0000,
396 .pvr_value = 0x003f0000,
402 .icache_bsize = 128,
403 .dcache_bsize = 128,
414 .pvr_mask = 0xffff0000,
415 .pvr_value = 0x004A0000,
421 .icache_bsize = 128,
422 .dcache_bsize = 128,
433 .pvr_mask = 0xffff0000,
434 .pvr_value = 0x004b0000,
440 .icache_bsize = 128,
441 .dcache_bsize = 128,
452 .pvr_mask = 0xffff0000,
453 .pvr_value = 0x004c0000,
459 .icache_bsize = 128,
460 .dcache_bsize = 128,
471 .pvr_mask = 0xffff0000,
472 .pvr_value = 0x004d0000,
478 .icache_bsize = 128,
479 .dcache_bsize = 128,
489 { /* Power9 DD2.0 */
490 .pvr_mask = 0xffffefff,
491 .pvr_value = 0x004e0200,
497 .icache_bsize = 128,
498 .dcache_bsize = 128,
509 .pvr_mask = 0xffffefff,
510 .pvr_value = 0x004e0201,
516 .icache_bsize = 128,
517 .dcache_bsize = 128,
528 .pvr_mask = 0xffff0000,
529 .pvr_value = 0x004e0000,
535 .icache_bsize = 128,
536 .dcache_bsize = 128,
547 .pvr_mask = 0xffff0000,
548 .pvr_value = 0x00800000,
554 .icache_bsize = 128,
555 .dcache_bsize = 128,
566 .pvr_mask = 0xffff0000,
567 .pvr_value = 0x00700000,
574 .icache_bsize = 128,
575 .dcache_bsize = 128,
578 .oprofile_cpu_type = "ppc64/cell-be",
580 .platform = "ppc-cell-be",
583 .pvr_mask = 0x7fff0000,
584 .pvr_value = 0x00900000,
600 .pvr_mask = 0x00000000,
601 .pvr_value = 0x00000000,
606 .icache_bsize = 128,
607 .dcache_bsize = 128,
617 .pvr_mask = 0xffff0000,
618 .pvr_value = 0x00030000,
622 .mmu_features = 0,
630 .pvr_mask = 0xffff0000,
631 .pvr_value = 0x00060000,
635 .mmu_features = 0,
643 .pvr_mask = 0xffff0000,
644 .pvr_value = 0x00070000,
648 .mmu_features = 0,
656 .pvr_mask = 0xffff0000,
657 .pvr_value = 0x00040000,
670 .pvr_mask = 0xfffff000,
671 .pvr_value = 0x00090000,
684 .pvr_mask = 0xffff0000,
685 .pvr_value = 0x00090000,
698 .pvr_mask = 0xffff0000,
699 .pvr_value = 0x000a0000,
711 { /* 740/750 (0x4202, don't support TAU ?) */
712 .pvr_mask = 0xffffffff,
713 .pvr_value = 0x00084202,
726 .pvr_mask = 0xfffffff0,
727 .pvr_value = 0x00080100,
740 .pvr_mask = 0xfffffff0,
741 .pvr_value = 0x00082200,
755 .pvr_mask = 0xfffffff0,
756 .pvr_value = 0x00082210,
770 .pvr_mask = 0xffffffff,
771 .pvr_value = 0x00083214,
785 .pvr_mask = 0xfffff0e0,
786 .pvr_value = 0x00087000,
802 .pvr_mask = 0xfffff000,
803 .pvr_value = 0x00083000,
817 .pvr_mask = 0xffffff00,
818 .pvr_value = 0x70000100,
834 .pvr_mask = 0xffffffff,
835 .pvr_value = 0x70000200,
851 .pvr_mask = 0xffff0000,
852 .pvr_value = 0x70000000,
868 .pvr_mask = 0xffff0000,
869 .pvr_value = 0x70020000,
885 .pvr_mask = 0xffff0000,
886 .pvr_value = 0x00080000,
900 .pvr_mask = 0xffffffff,
901 .pvr_value = 0x000c1101,
916 .pvr_mask = 0xffff0000,
917 .pvr_value = 0x000c0000,
932 .pvr_mask = 0xffff0000,
933 .pvr_value = 0x800c0000,
947 { /* 7450 2.0 - no doze/nap */
948 .pvr_mask = 0xffffffff,
949 .pvr_value = 0x80000200,
966 .pvr_mask = 0xffffffff,
967 .pvr_value = 0x80000201,
984 .pvr_mask = 0xffff0000,
985 .pvr_value = 0x80000000,
1002 .pvr_mask = 0xffffff00,
1003 .pvr_value = 0x80010100,
1020 .pvr_mask = 0xffffffff,
1021 .pvr_value = 0x80010200,
1038 .pvr_mask = 0xffff0000,
1039 .pvr_value = 0x80010000,
1056 .pvr_mask = 0xffffffff,
1057 .pvr_value = 0x80020100,
1074 .pvr_mask = 0xffffffff,
1075 .pvr_value = 0x80020101,
1092 .pvr_mask = 0xffff0000,
1093 .pvr_value = 0x80020000,
1109 .pvr_mask = 0xffff0000,
1110 .pvr_value = 0x80030000,
1127 .pvr_mask = 0xffff0000,
1128 .pvr_value = 0x80040000,
1145 .pvr_mask = 0x7fff0000,
1146 .pvr_value = 0x00810000,
1150 .mmu_features = 0,
1158 .pvr_mask = 0x7fff0000,
1159 .pvr_value = 0x00820000,
1172 .pvr_mask = 0x7fff0000,
1173 .pvr_value = 0x00830000,
1185 .pvr_mask = 0x7fff0000,
1186 .pvr_value = 0x00840000,
1199 .pvr_mask = 0x7fff0000,
1200 .pvr_value = 0x00850000,
1216 .pvr_mask = 0x7fff0000,
1217 .pvr_value = 0x00860000,
1233 { /* default match, we assume split I/D cache & TB (non-601)... */
1234 .pvr_mask = 0x00000000,
1235 .pvr_value = 0x00000000,
1248 .pvr_mask = 0xffff0000,
1264 .pvr_mask = 0xffff0000,
1265 .pvr_value = 0x41810000,
1277 .pvr_mask = 0xffff0000,
1278 .pvr_value = 0x41610000,
1290 .pvr_mask = 0xffff0000,
1291 .pvr_value = 0x40B10000,
1303 .pvr_mask = 0xffff0000,
1304 .pvr_value = 0x41410000,
1316 .pvr_mask = 0xffff0000,
1317 .pvr_value = 0x50910000,
1329 .pvr_mask = 0xffff0000,
1330 .pvr_value = 0x51510000,
1342 .pvr_mask = 0xffff0000,
1343 .pvr_value = 0x41F10000,
1354 .pvr_mask = 0xffff0000,
1355 .pvr_value = 0x51210000,
1367 .pvr_mask = 0xffff000f,
1368 .pvr_value = 0x12910007,
1380 .pvr_mask = 0xffff000f,
1381 .pvr_value = 0x1291000d,
1393 .pvr_mask = 0xffff000f,
1394 .pvr_value = 0x1291000f,
1406 .pvr_mask = 0xffff000f,
1407 .pvr_value = 0x12910003,
1419 .pvr_mask = 0xffff000f,
1420 .pvr_value = 0x12910005,
1432 .pvr_mask = 0xffff000f,
1433 .pvr_value = 0x12910001,
1445 .pvr_mask = 0xffff000f,
1446 .pvr_value = 0x12910009,
1458 .pvr_mask = 0xffff000f,
1459 .pvr_value = 0x1291000b,
1471 .pvr_mask = 0xffff000f,
1472 .pvr_value = 0x12910000,
1484 .pvr_mask = 0xffff000f,
1485 .pvr_value = 0x12910002,
1498 .pvr_mask = 0xffff0000,
1499 .pvr_value = 0x41510000,
1511 .pvr_mask = 0xffff0000,
1512 .pvr_value = 0x7ff11432,
1524 .pvr_mask = 0x00000000,
1525 .pvr_value = 0x00000000,
1540 .pvr_mask = 0xf0000fff,
1541 .pvr_value = 0x40000850,
1551 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1552 .pvr_mask = 0xf0000fff,
1553 .pvr_value = 0x40000858,
1565 .pvr_mask = 0xf0000fff,
1566 .pvr_value = 0x400008d3,
1576 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1577 .pvr_mask = 0xf0000ff7,
1578 .pvr_value = 0x400008d4,
1589 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1590 .pvr_mask = 0xf0000fff,
1591 .pvr_value = 0x400008db,
1603 .pvr_mask = 0xf0000ffb,
1604 .pvr_value = 0x200008D0,
1615 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1616 .pvr_mask = 0xf0000ffb,
1617 .pvr_value = 0x200008D8,
1629 .pvr_mask = 0xf0000fff,
1630 .pvr_value = 0x40000440,
1641 .pvr_mask = 0xf0000fff,
1642 .pvr_value = 0x40000481,
1653 .pvr_mask = 0xf0000fff,
1654 .pvr_value = 0x50000850,
1666 .pvr_mask = 0xf0000fff,
1667 .pvr_value = 0x50000851,
1679 .pvr_mask = 0xf0000fff,
1680 .pvr_value = 0x50000892,
1692 .pvr_mask = 0xf0000fff,
1693 .pvr_value = 0x50000894,
1705 .pvr_mask = 0xfff00fff,
1706 .pvr_value = 0x53200891,
1717 .pvr_mask = 0xfff00fff,
1718 .pvr_value = 0x53400890,
1730 .pvr_mask = 0xfff00fff,
1731 .pvr_value = 0x53400891,
1743 .pvr_mask = 0xffff0006,
1744 .pvr_value = 0x13020002,
1756 .pvr_mask = 0xffff0007,
1757 .pvr_value = 0x13020004,
1769 .pvr_mask = 0xffff0006,
1770 .pvr_value = 0x13020000,
1782 .pvr_mask = 0xffff0007,
1783 .pvr_value = 0x13020005,
1795 .pvr_mask = 0xffffff00,
1796 .pvr_value = 0x13541800,
1808 .pvr_mask = 0xfffffff0,
1809 .pvr_value = 0x12C41C80,
1823 .pvr_mask = 0xffffffff,
1824 .pvr_value = 0x11a52080,
1832 .dcache_bsize = 128,
1837 .pvr_mask = 0xffff0000,
1838 .pvr_value = 0x7ff50000,
1846 .dcache_bsize = 128,
1851 .pvr_mask = 0xffff0000,
1852 .pvr_value = 0x00050000,
1860 .dcache_bsize = 128,
1865 .pvr_mask = 0xffff0000,
1866 .pvr_value = 0x11a50000,
1874 .dcache_bsize = 128,
1880 .pvr_mask = 0x00000000,
1881 .pvr_value = 0x00000000,
1894 .pvr_mask = 0xfff00000,
1895 .pvr_value = 0x81000000,
1897 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1908 .pvr_mask = 0xfff00000,
1909 .pvr_value = 0x81100000,
1911 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1923 .pvr_mask = 0x00000000,
1924 .pvr_value = 0x00000000,
1942 .pvr_mask = 0xffff0000,
1943 .pvr_value = 0x80200000,
1961 .pvr_mask = 0xffff0000,
1962 .pvr_value = 0x80210000,
1983 .pvr_mask = 0xffff0000,
1984 .pvr_value = 0x80230000,
2005 .pvr_mask = 0xffff0000,
2006 .pvr_value = 0x80240000,
2027 .pvr_mask = 0xffff0000,
2028 .pvr_value = 0x80400000,
2052 .pvr_mask = 0x00000000,
2053 .pvr_value = 0x00000000,
2103 if (old.num_pmcs && !s->num_pmcs) { in setup_cpu_spec()
2104 t->num_pmcs = old.num_pmcs; in setup_cpu_spec()
2105 t->pmc_type = old.pmc_type; in setup_cpu_spec()
2106 t->oprofile_type = old.oprofile_type; in setup_cpu_spec()
2107 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; in setup_cpu_spec()
2108 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; in setup_cpu_spec()
2109 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; in setup_cpu_spec()
2126 t->oprofile_cpu_type = old.oprofile_cpu_type; in setup_cpu_spec()
2127 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG; in setup_cpu_spec()
2138 *PTRRELOC(&powerpc_base_platform) = t->platform; in setup_cpu_spec()
2144 * pointer on ppc64 and booke as we are running at 0 in real mode in setup_cpu_spec()
2145 * on ppc64 and reloc_offset is always 0 on booke. in setup_cpu_spec()
2147 if (t->cpu_setup) { in setup_cpu_spec()
2148 t->cpu_setup(offset, t); in setup_cpu_spec()
2162 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { in identify_cpu()
2163 if ((pvr & s->pvr_mask) == s->pvr_value) in identify_cpu()
2175 * cpu device-tree node.
2186 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { in identify_cpu_name()
2187 if ((pvr & s->pvr_mask) == s->pvr_value) { in identify_cpu_name()
2188 t->cpu_name = s->cpu_name; in identify_cpu_name()
2197 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2205 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { in cpu_feature_keys_init()
2208 if (!(cur_cpu_spec->cpu_features & f)) in cpu_feature_keys_init()
2214 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2222 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { in mmu_feature_keys_init()
2225 if (!(cur_cpu_spec->mmu_features & f)) in mmu_feature_keys_init()