Lines Matching +full:1 +full:- +full:4
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Memory copy functions for 32-bit PowerPC.
5 * Copyright (C) 1996-2005 Paul Mackerras.
12 #include <asm/code-patching-asm.h>
16 lwz r7,4(r4); \
20 stw r7,4(r6); \
27 lwz r7,4(r4); \
28 8 ## n ## 1: \
34 8 ## n ## 4: \
35 stw r7,4(r6); \
45 addi r5,r5,-(16 * n); \
47 9 ## n ## 1: \
48 addi r5,r5,-(16 * n); \
51 EX_TABLE(8 ## n ## 1b,9 ## n ## 0b); \
54 EX_TABLE(8 ## n ## 4b,9 ## n ## 1b); \
55 EX_TABLE(8 ## n ## 5b,9 ## n ## 1b); \
56 EX_TABLE(8 ## n ## 6b,9 ## n ## 1b); \
57 EX_TABLE(8 ## n ## 7b,9 ## n ## 1b)
66 CACHELINE_MASK = (L1_CACHE_BYTES-1)
70 rlwinm. r0 ,r5, 31, 1, 31
71 addi r6, r3, -4
72 beq- 2f
75 1: stwu r4, 4(r6)
76 bdnz 1b
77 2: andi. r0, r5, 1
79 sth r4, 4(r6)
87 * area is cacheable. -- paulus
94 cmplwi 0,r5,4
113 clrlwi r7,r6,32-LG_CACHELINE_BYTES
116 addic. r9,r9,-1 /* total number of complete cachelines */
122 4: stwu r4,4(r6)
123 bdnz 4b
125 li r7,4
129 clrlwi r5,r8,32-LG_CACHELINE_BYTES
130 addi r5,r5,4
135 1: stwu r4,4(r6)
136 bdnz 1b
141 8: stbu r4,1(r6)
148 addi r6,r3,-1
149 9: stbu r4,1(r6)
160 * -- paulus.
172 1: b generic_memcpy
173 patch_site 1b, patch__memcpy_nocache
178 cmplw 1,r3,r8
179 crand 0,0,4 /* cr0.lt &= cr1.lt */
182 addi r4,r4,-4
183 addi r6,r3,-4
190 andi. r8,r0,3 /* get it word-aligned first */
194 70: lbz r9,4(r4) /* do some bytes */
195 addi r4,r4,1
196 addi r6,r6,1
202 72: lwzu r9,4(r4) /* do some words */
203 stwu r9,4(r6)
207 clrlwi r5,r5,32-LG_CACHELINE_BYTES
208 li r11,4
232 30: lwzu r0,4(r4)
233 stwu r0,4(r6)
241 40: lbzu r0,1(r4)
242 stbu r0,1(r6)
252 addi r6,r3,-4
253 addi r4,r4,-4
258 1: lwz r7,4(r4)
260 stw r7,4(r6)
262 bdnz 1b
264 2: cmplwi 0,r5,4
266 lwzu r0,4(r4)
267 addi r5,r5,-4
268 stwu r0,4(r6)
274 4: lbzu r0,1(r4)
275 stbu r0,1(r6)
276 bdnz 4b
278 5: subfic r0,r0,4
280 6: lbz r7,4(r4)
281 addi r4,r4,1
282 stb r7,4(r6)
283 addi r6,r6,1
286 rlwinm. r7,r5,32-3,3,31
289 b 1b
292 rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */
299 1: lwz r7,-4(r4)
300 lwzu r8,-8(r4)
301 stw r7,-4(r6)
302 stwu r8,-8(r6)
303 bdnz 1b
305 2: cmplwi 0,r5,4
307 lwzu r0,-4(r4)
308 subi r5,r5,4
309 stwu r0,-4(r6)
313 4: lbzu r0,-1(r4)
314 stbu r0,-1(r6)
315 bdnz 4b
318 6: lbzu r7,-1(r4)
319 stbu r7,-1(r6)
322 rlwinm. r7,r5,32-3,3,31
325 b 1b
328 addi r4,r4,-4
329 addi r6,r3,-4
336 andi. r8,r0,3 /* get it word-aligned first */
339 70: lbz r9,4(r4) /* do some bytes */
340 71: stb r9,4(r6)
341 addi r4,r4,1
342 addi r6,r6,1
348 72: lwzu r9,4(r4) /* do some words */
349 73: stwu r9,4(r6)
358 clrlwi r5,r5,32-LG_CACHELINE_BYTES
359 li r11,4
363 li r3,4
364 cmpwi r0,1
367 li r7,1
368 #if MAX_COPY_PREFETCH > 1
371 we prefetch 1 cacheline ahead. */
382 #endif /* MAX_COPY_PREFETCH > 1 */
394 COPY_16_BYTES_WITHEX(1)
399 COPY_16_BYTES_WITHEX(4)
408 li r3,4
415 30: lwzu r0,4(r4)
416 31: stwu r0,4(r6)
422 40: lbz r0,4(r4)
423 41: stb r0,4(r6)
424 addi r4,r4,1
425 addi r6,r6,1
430 /* read fault, initial single-byte copy */
433 /* write fault, initial single-byte copy */
434 101: li r9,1
442 103: li r9,1
452 COPY_16_BYTES_EXCODE(1)
457 COPY_16_BYTES_EXCODE(4)
470 105: li r9,1
479 109: li r9,1
487 111: li r9,1
492 * r5 + (ctr << r3), and r9 is 0 for read or 1 for write.
502 130: lbz r0,4(r4)
503 131: stb r0,4(r6)
504 addi r4,r4,1
505 addi r6,r6,1
507 /* then clear out the destination: r3 bytes starting at 4(r6) */