Lines Matching +full:pll +full:- +full:0
17 #include <linux/clk-provider.h>
23 #include "clk-iproc.h"
25 #define IPROC_CLK_MAX_FREQ_POLICY 0x3
26 #define IPROC_CLK_POLICY_FREQ_OFFSET 0x008
28 #define IPROC_CLK_POLICY_FREQ_POLICY_FREQ_MASK 0x7
30 #define IPROC_CLK_PLLARMA_OFFSET 0xc00
33 #define IPROC_CLK_PLLARMA_PDIV_MASK 0xf
35 #define IPROC_CLK_PLLARMA_NDIV_INT_MASK 0x3ff
37 #define IPROC_CLK_PLLARMB_OFFSET 0xc04
38 #define IPROC_CLK_PLLARMB_NDIV_FRAC_MASK 0xfffff
40 #define IPROC_CLK_PLLARMC_OFFSET 0xc08
42 #define IPROC_CLK_PLLARMC_MDIV_MASK 0xff
44 #define IPROC_CLK_PLLARMCTL5_OFFSET 0xc20
45 #define IPROC_CLK_PLLARMCTL5_H_MDIV_MASK 0xff
47 #define IPROC_CLK_PLLARM_OFFSET_OFFSET 0xc24
50 #define IPROC_CLK_PLLARM_NDIV_INT_OFFSET_MASK 0xff
51 #define IPROC_CLK_PLLARM_NDIV_FRAC_OFFSET_MASK 0xfffff
53 #define IPROC_CLK_ARM_DIV_OFFSET 0xe00
55 #define IPROC_CLK_ARM_DIV_ARM_PLL_SELECT_MASK 0xf
57 #define IPROC_CLK_POLICY_DBG_OFFSET 0xec0
59 #define IPROC_CLK_POLICY_DBG_ACT_FREQ_MASK 0x7
62 ARM_PLL_FID_CRYSTAL_CLK = 0,
76 static unsigned int __get_fid(struct iproc_arm_pll *pll) in __get_fid() argument
81 val = readl(pll->base + IPROC_CLK_ARM_DIV_OFFSET); in __get_fid()
85 policy = 0; in __get_fid()
90 val = readl(pll->base + IPROC_CLK_POLICY_FREQ_OFFSET); in __get_fid()
94 val = readl(pll->base + IPROC_CLK_POLICY_DBG_OFFSET); in __get_fid()
98 pr_debug("%s: fid override %u->%u\n", __func__, fid, in __get_fid()
111 * - 25 MHz Crystal
112 * - System clock
113 * - PLL channel 0 (slow clock)
114 * - PLL channel 1 (fast clock)
116 static int __get_mdiv(struct iproc_arm_pll *pll) in __get_mdiv() argument
122 fid = __get_fid(pll); in __get_mdiv()
131 val = readl(pll->base + IPROC_CLK_PLLARMC_OFFSET); in __get_mdiv()
133 if (mdiv == 0) in __get_mdiv()
138 val = readl(pll->base + IPROC_CLK_PLLARMCTL5_OFFSET); in __get_mdiv()
140 if (mdiv == 0) in __get_mdiv()
145 mdiv = -EFAULT; in __get_mdiv()
151 static unsigned int __get_ndiv(struct iproc_arm_pll *pll) in __get_ndiv() argument
156 val = readl(pll->base + IPROC_CLK_PLLARM_OFFSET_OFFSET); in __get_ndiv()
164 if (ndiv_int == 0) in __get_ndiv()
170 val = readl(pll->base + IPROC_CLK_PLLARMA_OFFSET); in __get_ndiv()
173 if (ndiv_int == 0) in __get_ndiv()
176 val = readl(pll->base + IPROC_CLK_PLLARMB_OFFSET); in __get_ndiv()
186 * The output frequency of the ARM PLL is calculated based on the ARM PLL
188 * pdiv = ARM PLL pre-divider
189 * ndiv = ARM PLL multiplier
190 * mdiv = ARM PLL post divider
198 struct iproc_arm_pll *pll = to_iproc_arm_pll(hw); in iproc_arm_pll_recalc_rate() local
205 val = readl(pll->base + IPROC_CLK_PLLARMC_OFFSET); in iproc_arm_pll_recalc_rate()
207 pll->rate = parent_rate; in iproc_arm_pll_recalc_rate()
208 return pll->rate; in iproc_arm_pll_recalc_rate()
211 /* PLL needs to be locked */ in iproc_arm_pll_recalc_rate()
212 val = readl(pll->base + IPROC_CLK_PLLARMA_OFFSET); in iproc_arm_pll_recalc_rate()
214 pll->rate = 0; in iproc_arm_pll_recalc_rate()
215 return 0; in iproc_arm_pll_recalc_rate()
220 if (pdiv == 0) in iproc_arm_pll_recalc_rate()
223 ndiv = __get_ndiv(pll); in iproc_arm_pll_recalc_rate()
224 mdiv = __get_mdiv(pll); in iproc_arm_pll_recalc_rate()
225 if (mdiv <= 0) { in iproc_arm_pll_recalc_rate()
226 pll->rate = 0; in iproc_arm_pll_recalc_rate()
227 return 0; in iproc_arm_pll_recalc_rate()
229 pll->rate = (ndiv * parent_rate) >> 20; in iproc_arm_pll_recalc_rate()
230 pll->rate = (pll->rate / pdiv) / mdiv; in iproc_arm_pll_recalc_rate()
232 pr_debug("%s: ARM PLL rate: %lu. parent rate: %lu\n", __func__, in iproc_arm_pll_recalc_rate()
233 pll->rate, parent_rate); in iproc_arm_pll_recalc_rate()
237 return pll->rate; in iproc_arm_pll_recalc_rate()
247 struct iproc_arm_pll *pll; in iproc_armpll_setup() local
251 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in iproc_armpll_setup()
252 if (WARN_ON(!pll)) in iproc_armpll_setup()
255 pll->base = of_iomap(node, 0); in iproc_armpll_setup()
256 if (WARN_ON(!pll->base)) in iproc_armpll_setup()
259 init.name = node->name; in iproc_armpll_setup()
261 init.flags = 0; in iproc_armpll_setup()
262 parent_name = of_clk_get_parent_name(node, 0); in iproc_armpll_setup()
264 init.num_parents = (parent_name ? 1 : 0); in iproc_armpll_setup()
265 pll->hw.init = &init; in iproc_armpll_setup()
267 ret = clk_hw_register(NULL, &pll->hw); in iproc_armpll_setup()
271 ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, &pll->hw); in iproc_armpll_setup()
278 clk_hw_unregister(&pll->hw); in iproc_armpll_setup()
280 iounmap(pll->base); in iproc_armpll_setup()
282 kfree(pll); in iproc_armpll_setup()