Lines Matching +full:protected +full:- +full:clocks
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
113 if (!core->rpm_enabled)
116 ret = pm_runtime_get_sync(core->dev);
118 pm_runtime_put_noidle(core->dev);
126 if (!core->rpm_enabled)
129 pm_runtime_put_sync(core->dev);
153 if (--prepare_refcnt)
193 if (--enable_refcnt) {
203 return core->protect_count;
211 * .is_prepared is optional for clocks that can prepare
214 if (!core->ops->is_prepared)
215 return core->prepare_count;
218 ret = core->ops->is_prepared(core->hw);
230 * .is_enabled is only mandatory for clocks that gate
233 if (!core->ops->is_enabled)
234 return core->enable_count;
246 if (core->rpm_enabled) {
247 pm_runtime_get_noresume(core->dev);
248 if (!pm_runtime_active(core->dev)) {
254 ret = core->ops->is_enabled(core->hw);
256 if (core->rpm_enabled)
257 pm_runtime_put(core->dev);
266 return !clk ? NULL : clk->core->name;
272 return hw->core->name;
278 return !clk ? NULL : clk->core->hw;
284 return hw->core->num_parents;
290 return hw->core->parent ? hw->core->parent->hw : NULL;
300 if (!strcmp(core->name, name))
303 hlist_for_each_entry(child, &core->children, child_node) {
347 return -ENOENT;
352 return ERR_PTR(-ENOENT);
357 * clk_core_get - Find the clk_core parent of a clk
364 * node's 'clock-names' property or as the 'con_id' matching the device's
369 * clock-controller@c001 that has a clk_init_data::parent_data array
371 * clock-controller@f00abcd without needing to get the globally unique name of
374 * parent: clock-controller@f00abcd {
376 * #clock-cells = <0>;
379 * clock-controller@c001 {
381 * clocks = <&parent>;
382 * clock-names = "xtal";
383 * #clock-cells = <1>;
386 * Returns: -ENOENT when the provider can't be found or the clk doesn't
394 const char *name = core->parents[p_index].fw_name;
395 int index = core->parents[p_index].index;
396 struct clk_hw *hw = ERR_PTR(-ENOENT);
397 struct device *dev = core->dev;
399 struct device_node *np = core->of_node;
417 return hw->core;
422 struct clk_parent_map *entry = &core->parents[index];
423 struct clk_core *parent = ERR_PTR(-ENOENT);
425 if (entry->hw) {
426 parent = entry->hw->core;
433 parent = ERR_PTR(-EPROBE_DEFER);
436 if (PTR_ERR(parent) == -ENOENT && entry->name)
437 parent = clk_core_lookup(entry->name);
442 entry->core = parent;
448 if (!core || index >= core->num_parents || !core->parents)
451 if (!core->parents[index].core)
454 return core->parents[index].core;
462 parent = clk_core_get_parent_by_index(hw->core, index);
464 return !parent ? NULL : parent->hw;
470 return !clk ? 0 : clk->core->enable_count;
478 if (!core->num_parents || core->parent)
479 return core->rate;
491 return clk_core_get_rate_nolock(hw->core);
500 return core->accuracy;
505 return hw->core->flags;
511 return clk_core_is_prepared(hw->core);
517 return clk_core_rate_is_protected(hw->core);
523 return clk_core_is_enabled(hw->core);
532 return clk_core_is_enabled(clk->core);
540 return abs(now - rate) < abs(best - rate);
549 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
555 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
556 parent = core->parent;
557 if (core->flags & CLK_SET_RATE_PARENT) {
558 ret = __clk_determine_rate(parent ? parent->hw : NULL,
574 num_parents = core->num_parents;
580 if (core->flags & CLK_SET_RATE_PARENT) {
582 ret = __clk_determine_rate(parent->hw, &parent_req);
589 if (mux_is_better_rate(req->rate, parent_req.rate,
597 return -EINVAL;
601 req->best_parent_hw = best_parent->hw;
602 req->best_parent_rate = best;
603 req->rate = best;
613 return !core ? NULL : core->hw->clk;
624 *min_rate = core->min_rate;
625 *max_rate = core->max_rate;
627 hlist_for_each_entry(clk_user, &core->clks, clks_node)
628 *min_rate = max(*min_rate, clk_user->min_rate);
630 hlist_for_each_entry(clk_user, &core->clks, clks_node)
631 *max_rate = min(*max_rate, clk_user->max_rate);
637 hw->core->min_rate = min_rate;
638 hw->core->max_rate = max_rate;
643 * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk
651 * Returns: 0 on success, -EERROR value on error
676 if (WARN(core->protect_count == 0,
677 "%s already unprotected\n", core->name))
680 if (--core->protect_count > 0)
683 clk_core_rate_unprotect(core->parent);
693 return -EINVAL;
695 if (core->protect_count == 0)
698 ret = core->protect_count;
699 core->protect_count = 1;
706 * clk_rate_exclusive_put - release exclusivity over clock rate control
711 * clock which could result in a rate change or rate glitch. Exclusive clocks
713 * further up the parent chain of clocks. As a result, clocks up parent chain
734 if (WARN_ON(clk->exclusive_count <= 0))
737 clk_core_rate_unprotect(clk->core);
738 clk->exclusive_count--;
751 if (core->protect_count == 0)
752 clk_core_rate_protect(core->parent);
754 core->protect_count++;
768 core->protect_count = count;
772 * clk_rate_exclusive_get - get exclusivity over the clk rate control
777 * clock which could result in a rate change or rate glitch. Exclusive clocks
779 * further up the parent chain of clocks. As a result, clocks up parent chain
787 * Returns 0 on success, -EERROR otherwise
795 clk_core_rate_protect(clk->core);
796 clk->exclusive_count++;
810 if (WARN(core->prepare_count == 0,
811 "%s already unprepared\n", core->name))
814 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
815 "Unpreparing critical %s\n", core->name))
818 if (core->flags & CLK_SET_RATE_GATE)
821 if (--core->prepare_count > 0)
824 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
828 if (core->ops->unprepare)
829 core->ops->unprepare(core->hw);
834 clk_core_unprepare(core->parent);
845 * clk_unprepare - undo preparation of a clock source
860 clk_core_unprepare_lock(clk->core);
873 if (core->prepare_count == 0) {
878 ret = clk_core_prepare(core->parent);
884 if (core->ops->prepare)
885 ret = core->ops->prepare(core->hw);
893 core->prepare_count++;
902 if (core->flags & CLK_SET_RATE_GATE)
907 clk_core_unprepare(core->parent);
925 * clk_prepare - prepare a clock source
934 * Returns 0 on success, -EERROR otherwise.
941 return clk_core_prepare_lock(clk->core);
952 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
955 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
956 "Disabling critical %s\n", core->name))
959 if (--core->enable_count > 0)
964 if (core->ops->disable)
965 core->ops->disable(core->hw);
969 clk_core_disable(core->parent);
982 * clk_disable - gate a clock
988 * SoC-internal clk which is controlled via simple register writes. In the
998 clk_core_disable_lock(clk->core);
1011 if (WARN(core->prepare_count == 0,
1012 "Enabling unprepared %s\n", core->name))
1013 return -ESHUTDOWN;
1015 if (core->enable_count == 0) {
1016 ret = clk_core_enable(core->parent);
1023 if (core->ops->enable)
1024 ret = core->ops->enable(core->hw);
1029 clk_core_disable(core->parent);
1034 core->enable_count++;
1051 * clk_gate_restore_context - restore context for poweroff
1055 * the gate clocks based on the enable_count. This is done in cases
1058 * helps restore the state of gate clocks.
1062 struct clk_core *core = hw->core;
1064 if (core->enable_count)
1065 core->ops->enable(hw);
1067 core->ops->disable(hw);
1076 hlist_for_each_entry(child, &core->children, child_node) {
1082 if (core->ops && core->ops->save_context)
1083 ret = core->ops->save_context(core->hw);
1092 if (core->ops && core->ops->restore_context)
1093 core->ops->restore_context(core->hw);
1095 hlist_for_each_entry(child, &core->children, child_node)
1100 * clk_save_context - save clock context for poweroff
1128 * clk_restore_context - restore clock context after poweroff
1146 * clk_enable - ungate a clock
1151 * if the operation will never sleep. One example is a SoC-internal clk which
1155 * must be called before clk_enable. Returns 0 on success, -EERROR
1163 return clk_core_enable_lock(clk->core);
1194 hlist_for_each_entry(child, &core->children, child_node)
1197 if (core->prepare_count)
1200 if (core->flags & CLK_IGNORE_UNUSED)
1208 if (core->ops->unprepare_unused)
1209 core->ops->unprepare_unused(core->hw);
1210 else if (core->ops->unprepare)
1211 core->ops->unprepare(core->hw);
1225 hlist_for_each_entry(child, &core->children, child_node)
1228 if (core->flags & CLK_OPS_PARENT_ENABLE)
1229 clk_core_prepare_enable(core->parent);
1236 if (core->enable_count)
1239 if (core->flags & CLK_IGNORE_UNUSED)
1243 * some gate clocks have special needs during the disable-unused
1249 if (core->ops->disable_unused)
1250 core->ops->disable_unused(core->hw);
1251 else if (core->ops->disable)
1252 core->ops->disable(core->hw);
1260 if (core->flags & CLK_OPS_PARENT_ENABLE)
1261 clk_core_disable_unprepare(core->parent);
1277 pr_warn("clk: Not disabling unused clocks\n");
1313 * - if the provider is not protected at all
1314 * - if the calling consumer is the only one which has exclusivity
1318 req->rate = core->rate;
1319 } else if (core->ops->determine_rate) {
1320 return core->ops->determine_rate(core->hw, req);
1321 } else if (core->ops->round_rate) {
1322 rate = core->ops->round_rate(core->hw, req->rate,
1323 &req->best_parent_rate);
1327 req->rate = rate;
1329 return -EINVAL;
1343 parent = core->parent;
1345 req->best_parent_hw = parent->hw;
1346 req->best_parent_rate = parent->rate;
1348 req->best_parent_hw = NULL;
1349 req->best_parent_rate = 0;
1355 return core->ops->determine_rate || core->ops->round_rate;
1364 req->rate = 0;
1372 else if (core->flags & CLK_SET_RATE_PARENT)
1373 return clk_core_round_rate_nolock(core->parent, req);
1375 req->rate = core->rate;
1380 * __clk_determine_rate - get the closest rate actually supported by a clock
1389 req->rate = 0;
1393 return clk_core_round_rate_nolock(hw->core, req);
1398 * clk_hw_round_rate() - round the given rate for a hw clk
1417 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
1420 ret = clk_core_round_rate_nolock(hw->core, &req);
1429 * clk_round_rate - round the given rate for a clk
1447 if (clk->exclusive_count)
1448 clk_core_rate_unprotect(clk->core);
1450 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
1453 ret = clk_core_round_rate_nolock(clk->core, &req);
1455 if (clk->exclusive_count)
1456 clk_core_rate_protect(clk->core);
1468 * __clk_notify - call clk notifier chain
1474 * Triggers a notifier call chain on the clk rate-change notification
1492 if (cn->clk->core == core) {
1493 cnd.clk = cn->clk;
1494 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1520 if (core->parent)
1521 parent_accuracy = core->parent->accuracy;
1523 if (core->ops->recalc_accuracy)
1524 core->accuracy = core->ops->recalc_accuracy(core->hw,
1527 core->accuracy = parent_accuracy;
1529 hlist_for_each_entry(child, &core->children, child_node)
1535 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1542 * clk_get_accuracy - return the accuracy of clk
1558 accuracy = clk_core_get_accuracy_recalc(clk->core);
1570 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1571 rate = core->ops->recalc_rate(core->hw, parent_rate);
1597 old_rate = core->rate;
1599 if (core->parent)
1600 parent_rate = core->parent->rate;
1602 core->rate = clk_recalc(core, parent_rate);
1608 if (core->notifier_count && msg)
1609 __clk_notify(core, msg, old_rate, core->rate);
1611 hlist_for_each_entry(child, &core->children, child_node)
1617 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1624 * clk_get_rate - return the rate of clk
1639 rate = clk_core_get_rate_recalc(clk->core);
1652 return -EINVAL;
1654 for (i = 0; i < core->num_parents; i++) {
1656 if (core->parents[i].core == parent)
1660 if (core->parents[i].core)
1664 if (core->parents[i].hw) {
1665 if (core->parents[i].hw == parent->hw)
1677 if (core->parents[i].name &&
1678 !strcmp(parent->name, core->parents[i].name))
1682 if (i == core->num_parents)
1683 return -EINVAL;
1685 core->parents[i].core = parent;
1690 * clk_hw_get_parent_index - return the index of the parent clock
1693 * Fetches and returns the index of parent clock. Returns -EINVAL if the given
1701 return -EINVAL;
1703 return clk_fetch_parent_index(hw->core, parent->core);
1714 core->orphan = is_orphan;
1716 hlist_for_each_entry(child, &core->children, child_node)
1722 bool was_orphan = core->orphan;
1724 hlist_del(&core->child_node);
1727 bool becomes_orphan = new_parent->orphan;
1730 if (new_parent->new_child == core)
1731 new_parent->new_child = NULL;
1733 hlist_add_head(&core->child_node, &new_parent->children);
1738 hlist_add_head(&core->child_node, &clk_orphan_list);
1743 core->parent = new_parent;
1750 struct clk_core *old_parent = core->parent;
1773 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1779 if (core->prepare_count) {
1800 if (core->prepare_count) {
1805 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
1806 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1824 if (parent && core->ops->set_parent)
1825 ret = core->ops->set_parent(core->hw, p_index);
1852 * pre-rate change notifications and returns early if no clks in the
1869 if (core->notifier_count)
1870 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1874 __func__, core->name, ret);
1878 hlist_for_each_entry(child, &core->children, child_node) {
1893 core->new_rate = new_rate;
1894 core->new_parent = new_parent;
1895 core->new_parent_index = p_index;
1897 core->new_child = NULL;
1898 if (new_parent && new_parent != core->parent)
1899 new_parent->new_child = core;
1901 hlist_for_each_entry(child, &core->children, child_node) {
1902 child->new_rate = clk_recalc(child, new_rate);
1903 clk_calc_subtree(child, child->new_rate, NULL, 0);
1928 parent = old_parent = core->parent;
1930 best_parent_rate = parent->rate;
1950 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
1954 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1955 /* pass-through clock without adjustable parent */
1956 core->new_rate = core->rate;
1959 /* pass-through clock with adjustable parent */
1961 new_rate = parent->new_rate;
1965 /* some clocks must be gated to change parent */
1967 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1969 __func__, core->name);
1974 if (parent && core->num_parents > 1) {
1978 __func__, parent->name, core->name);
1983 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1984 best_parent_rate != parent->rate)
2004 if (core->rate == core->new_rate)
2007 if (core->notifier_count) {
2008 ret = __clk_notify(core, event, core->rate, core->new_rate);
2013 hlist_for_each_entry(child, &core->children, child_node) {
2015 if (child->new_parent && child->new_parent != core)
2022 /* handle the new child who might not be in core->children yet */
2023 if (core->new_child) {
2024 tmp_clk = clk_propagate_rate_change(core->new_child, event);
2046 old_rate = core->rate;
2048 if (core->new_parent) {
2049 parent = core->new_parent;
2050 best_parent_rate = core->new_parent->rate;
2051 } else if (core->parent) {
2052 parent = core->parent;
2053 best_parent_rate = core->parent->rate;
2059 if (core->flags & CLK_SET_RATE_UNGATE) {
2068 if (core->new_parent && core->new_parent != core->parent) {
2069 old_parent = __clk_set_parent_before(core, core->new_parent);
2070 trace_clk_set_parent(core, core->new_parent);
2072 if (core->ops->set_rate_and_parent) {
2074 core->ops->set_rate_and_parent(core->hw, core->new_rate,
2076 core->new_parent_index);
2077 } else if (core->ops->set_parent) {
2078 core->ops->set_parent(core->hw, core->new_parent_index);
2081 trace_clk_set_parent_complete(core, core->new_parent);
2082 __clk_set_parent_after(core, core->new_parent, old_parent);
2085 if (core->flags & CLK_OPS_PARENT_ENABLE)
2088 trace_clk_set_rate(core, core->new_rate);
2090 if (!skip_set_rate && core->ops->set_rate)
2091 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
2093 trace_clk_set_rate_complete(core, core->new_rate);
2095 core->rate = clk_recalc(core, best_parent_rate);
2097 if (core->flags & CLK_SET_RATE_UNGATE) {
2106 if (core->flags & CLK_OPS_PARENT_ENABLE)
2109 if (core->notifier_count && old_rate != core->rate)
2110 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
2112 if (core->flags & CLK_RECALC_NEW_RATES)
2113 (void)clk_calc_new_rates(core, core->new_rate);
2119 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
2121 if (child->new_parent && child->new_parent != core)
2126 /* handle the new child who might not be in core->children yet */
2127 if (core->new_child)
2128 clk_change_rate(core->new_child);
2176 /* fail on a direct rate set of a protected provider */
2178 return -EBUSY;
2183 return -EINVAL;
2193 fail_clk->name);
2195 ret = -EBUSY;
2202 core->req_rate = req_rate;
2210 * clk_set_rate - specify a new rate for clk
2226 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2228 * Returns 0 on success, -EERROR otherwise.
2240 if (clk->exclusive_count)
2241 clk_core_rate_unprotect(clk->core);
2243 ret = clk_core_set_rate_nolock(clk->core, rate);
2245 if (clk->exclusive_count)
2246 clk_core_rate_protect(clk->core);
2255 * clk_set_rate_exclusive - specify a new rate and get exclusive control
2271 * Returns 0 on success, -EERROR otherwise.
2289 ret = clk_core_set_rate_nolock(clk->core, rate);
2291 clk_core_rate_protect(clk->core);
2292 clk->exclusive_count++;
2302 * clk_set_rate_range - set a rate range for a clock source
2319 __func__, clk->core->name, clk->dev_id, clk->con_id,
2321 return -EINVAL;
2326 if (clk->exclusive_count)
2327 clk_core_rate_unprotect(clk->core);
2330 old_min = clk->min_rate;
2331 old_max = clk->max_rate;
2332 clk->min_rate = min;
2333 clk->max_rate = max;
2335 rate = clk_core_get_rate_nolock(clk->core);
2342 * usual reason (clock broken, clock protected, etc) but also
2344 * - round_rate() was not favorable and fell on the wrong
2346 * - the determine_rate() callback does not really check for
2355 ret = clk_core_set_rate_nolock(clk->core, rate);
2358 clk->min_rate = old_min;
2359 clk->max_rate = old_max;
2363 if (clk->exclusive_count)
2364 clk_core_rate_protect(clk->core);
2373 * clk_set_min_rate - set a minimum clock rate for a clock source
2384 return clk_set_rate_range(clk, rate, clk->max_rate);
2389 * clk_set_max_rate - set a maximum clock rate for a clock source
2400 return clk_set_rate_range(clk, clk->min_rate, rate);
2405 * clk_get_parent - return the parent of a clk
2408 * Simply returns clk->parent. Returns NULL if clk is NULL.
2418 /* TODO: Create a per-user clk and change callers to call clk_put */
2419 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
2430 if (core->num_parents > 1 && core->ops->get_parent)
2431 index = core->ops->get_parent(core->hw);
2449 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2453 * clk_has_parent - check if a clock is a possible parent for another
2467 /* NULL clocks should be nops, so return success if either is NULL. */
2471 core = clk->core;
2472 parent_core = parent->core;
2475 if (core->parent == parent_core)
2478 for (i = 0; i < core->num_parents; i++)
2479 if (!strcmp(core->parents[i].name, parent_core->name))
2498 if (core->parent == parent)
2501 /* verify ops for multi-parent clks */
2502 if (core->num_parents > 1 && !core->ops->set_parent)
2503 return -EPERM;
2505 /* check that we are allowed to re-parent if the clock is in use */
2506 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2507 return -EBUSY;
2510 return -EBUSY;
2517 __func__, parent->name, core->name);
2520 p_rate = parent->rate;
2534 /* do the re-parent */
2553 return clk_core_set_parent_nolock(hw->core, parent->core);
2558 * clk_set_parent - switch the parent of a mux clk
2562 * Re-parent clk to use parent as its new input source. If clk is in
2572 * Returns 0 on success, -EERROR otherwise.
2583 if (clk->exclusive_count)
2584 clk_core_rate_unprotect(clk->core);
2586 ret = clk_core_set_parent_nolock(clk->core,
2587 parent ? parent->core : NULL);
2589 if (clk->exclusive_count)
2590 clk_core_rate_protect(clk->core);
2600 int ret = -EINVAL;
2608 return -EBUSY;
2612 if (core->ops->set_phase) {
2613 ret = core->ops->set_phase(core->hw, degrees);
2615 core->phase = degrees;
2624 * clk_set_phase - adjust the phase shift of a clock signal
2629 * degrees. Returns 0 on success, -EERROR otherwise.
2633 * phase locked-loop clock signal generators we may shift phase with
2657 if (clk->exclusive_count)
2658 clk_core_rate_unprotect(clk->core);
2660 ret = clk_core_set_phase_nolock(clk->core, degrees);
2662 if (clk->exclusive_count)
2663 clk_core_rate_protect(clk->core);
2676 if (!core->ops->get_phase)
2680 ret = core->ops->get_phase(core->hw);
2682 core->phase = ret;
2688 * clk_get_phase - return the phase shift of a clock signal
2692 * -EERROR.
2702 ret = clk_core_get_phase(clk->core);
2712 core->duty.num = 1;
2713 core->duty.den = 2;
2720 struct clk_duty *duty = &core->duty;
2723 if (!core->ops->get_duty_cycle)
2726 ret = core->ops->get_duty_cycle(core->hw, duty);
2731 if (duty->den == 0 || duty->num > duty->den) {
2732 ret = -EINVAL;
2747 if (core->parent &&
2748 core->flags & CLK_DUTY_CYCLE_PARENT) {
2749 ret = clk_core_update_duty_cycle_nolock(core->parent);
2750 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2769 return -EBUSY;
2773 if (!core->ops->set_duty_cycle)
2776 ret = core->ops->set_duty_cycle(core->hw, duty);
2778 memcpy(&core->duty, duty, sizeof(*duty));
2790 if (core->parent &&
2791 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
2792 ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
2793 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2800 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
2820 return -EINVAL;
2827 if (clk->exclusive_count)
2828 clk_core_rate_unprotect(clk->core);
2830 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
2832 if (clk->exclusive_count)
2833 clk_core_rate_protect(clk->core);
2844 struct clk_duty *duty = &core->duty;
2851 ret = mult_frac(scale, duty->num, duty->den);
2859 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
2871 return clk_core_get_scaled_duty_cycle(clk->core, scale);
2876 * clk_is_match - check if two clk's point to the same hardware clock
2892 /* true if clk->core pointers match. Avoid dereferencing garbage */
2894 if (p->core == q->core)
2921 seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu ",
2923 30 - level * 3, c->name,
2924 c->enable_count, c->prepare_count, c->protect_count,
2932 seq_puts(s, "-----");
2944 hlist_for_each_entry(child, &c->children, child_node)
2951 struct hlist_head **lists = (struct hlist_head **)s->private;
2955 seq_puts(s, "---------------------------------------------------------------------------------------------\n");
2977 seq_printf(s, "\"%s\": { ", c->name);
2978 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
2979 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
2980 seq_printf(s, "\"protect_count\": %d,", c->protect_count);
2998 hlist_for_each_entry(child, &c->children, child_node) {
3010 struct hlist_head **lists = (struct hlist_head **)s->private;
3058 ret = clk_prepare_enable(core->hw->clk);
3060 clk_disable_unprepare(core->hw->clk);
3069 *val = core->enable_count && core->prepare_count;
3085 *val = core->rate;
3113 struct clk_core *core = s->private;
3114 unsigned long flags = core->flags;
3143 * 4. Fetch parent clock's clock-output-name if DT index was set
3151 seq_puts(s, parent->name);
3152 else if (core->parents[i].name)
3153 seq_puts(s, core->parents[i].name);
3154 else if (core->parents[i].fw_name)
3155 seq_printf(s, "<%s>(fw)", core->parents[i].fw_name);
3156 else if (core->parents[i].index >= 0)
3158 of_clk_get_parent_name(core->of_node,
3159 core->parents[i].index));
3168 struct clk_core *core = s->private;
3171 for (i = 0; i < core->num_parents - 1; i++)
3182 struct clk_core *core = s->private;
3184 if (core->parent)
3185 seq_printf(s, "%s\n", core->parent->name);
3193 struct clk_core *core = s->private;
3194 struct clk_duty *duty = &core->duty;
3196 seq_printf(s, "%u/%u\n", duty->num, duty->den);
3204 struct clk_core *core = s->private;
3218 struct clk_core *core = s->private;
3237 root = debugfs_create_dir(core->name, pdentry);
3238 core->dentry = root;
3244 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
3245 debugfs_create_u32("clk_phase", 0444, root, &core->phase);
3247 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
3248 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
3249 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
3250 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
3258 if (core->num_parents > 0)
3262 if (core->num_parents > 1)
3266 if (core->ops->debug_init)
3267 core->ops->debug_init(core->hw, core->dentry);
3271 * clk_debug_register - add a clk node to the debugfs clk directory
3281 hlist_add_head(&core->debug_node, &clk_debug_list);
3288 * clk_debug_unregister - remove a clk node from the debugfs clk directory
3292 * debugfs clk directory if clk->dentry points to debugfs created by
3298 hlist_del_init(&core->debug_node);
3299 debugfs_remove_recursive(core->dentry);
3300 core->dentry = NULL;
3305 * clk_debug_init - lazily populate the debugfs clk directory
3309 * populates the debugfs clk directory once at boot-time when we know that
3310 * debugfs is setup. It should only be called once at boot-time, all other clks
3369 * walk the list of orphan clocks and reparent any that newly finds a
3378 * clock. This is important for CLK_IS_CRITICAL clocks, which
3392 * __clk_core_init - initialize the data structures in a struct clk_core
3406 return -EINVAL;
3411 * Set hw->core after grabbing the prepare_lock to synchronize with
3412 * callers of clk_core_fill_parent_index() where we treat hw->core
3416 core->hw->core = core;
3423 if (clk_core_lookup(core->name)) {
3425 __func__, core->name);
3426 ret = -EEXIST;
3430 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
3431 if (core->ops->set_rate &&
3432 !((core->ops->round_rate || core->ops->determine_rate) &&
3433 core->ops->recalc_rate)) {
3435 __func__, core->name);
3436 ret = -EINVAL;
3440 if (core->ops->set_parent && !core->ops->get_parent) {
3442 __func__, core->name);
3443 ret = -EINVAL;
3447 if (core->num_parents > 1 && !core->ops->get_parent) {
3449 __func__, core->name);
3450 ret = -EINVAL;
3454 if (core->ops->set_rate_and_parent &&
3455 !(core->ops->set_parent && core->ops->set_rate)) {
3457 __func__, core->name);
3458 ret = -EINVAL;
3463 * optional platform-specific magic
3476 if (core->ops->init) {
3477 ret = core->ops->init(core->hw);
3482 parent = core->parent = __clk_init_parent(core);
3485 * Populate core->parent if parent has already been clk_core_init'd. If
3491 * clocks and re-parent any that are children of the clock currently
3495 hlist_add_head(&core->child_node, &parent->children);
3496 core->orphan = parent->orphan;
3497 } else if (!core->num_parents) {
3498 hlist_add_head(&core->child_node, &clk_root_list);
3499 core->orphan = false;
3501 hlist_add_head(&core->child_node, &clk_orphan_list);
3502 core->orphan = true;
3507 * .recalc_accuracy. For simple clocks and lazy developers the default
3512 if (core->ops->recalc_accuracy)
3513 core->accuracy = core->ops->recalc_accuracy(core->hw,
3516 core->accuracy = parent->accuracy;
3518 core->accuracy = 0;
3529 core->name);
3540 * simple clocks and lazy developers the default fallback is to use the
3544 if (core->ops->recalc_rate)
3545 rate = core->ops->recalc_rate(core->hw,
3548 rate = parent->rate;
3551 core->rate = core->req_rate = rate;
3554 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
3556 * reparenting clocks
3558 if (core->flags & CLK_IS_CRITICAL) {
3564 __func__, core->name);
3573 __func__, core->name);
3582 kref_init(&core->ref);
3587 hlist_del_init(&core->child_node);
3588 core->hw->core = NULL;
3600 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core
3607 hlist_add_head(&clk->clks_node, &core->clks);
3612 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core
3618 hlist_del(&clk->clks_node);
3622 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core
3636 return ERR_PTR(-ENOMEM);
3638 clk->core = core;
3639 clk->dev_id = dev_id;
3640 clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
3641 clk->max_rate = ULONG_MAX;
3647 * free_clk - Free a clk consumer
3655 kfree_const(clk->con_id);
3681 core = hw->core;
3685 clk->dev = dev;
3687 if (!try_module_get(core->owner)) {
3689 return ERR_PTR(-ENOENT);
3692 kref_get(&core->ref);
3704 return -EINVAL;
3710 return -ENOMEM;
3718 u8 num_parents = init->num_parents;
3719 const char * const *parent_names = init->parent_names;
3720 const struct clk_hw **parent_hws = init->parent_hws;
3721 const struct clk_parent_data *parent_data = init->parent_data;
3729 * Avoid unnecessary string look-ups of clk_core's possible parents by
3733 core->parents = parents;
3735 return -ENOMEM;
3739 parent->index = -1;
3744 __func__, core->name);
3745 ret = clk_cpy_name(&parent->name, parent_names[i],
3748 parent->hw = parent_data[i].hw;
3749 parent->index = parent_data[i].index;
3750 ret = clk_cpy_name(&parent->fw_name,
3753 ret = clk_cpy_name(&parent->name,
3757 parent->hw = parent_hws[i];
3759 ret = -EINVAL;
3767 } while (--i >= 0);
3779 int i = core->num_parents;
3781 if (!core->num_parents)
3784 while (--i >= 0) {
3785 kfree_const(core->parents[i].name);
3786 kfree_const(core->parents[i].fw_name);
3789 kfree(core->parents);
3797 const struct clk_init_data *init = hw->init;
3802 * we catch use of hw->init early on in the core.
3804 hw->init = NULL;
3808 ret = -ENOMEM;
3812 core->name = kstrdup_const(init->name, GFP_KERNEL);
3813 if (!core->name) {
3814 ret = -ENOMEM;
3818 if (WARN_ON(!init->ops)) {
3819 ret = -EINVAL;
3822 core->ops = init->ops;
3825 core->rpm_enabled = true;
3826 core->dev = dev;
3827 core->of_node = np;
3828 if (dev && dev->driver)
3829 core->owner = dev->driver->owner;
3830 core->hw = hw;
3831 core->flags = init->flags;
3832 core->num_parents = init->num_parents;
3833 core->min_rate = 0;
3834 core->max_rate = ULONG_MAX;
3840 INIT_HLIST_HEAD(&core->clks);
3846 hw->clk = alloc_clk(core, NULL, NULL);
3847 if (IS_ERR(hw->clk)) {
3848 ret = PTR_ERR(hw->clk);
3852 clk_core_link_consumer(core, hw->clk);
3856 return hw->clk;
3859 clk_core_unlink_consumer(hw->clk);
3862 free_clk(hw->clk);
3863 hw->clk = NULL;
3869 kfree_const(core->name);
3877 * dev_or_parent_of_node() - Get device node of @dev or @dev's parent
3881 * @dev->parent if dev doesn't have a device node, or NULL if neither
3882 * @dev or @dev->parent have a device node.
3893 np = dev_of_node(dev->parent);
3899 * clk_register - allocate a new clock, register it and return an opaque cookie
3901 * @hw: link to hardware-specific clock data
3918 * clk_hw_register - register a clk_hw and return an error code
3920 * @hw: link to hardware-specific clock data
3935 * of_clk_hw_register - register a clk_hw and return an error code
3937 * @hw: link to hardware-specific clock data
3959 kfree_const(core->name);
3964 * Empty clk_ops for unregistered clocks. These are used temporarily
3970 return -ENXIO;
3981 return -ENXIO;
3986 return -ENXIO;
4004 for (i = 0; i < root->num_parents; i++)
4005 if (root->parents[i].core == target)
4006 root->parents[i].core = NULL;
4008 hlist_for_each_entry(child, &root->children, child_node)
4027 * clk_unregister - unregister a currently registered clock
4038 clk_debug_unregister(clk->core);
4042 ops = clk->core->ops;
4045 clk->core->name);
4053 clk->core->ops = &clk_nodrv_ops;
4056 if (ops->terminate)
4057 ops->terminate(clk->core->hw);
4059 if (!hlist_empty(&clk->core->children)) {
4064 hlist_for_each_entry_safe(child, t, &clk->core->children,
4069 clk_core_evict_parent_cache(clk->core);
4071 hlist_del_init(&clk->core->child_node);
4073 if (clk->core->prepare_count)
4075 __func__, clk->core->name);
4077 if (clk->core->protect_count)
4078 pr_warn("%s: unregistering protected clock: %s\n",
4079 __func__, clk->core->name);
4081 kref_put(&clk->core->ref, __clk_release);
4089 * clk_hw_unregister - unregister a currently registered clk_hw
4090 * @hw: hardware-specific clock data to unregister
4094 clk_unregister(hw->clk);
4109 * devm_clk_register - resource managed clk_register()
4111 * @hw: link to hardware-specific clock data
4115 * Clocks returned from this function are automatically clk_unregister()ed on
4125 return ERR_PTR(-ENOMEM);
4140 * devm_clk_hw_register - resource managed clk_hw_register()
4142 * @hw: link to hardware-specific clock data
4144 * Managed clk_hw_register(). Clocks registered by this function are
4155 return -ENOMEM;
4187 * devm_clk_unregister - resource managed clk_unregister()
4202 * devm_clk_hw_unregister - resource managed clk_hw_unregister()
4203 * @dev: device that is unregistering the hardware-specific clock data
4204 * @hw: link to hardware-specific clock data
4235 if (WARN_ON(clk->exclusive_count)) {
4237 clk->core->protect_count -= (clk->exclusive_count - 1);
4238 clk_core_rate_unprotect(clk->core);
4239 clk->exclusive_count = 0;
4242 hlist_del(&clk->clks_node);
4243 if (clk->min_rate > clk->core->req_rate ||
4244 clk->max_rate < clk->core->req_rate)
4245 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4247 owner = clk->core->owner;
4248 kref_put(&clk->core->ref, __clk_release);
4260 * clk_notifier_register - add a clk rate change notifier
4267 * re-enter into the clk framework by calling any top-level clk APIs;
4274 * clk_notifier_register() must be called from non-atomic context.
4275 * Returns -EINVAL if called with null arguments, -ENOMEM upon
4282 int ret = -ENOMEM;
4285 return -EINVAL;
4291 if (cn->clk == clk)
4299 cn->clk = clk;
4300 srcu_init_notifier_head(&cn->notifier_head);
4302 list_add(&cn->node, &clk_notifier_list);
4305 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
4307 clk->core->notifier_count++;
4317 * clk_notifier_unregister - remove a clk rate change notifier
4324 * Returns -EINVAL if called with null arguments; otherwise, passes
4330 int ret = -ENOENT;
4333 return -EINVAL;
4338 if (cn->clk == clk) {
4339 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
4341 clk->core->notifier_count--;
4344 if (!cn->notifier_head.head) {
4345 srcu_cleanup_notifier_head(&cn->notifier_head);
4346 list_del(&cn->node);
4368 * struct of_clk_provider - Clock provider registration structure
4409 unsigned int idx = clkspec->args[0];
4411 if (idx >= clk_data->clk_num) {
4413 return ERR_PTR(-EINVAL);
4416 return clk_data->clks[idx];
4424 unsigned int idx = clkspec->args[0];
4426 if (idx >= hw_data->num) {
4428 return ERR_PTR(-EINVAL);
4431 return hw_data->hws[idx];
4436 * of_clk_add_provider() - Register a clock provider for a node
4453 return -ENOMEM;
4455 cp->node = of_node_get(np);
4456 cp->data = data;
4457 cp->get = clk_src_get;
4460 list_add(&cp->link, &of_clk_providers);
4475 * of_clk_add_hw_provider() - Register a clock provider for a node
4490 return -ENOMEM;
4492 cp->node = of_node_get(np);
4493 cp->data = data;
4494 cp->get_hw = get;
4497 list_add(&cp->link, &of_clk_providers);
4518 * for cases like MFD sub-devices where the child device driver wants to use
4519 * devm_*() APIs but not list the device in DT as a sub-node.
4525 np = dev->of_node;
4526 parent_np = dev->parent ? dev->parent->of_node : NULL;
4528 if (!of_find_property(np, "#clock-cells", NULL))
4529 if (of_find_property(parent_np, "#clock-cells", NULL))
4536 * devm_of_clk_add_hw_provider() - Managed clk provider node registration
4542 * node or if the device node lacks of clock provider information (#clock-cells)
4544 * has the #clock-cells then it is used in registration. Provider is
4560 return -ENOMEM;
4576 * of_clk_del_provider() - Remove a previously registered clock provider
4585 if (cp->node == np) {
4586 list_del(&cp->link);
4587 of_node_put(cp->node);
4607 * devm_of_clk_del_provider() - Remove clock provider registered using devm
4623 * of_parse_clkspec() - Parse a DT clock specifier for a given device node
4629 * Parses a device node's "clocks" and "clock-names" properties to find the
4632 * parsing error. The @index argument is ignored if @name is non-NULL.
4636 * phandle1: clock-controller@1 {
4637 * #clock-cells = <2>;
4640 * phandle2: clock-controller@2 {
4641 * #clock-cells = <1>;
4644 * clock-consumer@3 {
4645 * clocks = <&phandle1 1 2 &phandle2 3>;
4646 * clock-names = "name1", "name2";
4649 * To get a device_node for `clock-controller@2' node you may call this
4652 * of_parse_clkspec(clock-consumer@3, -1, "name2", &args);
4653 * of_parse_clkspec(clock-consumer@3, 1, NULL, &args);
4654 * of_parse_clkspec(clock-consumer@3, 1, "name2", &args);
4656 * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT
4657 * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in
4658 * the "clock-names" property of @np.
4663 int ret = -ENOENT;
4668 * For named clocks, first look up the name in the
4669 * "clock-names" property. If it cannot be found, then index
4671 * return -EINVAL.
4674 index = of_property_match_string(np, "clock-names", name);
4675 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells",
4684 * has a "clock-ranges" property, then we can try one of its
4685 * clocks.
4687 np = np->parent;
4688 if (np && !of_get_property(np, "clock-ranges", NULL))
4702 if (provider->get_hw)
4703 return provider->get_hw(clkspec, provider->data);
4705 clk = provider->get(clkspec, provider->data);
4715 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
4718 return ERR_PTR(-EINVAL);
4722 if (provider->node == clkspec->np) {
4734 * of_clk_get_from_provider() - Lookup a clock from a clock provider
4777 return __of_clk_get(np, index, np->full_name, NULL);
4782 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
4786 * This function parses the clocks and clock-names properties,
4793 return ERR_PTR(-ENOENT);
4795 return __of_clk_get(np, 0, np->full_name, name);
4800 * of_clk_get_parent_count() - Count the number of clocks a device node has
4803 * Returns: The number of clocks that are possible parents of this node
4809 count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
4828 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
4837 * specified into an array offset for the clock-output-names property.
4839 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
4846 /* We went off the end of 'clock-indices' without finding it */
4850 if (of_property_read_string_index(clkspec.np, "clock-output-names",
4857 * the clock as long as #clock-cells = 0.
4862 clk_name = clkspec.np->name;
4878 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
4924 if (PTR_ERR(clk) == -EPROBE_DEFER)
4940 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
4943 * @flags: pointer to top-level framework flags
4945 * Detects if the clock-critical property exists and, if so, sets the
4949 * bindings, such as the one-clock-per-node style that are outdated.
4965 return -EINVAL;
4967 of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
4975 * of_clk_init() - Scan and init clock providers from the DT
4994 /* First prepare the list of the clocks providers */
5005 list_del(&clk_provider->node);
5006 of_node_put(clk_provider->np);
5013 parent->clk_init_cb = match->data;
5014 parent->np = of_node_get(np);
5015 list_add_tail(&parent->node, &clk_provider_list);
5022 if (force || parent_ready(clk_provider->np)) {
5025 of_node_set_flag(clk_provider->np,
5028 clk_provider->clk_init_cb(clk_provider->np);
5029 of_clk_set_defaults(clk_provider->np, true);
5031 list_del(&clk_provider->node);
5032 of_node_put(clk_provider->np);