Lines Matching +full:dp +full:- +full:bridge
1 // SPDX-License-Identifier: GPL-2.0
110 * struct ti_sn_bridge - Platform data for ti-sn65dsi86 driver.
114 * @bridge: Our bridge.
121 * @enable_gpio: The GPIO we toggle to enable the bridge.
125 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
129 * serves double-duty of keeping track of the direction and
135 * each other's read-modify-write.
141 struct drm_bridge bridge; member
180 regmap_write(pdata->regmap, reg, val & 0xFF); in ti_sn_bridge_write_u16()
181 regmap_write(pdata->regmap, reg + 1, val >> 8); in ti_sn_bridge_write_u16()
189 ret = regulator_bulk_enable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn_bridge_resume()
195 gpiod_set_value(pdata->enable_gpio, 1); in ti_sn_bridge_resume()
205 gpiod_set_value(pdata->enable_gpio, 0); in ti_sn_bridge_suspend()
207 ret = regulator_bulk_disable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn_bridge_suspend()
222 struct ti_sn_bridge *pdata = s->private; in status_show()
227 pm_runtime_get_sync(pdata->dev); in status_show()
231 regmap_read(pdata->regmap, reg, &val); in status_show()
235 pm_runtime_put(pdata->dev); in status_show()
244 pdata->debugfs = debugfs_create_dir(dev_name(pdata->dev), NULL); in ti_sn_debugfs_init()
246 debugfs_create_file("status", 0600, pdata->debugfs, pdata, in ti_sn_debugfs_init()
252 debugfs_remove_recursive(pdata->debugfs); in ti_sn_debugfs_remove()
253 pdata->debugfs = NULL; in ti_sn_debugfs_remove()
267 return drm_panel_get_modes(pdata->panel, connector); in ti_sn_bridge_connector_get_modes()
275 if (mode->clock > 594000) in ti_sn_bridge_connector_mode_valid()
306 static struct ti_sn_bridge *bridge_to_ti_sn_bridge(struct drm_bridge *bridge) in bridge_to_ti_sn_bridge() argument
308 return container_of(bridge, struct ti_sn_bridge, bridge); in bridge_to_ti_sn_bridge()
319 pdata->supplies[i].supply = ti_sn_bridge_supply_names[i]; in ti_sn_bridge_parse_regulators()
321 return devm_regulator_bulk_get(pdata->dev, SN_REGULATOR_SUPPLY_NUM, in ti_sn_bridge_parse_regulators()
322 pdata->supplies); in ti_sn_bridge_parse_regulators()
325 static int ti_sn_bridge_attach(struct drm_bridge *bridge, in ti_sn_bridge_attach() argument
329 struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge); in ti_sn_bridge_attach()
338 DRM_ERROR("Fix bridge driver to make connector optional!"); in ti_sn_bridge_attach()
339 return -EINVAL; in ti_sn_bridge_attach()
342 ret = drm_connector_init(bridge->dev, &pdata->connector, in ti_sn_bridge_attach()
350 drm_connector_helper_add(&pdata->connector, in ti_sn_bridge_attach()
352 drm_connector_attach_encoder(&pdata->connector, bridge->encoder); in ti_sn_bridge_attach()
356 * to be done in bridge probe. But some existing DSI host drivers will in ti_sn_bridge_attach()
358 * bridge/panel list, before completing their probe. So if we do the in ti_sn_bridge_attach()
359 * dsi dev registration part in bridge probe, before populating in in ti_sn_bridge_attach()
360 * the global bridge list, then it will cause deadlock as dsi host probe in ti_sn_bridge_attach()
361 * will never complete, neither our bridge probe. So keeping it here in ti_sn_bridge_attach()
363 * is fixed we can move the below code to bridge probe safely. in ti_sn_bridge_attach()
365 host = of_find_mipi_dsi_host_by_node(pdata->host_node); in ti_sn_bridge_attach()
368 ret = -ENODEV; in ti_sn_bridge_attach()
380 dsi->lanes = 4; in ti_sn_bridge_attach()
381 dsi->format = MIPI_DSI_FMT_RGB888; in ti_sn_bridge_attach()
382 dsi->mode_flags = MIPI_DSI_MODE_VIDEO; in ti_sn_bridge_attach()
385 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_attach()
386 regmap_read(pdata->regmap, SN_DPPLL_SRC_REG, &val); in ti_sn_bridge_attach()
387 pm_runtime_put(pdata->dev); in ti_sn_bridge_attach()
389 dsi->mode_flags |= MIPI_DSI_CLOCK_NON_CONTINUOUS; in ti_sn_bridge_attach()
396 pdata->dsi = dsi; in ti_sn_bridge_attach()
403 drm_connector_cleanup(&pdata->connector); in ti_sn_bridge_attach()
407 static void ti_sn_bridge_disable(struct drm_bridge *bridge) in ti_sn_bridge_disable() argument
409 struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge); in ti_sn_bridge_disable()
411 drm_panel_disable(pdata->panel); in ti_sn_bridge_disable()
414 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, 0); in ti_sn_bridge_disable()
416 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0); in ti_sn_bridge_disable()
417 /* disable DP PLL */ in ti_sn_bridge_disable()
418 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); in ti_sn_bridge_disable()
420 drm_panel_unprepare(pdata->panel); in ti_sn_bridge_disable()
427 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_get_dsi_freq()
429 bit_rate_khz = mode->clock * in ti_sn_bridge_get_dsi_freq()
430 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); in ti_sn_bridge_get_dsi_freq()
431 clk_freq_khz = bit_rate_khz / (pdata->dsi->lanes * 2); in ti_sn_bridge_get_dsi_freq()
436 /* clk frequencies supported by bridge in Hz in case derived from REFCLK pin */
445 /* clk frequencies supported by bridge in Hz in case derived from DACP/N pin */
461 if (pdata->refclk) { in ti_sn_bridge_set_refclk_freq()
462 refclk_rate = clk_get_rate(pdata->refclk); in ti_sn_bridge_set_refclk_freq()
465 clk_prepare_enable(pdata->refclk); in ti_sn_bridge_set_refclk_freq()
477 regmap_update_bits(pdata->regmap, SN_DPPLL_SRC_REG, REFCLK_FREQ_MASK, in ti_sn_bridge_set_refclk_freq()
486 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_set_dsi_rate()
489 bit_rate_mhz = (mode->clock / 1000) * in ti_sn_bridge_set_dsi_rate()
490 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); in ti_sn_bridge_set_dsi_rate()
491 clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2); in ti_sn_bridge_set_dsi_rate()
495 (((clk_freq_mhz - MIN_DSI_CLK_FREQ_MHZ) / 5) & 0xFF); in ti_sn_bridge_set_dsi_rate()
496 regmap_write(pdata->regmap, SN_DSIA_CLK_FREQ_REG, val); in ti_sn_bridge_set_dsi_rate()
501 if (pdata->connector.display_info.bpc <= 6) in ti_sn_bridge_get_bpp()
509 * LUT values corresponds to dp data rate supported
510 * by the bridge in Mbps unit.
521 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_calc_min_dp_rate_idx()
524 bit_rate_khz = mode->clock * ti_sn_bridge_get_bpp(pdata); in ti_sn_bridge_calc_min_dp_rate_idx()
526 /* Calculate minimum DP data rate, taking 80% as per DP spec */ in ti_sn_bridge_calc_min_dp_rate_idx()
528 1000 * pdata->dp_lanes * DP_CLK_FUDGE_DEN); in ti_sn_bridge_calc_min_dp_rate_idx()
530 for (i = 1; i < ARRAY_SIZE(ti_sn_bridge_dp_rate_lut) - 1; i++) in ti_sn_bridge_calc_min_dp_rate_idx()
546 ret = drm_dp_dpcd_readb(&pdata->aux, DP_EDP_DPCD_REV, &dpcd_val); in ti_sn_bridge_read_valid_rates()
548 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
557 ret = drm_dp_dpcd_read(&pdata->aux, DP_SUPPORTED_LINK_RATES, in ti_sn_bridge_read_valid_rates()
561 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
587 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
592 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LINK_RATE, &dpcd_val); in ti_sn_bridge_read_valid_rates()
594 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
602 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
621 &pdata->bridge.encoder->crtc->state->adjusted_mode; in ti_sn_bridge_set_video_timings()
624 if (mode->flags & DRM_MODE_FLAG_PHSYNC) in ti_sn_bridge_set_video_timings()
626 if (mode->flags & DRM_MODE_FLAG_PVSYNC) in ti_sn_bridge_set_video_timings()
630 mode->hdisplay); in ti_sn_bridge_set_video_timings()
632 mode->vdisplay); in ti_sn_bridge_set_video_timings()
633 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG, in ti_sn_bridge_set_video_timings()
634 (mode->hsync_end - mode->hsync_start) & 0xFF); in ti_sn_bridge_set_video_timings()
635 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG, in ti_sn_bridge_set_video_timings()
636 (((mode->hsync_end - mode->hsync_start) >> 8) & 0x7F) | in ti_sn_bridge_set_video_timings()
638 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG, in ti_sn_bridge_set_video_timings()
639 (mode->vsync_end - mode->vsync_start) & 0xFF); in ti_sn_bridge_set_video_timings()
640 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG, in ti_sn_bridge_set_video_timings()
641 (((mode->vsync_end - mode->vsync_start) >> 8) & 0x7F) | in ti_sn_bridge_set_video_timings()
644 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_BACK_PORCH_REG, in ti_sn_bridge_set_video_timings()
645 (mode->htotal - mode->hsync_end) & 0xFF); in ti_sn_bridge_set_video_timings()
646 regmap_write(pdata->regmap, SN_CHA_VERTICAL_BACK_PORCH_REG, in ti_sn_bridge_set_video_timings()
647 (mode->vtotal - mode->vsync_end) & 0xFF); in ti_sn_bridge_set_video_timings()
649 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_FRONT_PORCH_REG, in ti_sn_bridge_set_video_timings()
650 (mode->hsync_start - mode->hdisplay) & 0xFF); in ti_sn_bridge_set_video_timings()
651 regmap_write(pdata->regmap, SN_CHA_VERTICAL_FRONT_PORCH_REG, in ti_sn_bridge_set_video_timings()
652 (mode->vsync_start - mode->vdisplay) & 0xFF); in ti_sn_bridge_set_video_timings()
662 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LANE_COUNT, &data); in ti_sn_get_max_lanes()
664 DRM_DEV_ERROR(pdata->dev, in ti_sn_get_max_lanes()
678 /* set dp clk frequency value */ in ti_sn_link_training()
679 regmap_update_bits(pdata->regmap, SN_DATARATE_CONFIG_REG, in ti_sn_link_training()
682 /* enable DP PLL */ in ti_sn_link_training()
683 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 1); in ti_sn_link_training()
685 ret = regmap_read_poll_timeout(pdata->regmap, SN_DPPLL_SRC_REG, val, in ti_sn_link_training()
694 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0x0A); in ti_sn_link_training()
695 ret = regmap_read_poll_timeout(pdata->regmap, SN_ML_TX_MODE_REG, val, in ti_sn_link_training()
703 ret = -EIO; in ti_sn_link_training()
709 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); in ti_sn_link_training()
714 static void ti_sn_bridge_enable(struct drm_bridge *bridge) in ti_sn_bridge_enable() argument
716 struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge); in ti_sn_bridge_enable()
718 const char *last_err_str = "No supported DP rate"; in ti_sn_bridge_enable()
721 int ret = -EINVAL; in ti_sn_bridge_enable()
725 pdata->dp_lanes = min(pdata->dp_lanes, max_dp_lanes); in ti_sn_bridge_enable()
728 val = CHA_DSI_LANES(SN_MAX_DP_LANES - pdata->dsi->lanes); in ti_sn_bridge_enable()
729 regmap_update_bits(pdata->regmap, SN_DSI_LANES_REG, in ti_sn_bridge_enable()
732 regmap_write(pdata->regmap, SN_LN_ASSIGN_REG, pdata->ln_assign); in ti_sn_bridge_enable()
733 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, LN_POLRS_MASK, in ti_sn_bridge_enable()
734 pdata->ln_polrs << LN_POLRS_OFFSET); in ti_sn_bridge_enable()
745 drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET, in ti_sn_bridge_enable()
748 /* Set the DP output format (18 bpp or 24 bpp) */ in ti_sn_bridge_enable()
750 regmap_update_bits(pdata->regmap, SN_DATA_FORMAT_REG, BPP_18_RGB, val); in ti_sn_bridge_enable()
752 /* DP lane config */ in ti_sn_bridge_enable()
753 val = DP_NUM_LANES(min(pdata->dp_lanes, 3)); in ti_sn_bridge_enable()
754 regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK, in ti_sn_bridge_enable()
771 DRM_DEV_ERROR(pdata->dev, "%s (%d)\n", last_err_str, ret); in ti_sn_bridge_enable()
779 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, in ti_sn_bridge_enable()
782 drm_panel_enable(pdata->panel); in ti_sn_bridge_enable()
785 static void ti_sn_bridge_pre_enable(struct drm_bridge *bridge) in ti_sn_bridge_pre_enable() argument
787 struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge); in ti_sn_bridge_pre_enable()
789 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_pre_enable()
791 /* configure bridge ref_clk */ in ti_sn_bridge_pre_enable()
795 * HPD on this bridge chip is a bit useless. This is an eDP bridge in ti_sn_bridge_pre_enable()
797 * the panel is done powering up. ...but the bridge chip debounces in ti_sn_bridge_pre_enable()
799 * voltage, and temperate--I measured it at about 200 ms). One in ti_sn_bridge_pre_enable()
810 regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, HPD_DISABLE, in ti_sn_bridge_pre_enable()
813 drm_panel_prepare(pdata->panel); in ti_sn_bridge_pre_enable()
816 static void ti_sn_bridge_post_disable(struct drm_bridge *bridge) in ti_sn_bridge_post_disable() argument
818 struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge); in ti_sn_bridge_post_disable()
820 if (pdata->refclk) in ti_sn_bridge_post_disable()
821 clk_disable_unprepare(pdata->refclk); in ti_sn_bridge_post_disable()
823 pm_runtime_put_sync(pdata->dev); in ti_sn_bridge_post_disable()
843 u32 request = msg->request & ~DP_AUX_I2C_MOT; in ti_sn_aux_transfer()
844 u32 request_val = AUX_CMD_REQ(msg->request); in ti_sn_aux_transfer()
845 u8 *buf = (u8 *)msg->buffer; in ti_sn_aux_transfer()
849 if (msg->size > SN_AUX_MAX_PAYLOAD_BYTES) in ti_sn_aux_transfer()
850 return -EINVAL; in ti_sn_aux_transfer()
857 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val); in ti_sn_aux_transfer()
860 return -EINVAL; in ti_sn_aux_transfer()
863 regmap_write(pdata->regmap, SN_AUX_ADDR_19_16_REG, in ti_sn_aux_transfer()
864 (msg->address >> 16) & 0xF); in ti_sn_aux_transfer()
865 regmap_write(pdata->regmap, SN_AUX_ADDR_15_8_REG, in ti_sn_aux_transfer()
866 (msg->address >> 8) & 0xFF); in ti_sn_aux_transfer()
867 regmap_write(pdata->regmap, SN_AUX_ADDR_7_0_REG, msg->address & 0xFF); in ti_sn_aux_transfer()
869 regmap_write(pdata->regmap, SN_AUX_LENGTH_REG, msg->size); in ti_sn_aux_transfer()
872 for (i = 0; i < msg->size; i++) in ti_sn_aux_transfer()
873 regmap_write(pdata->regmap, SN_AUX_WDATA_REG(i), in ti_sn_aux_transfer()
878 regmap_write(pdata->regmap, SN_AUX_CMD_STATUS_REG, in ti_sn_aux_transfer()
883 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val | AUX_CMD_SEND); in ti_sn_aux_transfer()
885 ret = regmap_read_poll_timeout(pdata->regmap, SN_AUX_CMD_REG, val, in ti_sn_aux_transfer()
891 ret = regmap_read(pdata->regmap, SN_AUX_CMD_STATUS_REG, &val); in ti_sn_aux_transfer()
897 return -ENXIO; in ti_sn_aux_transfer()
900 return msg->size; in ti_sn_aux_transfer()
902 for (i = 0; i < msg->size; i++) { in ti_sn_aux_transfer()
904 ret = regmap_read(pdata->regmap, SN_AUX_RDATA_REG(i), in ti_sn_aux_transfer()
913 return msg->size; in ti_sn_aux_transfer()
918 struct device_node *np = pdata->dev->of_node; in ti_sn_bridge_parse_dsi_host()
920 pdata->host_node = of_graph_get_remote_node(np, 0, 0); in ti_sn_bridge_parse_dsi_host()
922 if (!pdata->host_node) { in ti_sn_bridge_parse_dsi_host()
924 return -ENODEV; in ti_sn_bridge_parse_dsi_host()
936 if (WARN_ON(gpiospec->args_count < chip->of_gpio_n_cells)) in tn_sn_bridge_of_xlate()
937 return -EINVAL; in tn_sn_bridge_of_xlate()
939 if (gpiospec->args[0] > chip->ngpio || gpiospec->args[0] < 1) in tn_sn_bridge_of_xlate()
940 return -EINVAL; in tn_sn_bridge_of_xlate()
943 *flags = gpiospec->args[1]; in tn_sn_bridge_of_xlate()
945 return gpiospec->args[0] - SN_GPIO_PHYSICAL_OFFSET; in tn_sn_bridge_of_xlate()
959 return test_bit(offset, pdata->gchip_output) ? in ti_sn_bridge_gpio_get_direction()
970 * When the pin is an input we don't forcibly keep the bridge in ti_sn_bridge_gpio_get()
971 * powered--we just power it on to read the pin. NOTE: part of in ti_sn_bridge_gpio_get()
972 * the reason this works is that the bridge defaults (when in ti_sn_bridge_gpio_get()
977 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_gpio_get()
978 ret = regmap_read(pdata->regmap, SN_GPIO_IO_REG, &val); in ti_sn_bridge_gpio_get()
979 pm_runtime_put(pdata->dev); in ti_sn_bridge_gpio_get()
993 if (!test_bit(offset, pdata->gchip_output)) { in ti_sn_bridge_gpio_set()
994 dev_err(pdata->dev, "Ignoring GPIO set while input\n"); in ti_sn_bridge_gpio_set()
999 ret = regmap_update_bits(pdata->regmap, SN_GPIO_IO_REG, in ti_sn_bridge_gpio_set()
1003 dev_warn(pdata->dev, in ti_sn_bridge_gpio_set()
1004 "Failed to set bridge GPIO %u: %d\n", offset, ret); in ti_sn_bridge_gpio_set()
1014 if (!test_and_clear_bit(offset, pdata->gchip_output)) in ti_sn_bridge_gpio_direction_input()
1017 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_bridge_gpio_direction_input()
1021 set_bit(offset, pdata->gchip_output); in ti_sn_bridge_gpio_direction_input()
1030 pm_runtime_put(pdata->dev); in ti_sn_bridge_gpio_direction_input()
1042 if (test_and_set_bit(offset, pdata->gchip_output)) in ti_sn_bridge_gpio_direction_output()
1045 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_gpio_direction_output()
1051 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_bridge_gpio_direction_output()
1055 clear_bit(offset, pdata->gchip_output); in ti_sn_bridge_gpio_direction_output()
1056 pm_runtime_put(pdata->dev); in ti_sn_bridge_gpio_direction_output()
1077 if (!of_property_read_bool(pdata->dev->of_node, "gpio-controller")) in ti_sn_setup_gpio_controller()
1080 pdata->gchip.label = dev_name(pdata->dev); in ti_sn_setup_gpio_controller()
1081 pdata->gchip.parent = pdata->dev; in ti_sn_setup_gpio_controller()
1082 pdata->gchip.owner = THIS_MODULE; in ti_sn_setup_gpio_controller()
1083 pdata->gchip.of_xlate = tn_sn_bridge_of_xlate; in ti_sn_setup_gpio_controller()
1084 pdata->gchip.of_gpio_n_cells = 2; in ti_sn_setup_gpio_controller()
1085 pdata->gchip.free = ti_sn_bridge_gpio_free; in ti_sn_setup_gpio_controller()
1086 pdata->gchip.get_direction = ti_sn_bridge_gpio_get_direction; in ti_sn_setup_gpio_controller()
1087 pdata->gchip.direction_input = ti_sn_bridge_gpio_direction_input; in ti_sn_setup_gpio_controller()
1088 pdata->gchip.direction_output = ti_sn_bridge_gpio_direction_output; in ti_sn_setup_gpio_controller()
1089 pdata->gchip.get = ti_sn_bridge_gpio_get; in ti_sn_setup_gpio_controller()
1090 pdata->gchip.set = ti_sn_bridge_gpio_set; in ti_sn_setup_gpio_controller()
1091 pdata->gchip.can_sleep = true; in ti_sn_setup_gpio_controller()
1092 pdata->gchip.names = ti_sn_bridge_gpio_names; in ti_sn_setup_gpio_controller()
1093 pdata->gchip.ngpio = SN_NUM_GPIOS; in ti_sn_setup_gpio_controller()
1094 pdata->gchip.base = -1; in ti_sn_setup_gpio_controller()
1095 ret = devm_gpiochip_add_data(pdata->dev, &pdata->gchip, pdata); in ti_sn_setup_gpio_controller()
1097 dev_err(pdata->dev, "can't add gpio chip\n"); in ti_sn_setup_gpio_controller()
1126 * data-lanes but not lane-polarities but not vice versa. in ti_sn_bridge_parse_lanes()
1132 endpoint = of_graph_get_endpoint_by_regs(np, 1, -1); in ti_sn_bridge_parse_lanes()
1133 dp_lanes = of_property_count_u32_elems(endpoint, "data-lanes"); in ti_sn_bridge_parse_lanes()
1135 of_property_read_u32_array(endpoint, "data-lanes", in ti_sn_bridge_parse_lanes()
1137 of_property_read_u32_array(endpoint, "lane-polarities", in ti_sn_bridge_parse_lanes()
1146 * data-lanes had fewer elements so that we nicely initialize in ti_sn_bridge_parse_lanes()
1149 for (i = SN_MAX_DP_LANES - 1; i >= 0; i--) { in ti_sn_bridge_parse_lanes()
1155 pdata->dp_lanes = dp_lanes; in ti_sn_bridge_parse_lanes()
1156 pdata->ln_assign = ln_assign; in ti_sn_bridge_parse_lanes()
1157 pdata->ln_polrs = ln_polrs; in ti_sn_bridge_parse_lanes()
1166 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { in ti_sn_bridge_probe()
1168 return -ENODEV; in ti_sn_bridge_probe()
1171 pdata = devm_kzalloc(&client->dev, sizeof(struct ti_sn_bridge), in ti_sn_bridge_probe()
1174 return -ENOMEM; in ti_sn_bridge_probe()
1176 pdata->regmap = devm_regmap_init_i2c(client, in ti_sn_bridge_probe()
1178 if (IS_ERR(pdata->regmap)) { in ti_sn_bridge_probe()
1180 return PTR_ERR(pdata->regmap); in ti_sn_bridge_probe()
1183 pdata->dev = &client->dev; in ti_sn_bridge_probe()
1185 ret = drm_of_find_panel_or_bridge(pdata->dev->of_node, 1, 0, in ti_sn_bridge_probe()
1186 &pdata->panel, NULL); in ti_sn_bridge_probe()
1192 dev_set_drvdata(&client->dev, pdata); in ti_sn_bridge_probe()
1194 pdata->enable_gpio = devm_gpiod_get(pdata->dev, "enable", in ti_sn_bridge_probe()
1196 if (IS_ERR(pdata->enable_gpio)) { in ti_sn_bridge_probe()
1198 ret = PTR_ERR(pdata->enable_gpio); in ti_sn_bridge_probe()
1202 ti_sn_bridge_parse_lanes(pdata, client->dev.of_node); in ti_sn_bridge_probe()
1210 pdata->refclk = devm_clk_get(pdata->dev, "refclk"); in ti_sn_bridge_probe()
1211 if (IS_ERR(pdata->refclk)) { in ti_sn_bridge_probe()
1212 ret = PTR_ERR(pdata->refclk); in ti_sn_bridge_probe()
1213 if (ret == -EPROBE_DEFER) in ti_sn_bridge_probe()
1216 pdata->refclk = NULL; in ti_sn_bridge_probe()
1223 pm_runtime_enable(pdata->dev); in ti_sn_bridge_probe()
1227 pm_runtime_disable(pdata->dev); in ti_sn_bridge_probe()
1233 pdata->aux.name = "ti-sn65dsi86-aux"; in ti_sn_bridge_probe()
1234 pdata->aux.dev = pdata->dev; in ti_sn_bridge_probe()
1235 pdata->aux.transfer = ti_sn_aux_transfer; in ti_sn_bridge_probe()
1236 drm_dp_aux_register(&pdata->aux); in ti_sn_bridge_probe()
1238 pdata->bridge.funcs = &ti_sn_bridge_funcs; in ti_sn_bridge_probe()
1239 pdata->bridge.of_node = client->dev.of_node; in ti_sn_bridge_probe()
1241 drm_bridge_add(&pdata->bridge); in ti_sn_bridge_probe()
1253 return -EINVAL; in ti_sn_bridge_remove()
1257 of_node_put(pdata->host_node); in ti_sn_bridge_remove()
1259 pm_runtime_disable(pdata->dev); in ti_sn_bridge_remove()
1261 if (pdata->dsi) { in ti_sn_bridge_remove()
1262 mipi_dsi_detach(pdata->dsi); in ti_sn_bridge_remove()
1263 mipi_dsi_device_unregister(pdata->dsi); in ti_sn_bridge_remove()
1266 drm_bridge_remove(&pdata->bridge); in ti_sn_bridge_remove()
1296 MODULE_DESCRIPTION("sn65dsi86 DSI to eDP bridge driver");