Lines Matching +full:adc +full:- +full:clk
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * exynos_adc.c - Support for ADC in EXYNOS SoCs
5 * 8 ~ 10 channel, 10/12-bit ADC
18 #include <linux/clk.h>
33 #include <linux/platform_data/touchscreen-s3c2410.h>
46 /* S3C2410 ADC registers definitions */
63 /* Bit definitions for S3C2410 ADC */
126 struct clk *clk; member
127 struct clk *sclk;
145 * a wait-callback is used to wait for the conversion result,
168 if (info->data->needs_sclk) in exynos_adc_unprepare_clk()
169 clk_unprepare(info->sclk); in exynos_adc_unprepare_clk()
170 clk_unprepare(info->clk); in exynos_adc_unprepare_clk()
177 ret = clk_prepare(info->clk); in exynos_adc_prepare_clk()
179 dev_err(info->dev, "failed preparing adc clock: %d\n", ret); in exynos_adc_prepare_clk()
183 if (info->data->needs_sclk) { in exynos_adc_prepare_clk()
184 ret = clk_prepare(info->sclk); in exynos_adc_prepare_clk()
186 clk_unprepare(info->clk); in exynos_adc_prepare_clk()
187 dev_err(info->dev, in exynos_adc_prepare_clk()
198 if (info->data->needs_sclk) in exynos_adc_disable_clk()
199 clk_disable(info->sclk); in exynos_adc_disable_clk()
200 clk_disable(info->clk); in exynos_adc_disable_clk()
207 ret = clk_enable(info->clk); in exynos_adc_enable_clk()
209 dev_err(info->dev, "failed enabling adc clock: %d\n", ret); in exynos_adc_enable_clk()
213 if (info->data->needs_sclk) { in exynos_adc_enable_clk()
214 ret = clk_enable(info->sclk); in exynos_adc_enable_clk()
216 clk_disable(info->clk); in exynos_adc_enable_clk()
217 dev_err(info->dev, in exynos_adc_enable_clk()
230 if (info->data->needs_adc_phy) in exynos_adc_v1_init_hw()
231 regmap_write(info->pmu_map, info->data->phy_offset, 1); in exynos_adc_v1_init_hw()
236 /* Enable 12-bit ADC resolution */ in exynos_adc_v1_init_hw()
238 writel(con1, ADC_V1_CON(info->regs)); in exynos_adc_v1_init_hw()
241 writel(info->delay, ADC_V1_DLY(info->regs)); in exynos_adc_v1_init_hw()
248 if (info->data->needs_adc_phy) in exynos_adc_v1_exit_hw()
249 regmap_write(info->pmu_map, info->data->phy_offset, 0); in exynos_adc_v1_exit_hw()
251 con = readl(ADC_V1_CON(info->regs)); in exynos_adc_v1_exit_hw()
253 writel(con, ADC_V1_CON(info->regs)); in exynos_adc_v1_exit_hw()
258 writel(1, ADC_V1_INTCLR(info->regs)); in exynos_adc_v1_clear_irq()
266 writel(addr, ADC_V1_MUX(info->regs)); in exynos_adc_v1_start_conv()
268 con1 = readl(ADC_V1_CON(info->regs)); in exynos_adc_v1_start_conv()
269 writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs)); in exynos_adc_v1_start_conv()
275 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
287 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
299 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
312 /* Enable 12 bit ADC resolution */ in exynos_adc_s3c2416_start_conv()
313 con1 = readl(ADC_V1_CON(info->regs)); in exynos_adc_s3c2416_start_conv()
315 writel(con1, ADC_V1_CON(info->regs)); in exynos_adc_s3c2416_start_conv()
318 writel(addr, ADC_S3C2410_MUX(info->regs)); in exynos_adc_s3c2416_start_conv()
320 con1 = readl(ADC_V1_CON(info->regs)); in exynos_adc_s3c2416_start_conv()
321 writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs)); in exynos_adc_s3c2416_start_conv()
326 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
339 writel(addr, ADC_S3C2410_MUX(info->regs)); in exynos_adc_s3c2443_start_conv()
341 con1 = readl(ADC_V1_CON(info->regs)); in exynos_adc_s3c2443_start_conv()
342 writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs)); in exynos_adc_s3c2443_start_conv()
347 .mask = ADC_S3C2410_DATX_MASK, /* 10 bit ADC resolution */
359 con1 = readl(ADC_V1_CON(info->regs)); in exynos_adc_s3c64xx_start_conv()
362 writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs)); in exynos_adc_s3c64xx_start_conv()
367 .mask = ADC_S3C2410_DATX_MASK, /* 10 bit ADC resolution */
376 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
388 if (info->data->needs_adc_phy) in exynos_adc_v2_init_hw()
389 regmap_write(info->pmu_map, info->data->phy_offset, 1); in exynos_adc_v2_init_hw()
392 writel(con1, ADC_V2_CON1(info->regs)); in exynos_adc_v2_init_hw()
396 writel(con2, ADC_V2_CON2(info->regs)); in exynos_adc_v2_init_hw()
399 writel(1, ADC_V2_INT_EN(info->regs)); in exynos_adc_v2_init_hw()
406 if (info->data->needs_adc_phy) in exynos_adc_v2_exit_hw()
407 regmap_write(info->pmu_map, info->data->phy_offset, 0); in exynos_adc_v2_exit_hw()
409 con = readl(ADC_V2_CON1(info->regs)); in exynos_adc_v2_exit_hw()
411 writel(con, ADC_V2_CON1(info->regs)); in exynos_adc_v2_exit_hw()
416 writel(1, ADC_V2_INT_ST(info->regs)); in exynos_adc_v2_clear_irq()
424 con2 = readl(ADC_V2_CON2(info->regs)); in exynos_adc_v2_start_conv()
427 writel(con2, ADC_V2_CON2(info->regs)); in exynos_adc_v2_start_conv()
429 con1 = readl(ADC_V2_CON1(info->regs)); in exynos_adc_v2_start_conv()
430 writel(con1 | ADC_CON_EN_START, ADC_V2_CON1(info->regs)); in exynos_adc_v2_start_conv()
435 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
447 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
463 writel(con1, ADC_V2_CON1(info->regs)); in exynos_adc_exynos7_init_hw()
465 con2 = readl(ADC_V2_CON2(info->regs)); in exynos_adc_exynos7_init_hw()
468 writel(con2, ADC_V2_CON2(info->regs)); in exynos_adc_exynos7_init_hw()
471 writel(1, ADC_V2_INT_EN(info->regs)); in exynos_adc_exynos7_init_hw()
476 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
486 .compatible = "samsung,s3c2410-adc",
489 .compatible = "samsung,s3c2416-adc",
492 .compatible = "samsung,s3c2440-adc",
495 .compatible = "samsung,s3c2443-adc",
498 .compatible = "samsung,s3c6410-adc",
501 .compatible = "samsung,s5pv210-adc",
504 .compatible = "samsung,exynos4212-adc",
507 .compatible = "samsung,exynos-adc-v1",
510 .compatible = "samsung,exynos-adc-v2",
513 .compatible = "samsung,exynos3250-adc",
516 .compatible = "samsung,exynos7-adc",
527 match = of_match_node(exynos_adc_match, pdev->dev.of_node); in exynos_adc_get_data()
528 return (struct exynos_adc_data *)match->data; in exynos_adc_get_data()
542 ret = regulator_get_voltage(info->vdd); in exynos_read_raw()
548 *val2 = info->data->mask; in exynos_read_raw()
552 return -EINVAL; in exynos_read_raw()
555 mutex_lock(&info->lock); in exynos_read_raw()
556 reinit_completion(&info->completion); in exynos_read_raw()
559 if (info->data->start_conv) in exynos_read_raw()
560 info->data->start_conv(info, chan->address); in exynos_read_raw()
562 timeout = wait_for_completion_timeout(&info->completion, in exynos_read_raw()
565 dev_warn(&indio_dev->dev, "Conversion timed out! Resetting\n"); in exynos_read_raw()
566 if (info->data->init_hw) in exynos_read_raw()
567 info->data->init_hw(info); in exynos_read_raw()
568 ret = -ETIMEDOUT; in exynos_read_raw()
570 *val = info->value; in exynos_read_raw()
575 mutex_unlock(&info->lock); in exynos_read_raw()
586 mutex_lock(&info->lock); in exynos_read_s3c64xx_ts()
587 info->read_ts = true; in exynos_read_s3c64xx_ts()
589 reinit_completion(&info->completion); in exynos_read_s3c64xx_ts()
592 ADC_V1_TSC(info->regs)); in exynos_read_s3c64xx_ts()
595 info->data->start_conv(info, ADC_S3C2410_MUX_TS); in exynos_read_s3c64xx_ts()
597 timeout = wait_for_completion_timeout(&info->completion, in exynos_read_s3c64xx_ts()
600 dev_warn(&indio_dev->dev, "Conversion timed out! Resetting\n"); in exynos_read_s3c64xx_ts()
601 if (info->data->init_hw) in exynos_read_s3c64xx_ts()
602 info->data->init_hw(info); in exynos_read_s3c64xx_ts()
603 ret = -ETIMEDOUT; in exynos_read_s3c64xx_ts()
605 *x = info->ts_x; in exynos_read_s3c64xx_ts()
606 *y = info->ts_y; in exynos_read_s3c64xx_ts()
610 info->read_ts = false; in exynos_read_s3c64xx_ts()
611 mutex_unlock(&info->lock); in exynos_read_s3c64xx_ts()
619 u32 mask = info->data->mask; in exynos_adc_isr()
622 if (info->read_ts) { in exynos_adc_isr()
623 info->ts_x = readl(ADC_V1_DATX(info->regs)); in exynos_adc_isr()
624 info->ts_y = readl(ADC_V1_DATY(info->regs)); in exynos_adc_isr()
625 writel(ADC_TSC_WAIT4INT | ADC_S3C2443_TSC_UD_SEN, ADC_V1_TSC(info->regs)); in exynos_adc_isr()
627 info->value = readl(ADC_V1_DATX(info->regs)) & mask; in exynos_adc_isr()
631 if (info->data->clear_irq) in exynos_adc_isr()
632 info->data->clear_irq(info); in exynos_adc_isr()
634 complete(&info->completion); in exynos_adc_isr()
649 struct iio_dev *dev = dev_get_drvdata(info->dev); in exynos_ts_isr()
654 while (info->input->users) { in exynos_ts_isr()
656 if (ret == -ETIMEDOUT) in exynos_ts_isr()
661 input_report_key(info->input, BTN_TOUCH, 0); in exynos_ts_isr()
662 input_sync(info->input); in exynos_ts_isr()
666 input_report_abs(info->input, ABS_X, x & ADC_DATX_MASK); in exynos_ts_isr()
667 input_report_abs(info->input, ABS_Y, y & ADC_DATY_MASK); in exynos_ts_isr()
668 input_report_key(info->input, BTN_TOUCH, 1); in exynos_ts_isr()
669 input_sync(info->input); in exynos_ts_isr()
674 writel(0, ADC_V1_CLRINTPNDNUP(info->regs)); in exynos_ts_isr()
686 return -EINVAL; in exynos_adc_reg_access()
688 *readval = readl(info->regs + reg); in exynos_adc_reg_access()
734 enable_irq(info->tsirq); in exynos_adc_ts_open()
743 disable_irq(info->tsirq); in exynos_adc_ts_close()
750 if (info->tsirq <= 0) in exynos_adc_ts_init()
751 return -ENODEV; in exynos_adc_ts_init()
753 info->input = input_allocate_device(); in exynos_adc_ts_init()
754 if (!info->input) in exynos_adc_ts_init()
755 return -ENOMEM; in exynos_adc_ts_init()
757 info->input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); in exynos_adc_ts_init()
758 info->input->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); in exynos_adc_ts_init()
760 input_set_abs_params(info->input, ABS_X, 0, 0x3FF, 0, 0); in exynos_adc_ts_init()
761 input_set_abs_params(info->input, ABS_Y, 0, 0x3FF, 0, 0); in exynos_adc_ts_init()
763 info->input->name = "S3C24xx TouchScreen"; in exynos_adc_ts_init()
764 info->input->id.bustype = BUS_HOST; in exynos_adc_ts_init()
765 info->input->open = exynos_adc_ts_open; in exynos_adc_ts_init()
766 info->input->close = exynos_adc_ts_close; in exynos_adc_ts_init()
768 input_set_drvdata(info->input, info); in exynos_adc_ts_init()
770 ret = input_register_device(info->input); in exynos_adc_ts_init()
772 input_free_device(info->input); in exynos_adc_ts_init()
776 disable_irq(info->tsirq); in exynos_adc_ts_init()
777 ret = request_threaded_irq(info->tsirq, NULL, exynos_ts_isr, in exynos_adc_ts_init()
780 input_unregister_device(info->input); in exynos_adc_ts_init()
788 struct device_node *np = pdev->dev.of_node; in exynos_adc_probe()
789 struct s3c2410_ts_mach_info *pdata = dev_get_platdata(&pdev->dev); in exynos_adc_probe()
792 int ret = -ENODEV; in exynos_adc_probe()
795 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(struct exynos_adc)); in exynos_adc_probe()
797 dev_err(&pdev->dev, "failed allocating iio device\n"); in exynos_adc_probe()
798 return -ENOMEM; in exynos_adc_probe()
803 info->data = exynos_adc_get_data(pdev); in exynos_adc_probe()
804 if (!info->data) { in exynos_adc_probe()
805 dev_err(&pdev->dev, "failed getting exynos_adc_data\n"); in exynos_adc_probe()
806 return -EINVAL; in exynos_adc_probe()
809 info->regs = devm_platform_ioremap_resource(pdev, 0); in exynos_adc_probe()
810 if (IS_ERR(info->regs)) in exynos_adc_probe()
811 return PTR_ERR(info->regs); in exynos_adc_probe()
814 if (info->data->needs_adc_phy) { in exynos_adc_probe()
815 info->pmu_map = syscon_regmap_lookup_by_phandle( in exynos_adc_probe()
816 pdev->dev.of_node, in exynos_adc_probe()
817 "samsung,syscon-phandle"); in exynos_adc_probe()
818 if (IS_ERR(info->pmu_map)) { in exynos_adc_probe()
819 dev_err(&pdev->dev, "syscon regmap lookup failed.\n"); in exynos_adc_probe()
820 return PTR_ERR(info->pmu_map); in exynos_adc_probe()
827 info->irq = irq; in exynos_adc_probe()
830 if (irq == -EPROBE_DEFER) in exynos_adc_probe()
833 info->tsirq = irq; in exynos_adc_probe()
835 info->dev = &pdev->dev; in exynos_adc_probe()
837 init_completion(&info->completion); in exynos_adc_probe()
839 info->clk = devm_clk_get(&pdev->dev, "adc"); in exynos_adc_probe()
840 if (IS_ERR(info->clk)) { in exynos_adc_probe()
841 dev_err(&pdev->dev, "failed getting clock, err = %ld\n", in exynos_adc_probe()
842 PTR_ERR(info->clk)); in exynos_adc_probe()
843 return PTR_ERR(info->clk); in exynos_adc_probe()
846 if (info->data->needs_sclk) { in exynos_adc_probe()
847 info->sclk = devm_clk_get(&pdev->dev, "sclk"); in exynos_adc_probe()
848 if (IS_ERR(info->sclk)) { in exynos_adc_probe()
849 dev_err(&pdev->dev, in exynos_adc_probe()
851 PTR_ERR(info->sclk)); in exynos_adc_probe()
852 return PTR_ERR(info->sclk); in exynos_adc_probe()
856 info->vdd = devm_regulator_get(&pdev->dev, "vdd"); in exynos_adc_probe()
857 if (IS_ERR(info->vdd)) in exynos_adc_probe()
858 return dev_err_probe(&pdev->dev, PTR_ERR(info->vdd), in exynos_adc_probe()
861 ret = regulator_enable(info->vdd); in exynos_adc_probe()
875 indio_dev->name = dev_name(&pdev->dev); in exynos_adc_probe()
876 indio_dev->info = &exynos_adc_iio_info; in exynos_adc_probe()
877 indio_dev->modes = INDIO_DIRECT_MODE; in exynos_adc_probe()
878 indio_dev->channels = exynos_adc_iio_channels; in exynos_adc_probe()
879 indio_dev->num_channels = info->data->num_channels; in exynos_adc_probe()
881 mutex_init(&info->lock); in exynos_adc_probe()
883 ret = request_irq(info->irq, exynos_adc_isr, in exynos_adc_probe()
884 0, dev_name(&pdev->dev), info); in exynos_adc_probe()
886 dev_err(&pdev->dev, "failed requesting irq, irq = %d\n", in exynos_adc_probe()
887 info->irq); in exynos_adc_probe()
895 if (info->data->init_hw) in exynos_adc_probe()
896 info->data->init_hw(info); in exynos_adc_probe()
900 has_ts = of_property_read_bool(pdev->dev.of_node, in exynos_adc_probe()
901 "has-touchscreen") || pdata; in exynos_adc_probe()
905 info->delay = pdata->delay; in exynos_adc_probe()
907 info->delay = 10000; in exynos_adc_probe()
914 ret = of_platform_populate(np, exynos_adc_match, NULL, &indio_dev->dev); in exynos_adc_probe()
916 dev_err(&pdev->dev, "failed adding child nodes\n"); in exynos_adc_probe()
923 device_for_each_child(&indio_dev->dev, NULL, in exynos_adc_probe()
926 input_unregister_device(info->input); in exynos_adc_probe()
927 free_irq(info->tsirq, info); in exynos_adc_probe()
932 free_irq(info->irq, info); in exynos_adc_probe()
934 if (info->data->exit_hw) in exynos_adc_probe()
935 info->data->exit_hw(info); in exynos_adc_probe()
940 regulator_disable(info->vdd); in exynos_adc_probe()
949 if (IS_REACHABLE(CONFIG_INPUT) && info->input) { in exynos_adc_remove()
950 free_irq(info->tsirq, info); in exynos_adc_remove()
951 input_unregister_device(info->input); in exynos_adc_remove()
953 device_for_each_child(&indio_dev->dev, NULL, in exynos_adc_remove()
956 free_irq(info->irq, info); in exynos_adc_remove()
957 if (info->data->exit_hw) in exynos_adc_remove()
958 info->data->exit_hw(info); in exynos_adc_remove()
961 regulator_disable(info->vdd); in exynos_adc_remove()
972 if (info->data->exit_hw) in exynos_adc_suspend()
973 info->data->exit_hw(info); in exynos_adc_suspend()
975 regulator_disable(info->vdd); in exynos_adc_suspend()
986 ret = regulator_enable(info->vdd); in exynos_adc_resume()
994 if (info->data->init_hw) in exynos_adc_resume()
995 info->data->init_hw(info); in exynos_adc_resume()
1009 .name = "exynos-adc",
1018 MODULE_DESCRIPTION("Samsung EXYNOS5 ADC driver");