Lines Matching +full:adc +full:- +full:reserved +full:- +full:channels
1 // SPDX-License-Identifier: GPL-2.0-only
3 * AD5592R Digital <-> Analog converters driver
5 * Copyright 2014-2016 Analog Devices Inc.
20 #include <dt-bindings/iio/adi,ad5592r.h>
22 #include "ad5592r-base.h"
30 mutex_lock(&st->gpio_lock); in ad5592r_gpio_get()
32 if (st->gpio_out & BIT(offset)) in ad5592r_gpio_get()
33 val = st->gpio_val; in ad5592r_gpio_get()
35 ret = st->ops->gpio_read(st, &val); in ad5592r_gpio_get()
37 mutex_unlock(&st->gpio_lock); in ad5592r_gpio_get()
49 mutex_lock(&st->gpio_lock); in ad5592r_gpio_set()
52 st->gpio_val |= BIT(offset); in ad5592r_gpio_set()
54 st->gpio_val &= ~BIT(offset); in ad5592r_gpio_set()
56 st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val); in ad5592r_gpio_set()
58 mutex_unlock(&st->gpio_lock); in ad5592r_gpio_set()
66 mutex_lock(&st->gpio_lock); in ad5592r_gpio_direction_input()
68 st->gpio_out &= ~BIT(offset); in ad5592r_gpio_direction_input()
69 st->gpio_in |= BIT(offset); in ad5592r_gpio_direction_input()
71 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out); in ad5592r_gpio_direction_input()
75 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in); in ad5592r_gpio_direction_input()
78 mutex_unlock(&st->gpio_lock); in ad5592r_gpio_direction_input()
89 mutex_lock(&st->gpio_lock); in ad5592r_gpio_direction_output()
92 st->gpio_val |= BIT(offset); in ad5592r_gpio_direction_output()
94 st->gpio_val &= ~BIT(offset); in ad5592r_gpio_direction_output()
96 st->gpio_in &= ~BIT(offset); in ad5592r_gpio_direction_output()
97 st->gpio_out |= BIT(offset); in ad5592r_gpio_direction_output()
99 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val); in ad5592r_gpio_direction_output()
103 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out); in ad5592r_gpio_direction_output()
107 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in); in ad5592r_gpio_direction_output()
110 mutex_unlock(&st->gpio_lock); in ad5592r_gpio_direction_output()
119 if (!(st->gpio_map & BIT(offset))) { in ad5592r_gpio_request()
120 dev_err(st->dev, "GPIO %d is reserved by alternate function\n", in ad5592r_gpio_request()
122 return -ENODEV; in ad5592r_gpio_request()
130 if (!st->gpio_map) in ad5592r_gpio_init()
133 st->gpiochip.label = dev_name(st->dev); in ad5592r_gpio_init()
134 st->gpiochip.base = -1; in ad5592r_gpio_init()
135 st->gpiochip.ngpio = 8; in ad5592r_gpio_init()
136 st->gpiochip.parent = st->dev; in ad5592r_gpio_init()
137 st->gpiochip.can_sleep = true; in ad5592r_gpio_init()
138 st->gpiochip.direction_input = ad5592r_gpio_direction_input; in ad5592r_gpio_init()
139 st->gpiochip.direction_output = ad5592r_gpio_direction_output; in ad5592r_gpio_init()
140 st->gpiochip.get = ad5592r_gpio_get; in ad5592r_gpio_init()
141 st->gpiochip.set = ad5592r_gpio_set; in ad5592r_gpio_init()
142 st->gpiochip.request = ad5592r_gpio_request; in ad5592r_gpio_init()
143 st->gpiochip.owner = THIS_MODULE; in ad5592r_gpio_init()
145 mutex_init(&st->gpio_lock); in ad5592r_gpio_init()
147 return gpiochip_add_data(&st->gpiochip, st); in ad5592r_gpio_init()
152 if (st->gpio_map) in ad5592r_gpio_cleanup()
153 gpiochip_remove(&st->gpiochip); in ad5592r_gpio_cleanup()
160 gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW); in ad5592r_reset()
168 mutex_lock(&st->lock); in ad5592r_reset()
170 st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac); in ad5592r_reset()
171 mutex_unlock(&st->lock); in ad5592r_reset()
183 if (st->reg) { in ad5592r_get_vref()
184 ret = regulator_get_voltage(st->reg); in ad5592r_get_vref()
196 const struct ad5592r_rw_ops *ops = st->ops; in ad5592r_set_channel_modes()
199 u8 pulldown = 0, tristate = 0, dac = 0, adc = 0; in ad5592r_set_channel_modes() local
202 for (i = 0; i < st->num_channels; i++) { in ad5592r_set_channel_modes()
203 switch (st->channel_modes[i]) { in ad5592r_set_channel_modes()
209 adc |= BIT(i); in ad5592r_set_channel_modes()
214 adc |= BIT(i); in ad5592r_set_channel_modes()
218 st->gpio_map |= BIT(i); in ad5592r_set_channel_modes()
219 st->gpio_in |= BIT(i); /* Default to input */ in ad5592r_set_channel_modes()
224 switch (st->channel_offstate[i]) { in ad5592r_set_channel_modes()
230 st->gpio_out |= BIT(i); in ad5592r_set_channel_modes()
234 st->gpio_out |= BIT(i); in ad5592r_set_channel_modes()
235 st->gpio_val |= BIT(i); in ad5592r_set_channel_modes()
246 mutex_lock(&st->lock); in ad5592r_set_channel_modes()
249 ret = ops->reg_write(st, AD5592R_REG_PULLDOWN, pulldown); in ad5592r_set_channel_modes()
253 ret = ops->reg_write(st, AD5592R_REG_TRISTATE, tristate); in ad5592r_set_channel_modes()
258 ret = ops->reg_write(st, AD5592R_REG_DAC_EN, dac); in ad5592r_set_channel_modes()
262 ret = ops->reg_write(st, AD5592R_REG_ADC_EN, adc); in ad5592r_set_channel_modes()
266 ret = ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val); in ad5592r_set_channel_modes()
270 ret = ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out); in ad5592r_set_channel_modes()
274 ret = ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in); in ad5592r_set_channel_modes()
279 ret = ops->reg_read(st, AD5592R_REG_ADC_EN, &read_back); in ad5592r_set_channel_modes()
280 if (!ret && (read_back & 0xff) != adc) in ad5592r_set_channel_modes()
281 ret = -EIO; in ad5592r_set_channel_modes()
284 mutex_unlock(&st->lock); in ad5592r_set_channel_modes()
292 for (i = 0; i < ARRAY_SIZE(st->channel_modes); i++) in ad5592r_reset_channel_modes()
293 st->channel_modes[i] = CH_MODE_UNUSED; in ad5592r_reset_channel_modes()
307 if (val >= (1 << chan->scan_type.realbits) || val < 0) in ad5592r_write_raw()
308 return -EINVAL; in ad5592r_write_raw()
310 if (!chan->output) in ad5592r_write_raw()
311 return -EINVAL; in ad5592r_write_raw()
313 mutex_lock(&st->lock); in ad5592r_write_raw()
314 ret = st->ops->write_dac(st, chan->channel, val); in ad5592r_write_raw()
316 st->cached_dac[chan->channel] = val; in ad5592r_write_raw()
317 mutex_unlock(&st->lock); in ad5592r_write_raw()
320 if (chan->type == IIO_VOLTAGE) { in ad5592r_write_raw()
323 if (val == st->scale_avail[0][0] && in ad5592r_write_raw()
324 val2 == st->scale_avail[0][1]) in ad5592r_write_raw()
326 else if (val == st->scale_avail[1][0] && in ad5592r_write_raw()
327 val2 == st->scale_avail[1][1]) in ad5592r_write_raw()
330 return -EINVAL; in ad5592r_write_raw()
332 mutex_lock(&st->lock); in ad5592r_write_raw()
334 ret = st->ops->reg_read(st, AD5592R_REG_CTRL, in ad5592r_write_raw()
335 &st->cached_gp_ctrl); in ad5592r_write_raw()
337 mutex_unlock(&st->lock); in ad5592r_write_raw()
341 if (chan->output) { in ad5592r_write_raw()
343 st->cached_gp_ctrl |= in ad5592r_write_raw()
346 st->cached_gp_ctrl &= in ad5592r_write_raw()
350 st->cached_gp_ctrl |= in ad5592r_write_raw()
353 st->cached_gp_ctrl &= in ad5592r_write_raw()
357 ret = st->ops->reg_write(st, AD5592R_REG_CTRL, in ad5592r_write_raw()
358 st->cached_gp_ctrl); in ad5592r_write_raw()
359 mutex_unlock(&st->lock); in ad5592r_write_raw()
365 return -EINVAL; in ad5592r_write_raw()
381 if (!chan->output) { in ad5592r_read_raw()
382 mutex_lock(&st->lock); in ad5592r_read_raw()
383 ret = st->ops->read_adc(st, chan->channel, &read_val); in ad5592r_read_raw()
384 mutex_unlock(&st->lock); in ad5592r_read_raw()
388 if ((read_val >> 12 & 0x7) != (chan->channel & 0x7)) { in ad5592r_read_raw()
389 dev_err(st->dev, "Error while reading channel %u\n", in ad5592r_read_raw()
390 chan->channel); in ad5592r_read_raw()
391 return -EIO; in ad5592r_read_raw()
397 mutex_lock(&st->lock); in ad5592r_read_raw()
398 read_val = st->cached_dac[chan->channel]; in ad5592r_read_raw()
399 mutex_unlock(&st->lock); in ad5592r_read_raw()
402 dev_dbg(st->dev, "Channel %u read: 0x%04hX\n", in ad5592r_read_raw()
403 chan->channel, read_val); in ad5592r_read_raw()
410 if (chan->type == IIO_TEMP) { in ad5592r_read_raw()
417 mutex_lock(&st->lock); in ad5592r_read_raw()
419 if (chan->output) in ad5592r_read_raw()
420 mult = !!(st->cached_gp_ctrl & in ad5592r_read_raw()
423 mult = !!(st->cached_gp_ctrl & in ad5592r_read_raw()
426 mutex_unlock(&st->lock); in ad5592r_read_raw()
430 *val2 = chan->scan_type.realbits; in ad5592r_read_raw()
436 mutex_lock(&st->lock); in ad5592r_read_raw()
438 if (st->cached_gp_ctrl & AD5592R_REG_CTRL_ADC_RANGE) in ad5592r_read_raw()
439 *val = (-34365 * 25) / ret; in ad5592r_read_raw()
441 *val = (-75365 * 25) / ret; in ad5592r_read_raw()
443 mutex_unlock(&st->lock); in ad5592r_read_raw()
447 return -EINVAL; in ad5592r_read_raw()
462 return -EINVAL; in ad5592r_write_raw_get_fmt()
479 st->scale_avail[0][0], st->scale_avail[0][1], in ad5592r_show_scale_available()
480 st->scale_avail[1][0], st->scale_avail[1][1]); in ad5592r_show_scale_available()
495 chan->type = IIO_VOLTAGE; in ad5592r_setup_channel()
496 chan->indexed = 1; in ad5592r_setup_channel()
497 chan->output = output; in ad5592r_setup_channel()
498 chan->channel = id; in ad5592r_setup_channel()
499 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); in ad5592r_setup_channel()
500 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); in ad5592r_setup_channel()
501 chan->scan_type.sign = 'u'; in ad5592r_setup_channel()
502 chan->scan_type.realbits = 12; in ad5592r_setup_channel()
503 chan->scan_type.storagebits = 16; in ad5592r_setup_channel()
504 chan->ext_info = ad5592r_ext_info; in ad5592r_setup_channel()
511 num_channels = st->num_channels; in ad5592r_alloc_channels()
512 struct iio_chan_spec *channels; in ad5592r_alloc_channels() local
517 device_for_each_child_node(st->dev, child) { in ad5592r_alloc_channels()
519 if (ret || reg >= ARRAY_SIZE(st->channel_modes)) in ad5592r_alloc_channels()
524 st->channel_modes[reg] = tmp; in ad5592r_alloc_channels()
526 fwnode_property_read_u32(child, "adi,off-state", &tmp); in ad5592r_alloc_channels()
528 st->channel_offstate[reg] = tmp; in ad5592r_alloc_channels()
531 channels = devm_kcalloc(st->dev, in ad5592r_alloc_channels()
532 1 + 2 * num_channels, sizeof(*channels), in ad5592r_alloc_channels()
534 if (!channels) in ad5592r_alloc_channels()
535 return -ENOMEM; in ad5592r_alloc_channels()
538 switch (st->channel_modes[i]) { in ad5592r_alloc_channels()
540 ad5592r_setup_channel(iio_dev, &channels[curr_channel], in ad5592r_alloc_channels()
546 ad5592r_setup_channel(iio_dev, &channels[curr_channel], in ad5592r_alloc_channels()
552 ad5592r_setup_channel(iio_dev, &channels[curr_channel], in ad5592r_alloc_channels()
555 ad5592r_setup_channel(iio_dev, &channels[curr_channel], in ad5592r_alloc_channels()
565 channels[curr_channel].type = IIO_TEMP; in ad5592r_alloc_channels()
566 channels[curr_channel].channel = 8; in ad5592r_alloc_channels()
567 channels[curr_channel].info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | in ad5592r_alloc_channels()
572 iio_dev->num_channels = curr_channel; in ad5592r_alloc_channels()
573 iio_dev->channels = channels; in ad5592r_alloc_channels()
582 st->scale_avail[0][0] = in ad5592r_init_scales()
583 div_s64_rem(tmp, 1000000000LL, &st->scale_avail[0][1]); in ad5592r_init_scales()
584 st->scale_avail[1][0] = in ad5592r_init_scales()
585 div_s64_rem(tmp * 2, 1000000000LL, &st->scale_avail[1][1]); in ad5592r_init_scales()
597 return -ENOMEM; in ad5592r_probe()
600 st->dev = dev; in ad5592r_probe()
601 st->ops = ops; in ad5592r_probe()
602 st->num_channels = 8; in ad5592r_probe()
605 st->reg = devm_regulator_get_optional(dev, "vref"); in ad5592r_probe()
606 if (IS_ERR(st->reg)) { in ad5592r_probe()
607 if ((PTR_ERR(st->reg) != -ENODEV) && dev->of_node) in ad5592r_probe()
608 return PTR_ERR(st->reg); in ad5592r_probe()
610 st->reg = NULL; in ad5592r_probe()
612 ret = regulator_enable(st->reg); in ad5592r_probe()
617 iio_dev->name = name; in ad5592r_probe()
618 iio_dev->info = &ad5592r_info; in ad5592r_probe()
619 iio_dev->modes = INDIO_DIRECT_MODE; in ad5592r_probe()
621 mutex_init(&st->lock); in ad5592r_probe()
629 ret = ops->reg_write(st, AD5592R_REG_PD, in ad5592r_probe()
630 (st->reg == NULL) ? AD5592R_REG_PD_EN_REF : 0); in ad5592r_probe()
659 if (st->reg) in ad5592r_probe()
660 regulator_disable(st->reg); in ad5592r_probe()
675 if (st->reg) in ad5592r_remove()
676 regulator_disable(st->reg); in ad5592r_remove()
683 MODULE_DESCRIPTION("Analog Devices AD5592R multi-channel converters");