Lines Matching +full:min +full:- +full:output +full:- +full:impedance
1 // SPDX-License-Identifier: GPL-2.0-only
3 * A fairly generic DMA-API to IOMMU-API glue layer.
5 * Copyright (C) 2014-2015 ARM Ltd.
7 * based in part on arch/arm/mm/dma-mapping.c:
8 * Copyright (C) 2000-2004 Russell King
13 #include <linux/dma-map-ops.h>
14 #include <linux/dma-iommu.h>
54 if (cookie->type == IOMMU_DMA_IOVA_COOKIE) in cookie_msi_granule()
55 return cookie->iovad.granule; in cookie_msi_granule()
65 INIT_LIST_HEAD(&cookie->msi_page_list); in cookie_alloc()
66 cookie->type = type; in cookie_alloc()
72 * iommu_get_dma_cookie - Acquire DMA-API resources for a domain
73 * @domain: IOMMU domain to prepare for DMA-API usage
76 * callback when domain->type == IOMMU_DOMAIN_DMA.
80 if (domain->iova_cookie) in iommu_get_dma_cookie()
81 return -EEXIST; in iommu_get_dma_cookie()
83 domain->iova_cookie = cookie_alloc(IOMMU_DMA_IOVA_COOKIE); in iommu_get_dma_cookie()
84 if (!domain->iova_cookie) in iommu_get_dma_cookie()
85 return -ENOMEM; in iommu_get_dma_cookie()
92 * iommu_get_msi_cookie - Acquire just MSI remapping resources
107 if (domain->type != IOMMU_DOMAIN_UNMANAGED) in iommu_get_msi_cookie()
108 return -EINVAL; in iommu_get_msi_cookie()
110 if (domain->iova_cookie) in iommu_get_msi_cookie()
111 return -EEXIST; in iommu_get_msi_cookie()
115 return -ENOMEM; in iommu_get_msi_cookie()
117 cookie->msi_iova = base; in iommu_get_msi_cookie()
118 domain->iova_cookie = cookie; in iommu_get_msi_cookie()
124 * iommu_put_dma_cookie - Release a domain's DMA mapping resources
132 struct iommu_dma_cookie *cookie = domain->iova_cookie; in iommu_put_dma_cookie()
138 if (cookie->type == IOMMU_DMA_IOVA_COOKIE && cookie->iovad.granule) in iommu_put_dma_cookie()
139 put_iova_domain(&cookie->iovad); in iommu_put_dma_cookie()
141 list_for_each_entry_safe(msi, tmp, &cookie->msi_page_list, list) { in iommu_put_dma_cookie()
142 list_del(&msi->list); in iommu_put_dma_cookie()
146 domain->iova_cookie = NULL; in iommu_put_dma_cookie()
151 * iommu_dma_get_resv_regions - Reserved region driver helper
156 * for general non-IOMMU-specific reservations. Currently, this covers GICv3
163 if (!is_of_node(dev_iommu_fwspec_get(dev)->iommu_fwnode)) in iommu_dma_get_resv_regions()
172 struct iova_domain *iovad = &cookie->iovad; in cookie_init_hw_msi_region()
176 start -= iova_offset(iovad, start); in cookie_init_hw_msi_region()
177 num_pages = iova_align(iovad, end - start) >> iova_shift(iovad); in cookie_init_hw_msi_region()
182 return -ENOMEM; in cookie_init_hw_msi_region()
184 msi_page->phys = start; in cookie_init_hw_msi_region()
185 msi_page->iova = start; in cookie_init_hw_msi_region()
186 INIT_LIST_HEAD(&msi_page->list); in cookie_init_hw_msi_region()
187 list_add(&msi_page->list, &cookie->msi_page_list); in cookie_init_hw_msi_region()
188 start += iovad->granule; in cookie_init_hw_msi_region()
197 struct pci_host_bridge *bridge = pci_find_host_bridge(dev->bus); in iova_reserve_pci_windows()
202 resource_list_for_each_entry(window, &bridge->windows) { in iova_reserve_pci_windows()
203 if (resource_type(window->res) != IORESOURCE_MEM) in iova_reserve_pci_windows()
206 lo = iova_pfn(iovad, window->res->start - window->offset); in iova_reserve_pci_windows()
207 hi = iova_pfn(iovad, window->res->end - window->offset); in iova_reserve_pci_windows()
212 resource_list_for_each_entry(window, &bridge->dma_ranges) { in iova_reserve_pci_windows()
213 end = window->res->start - window->offset; in iova_reserve_pci_windows()
221 dev_err(&dev->dev, in iova_reserve_pci_windows()
222 "Failed to reserve IOVA [%pa-%pa]\n", in iova_reserve_pci_windows()
224 return -EINVAL; in iova_reserve_pci_windows()
227 start = window->res->end - window->offset + 1; in iova_reserve_pci_windows()
229 if (window->node.next == &bridge->dma_ranges && in iova_reserve_pci_windows()
242 struct iommu_dma_cookie *cookie = domain->iova_cookie; in iova_reserve_iommu_regions()
243 struct iova_domain *iovad = &cookie->iovad; in iova_reserve_iommu_regions()
259 if (region->type == IOMMU_RESV_SW_MSI) in iova_reserve_iommu_regions()
262 lo = iova_pfn(iovad, region->start); in iova_reserve_iommu_regions()
263 hi = iova_pfn(iovad, region->start + region->length - 1); in iova_reserve_iommu_regions()
266 if (region->type == IOMMU_RESV_MSI) in iova_reserve_iommu_regions()
267 ret = cookie_init_hw_msi_region(cookie, region->start, in iova_reserve_iommu_regions()
268 region->start + region->length); in iova_reserve_iommu_regions()
283 domain = cookie->fq_domain; in iommu_dma_flush_iotlb_all()
286 * implies that ops->flush_iotlb_all must be non-NULL. in iommu_dma_flush_iotlb_all()
288 domain->ops->flush_iotlb_all(domain); in iommu_dma_flush_iotlb_all()
292 * iommu_dma_init_domain - Initialise a DMA mapping domain
306 struct iommu_dma_cookie *cookie = domain->iova_cookie; in iommu_dma_init_domain()
311 if (!cookie || cookie->type != IOMMU_DMA_IOVA_COOKIE) in iommu_dma_init_domain()
312 return -EINVAL; in iommu_dma_init_domain()
314 iovad = &cookie->iovad; in iommu_dma_init_domain()
317 order = __ffs(domain->pgsize_bitmap); in iommu_dma_init_domain()
321 if (domain->geometry.force_aperture) { in iommu_dma_init_domain()
322 if (base > domain->geometry.aperture_end || in iommu_dma_init_domain()
323 base + size <= domain->geometry.aperture_start) { in iommu_dma_init_domain()
325 return -EFAULT; in iommu_dma_init_domain()
329 domain->geometry.aperture_start >> order); in iommu_dma_init_domain()
332 /* start_pfn is always nonzero for an already-initialised domain */ in iommu_dma_init_domain()
333 if (iovad->start_pfn) { in iommu_dma_init_domain()
334 if (1UL << order != iovad->granule || in iommu_dma_init_domain()
335 base_pfn != iovad->start_pfn) { in iommu_dma_init_domain()
337 return -EFAULT; in iommu_dma_init_domain()
345 if (!cookie->fq_domain && !iommu_domain_get_attr(domain, in iommu_dma_init_domain()
351 cookie->fq_domain = domain; in iommu_dma_init_domain()
363 const struct iommu_ops *ops = domain->ops; in iommu_dma_deferred_attach()
368 if (unlikely(ops->is_attach_deferred && in iommu_dma_deferred_attach()
369 ops->is_attach_deferred(domain, dev))) in iommu_dma_deferred_attach()
376 * dma_info_to_prot - Translate DMA API directions and attributes to IOMMU API
379 * @coherent: Is the DMA master cache-coherent?
407 struct iommu_dma_cookie *cookie = domain->iova_cookie; in iommu_dma_alloc_iova()
408 struct iova_domain *iovad = &cookie->iovad; in iommu_dma_alloc_iova()
411 if (cookie->type == IOMMU_DMA_MSI_COOKIE) { in iommu_dma_alloc_iova()
412 cookie->msi_iova += size; in iommu_dma_alloc_iova()
413 return cookie->msi_iova - size; in iommu_dma_alloc_iova()
419 * Freeing non-power-of-two-sized allocations back into the IOVA caches in iommu_dma_alloc_iova()
424 if (iova_len < (1 << (IOVA_RANGE_CACHE_MAX_SIZE - 1))) in iommu_dma_alloc_iova()
427 dma_limit = min_not_zero(dma_limit, dev->bus_dma_limit); in iommu_dma_alloc_iova()
429 if (domain->geometry.force_aperture) in iommu_dma_alloc_iova()
430 dma_limit = min(dma_limit, (u64)domain->geometry.aperture_end); in iommu_dma_alloc_iova()
447 struct iova_domain *iovad = &cookie->iovad; in iommu_dma_free_iova()
450 if (cookie->type == IOMMU_DMA_MSI_COOKIE) in iommu_dma_free_iova()
451 cookie->msi_iova -= size; in iommu_dma_free_iova()
452 else if (cookie->fq_domain) /* non-strict mode */ in iommu_dma_free_iova()
464 struct iommu_dma_cookie *cookie = domain->iova_cookie; in __iommu_dma_unmap()
465 struct iova_domain *iovad = &cookie->iovad; in __iommu_dma_unmap()
470 dma_addr -= iova_off; in __iommu_dma_unmap()
477 if (!cookie->fq_domain) in __iommu_dma_unmap()
486 struct iommu_dma_cookie *cookie = domain->iova_cookie; in __iommu_dma_map()
487 struct iova_domain *iovad = &cookie->iovad; in __iommu_dma_map()
500 if (iommu_map_atomic(domain, iova, phys - iova_off, size, prot)) { in __iommu_dma_map()
509 while (count--) in __iommu_dma_free_pages()
520 order_mask &= (2U << MAX_ORDER) - 1; in __iommu_dma_alloc_pages()
539 * Higher-order allocations are a convenience rather in __iommu_dma_alloc_pages()
541 * falling back to minimum-order allocations. in __iommu_dma_alloc_pages()
543 for (order_mask &= (2U << __fls(count)) - 1; in __iommu_dma_alloc_pages()
562 count -= order_size; in __iommu_dma_alloc_pages()
563 while (order_size--) in __iommu_dma_alloc_pages()
570 * iommu_dma_alloc_remap - Allocate and map a buffer contiguous in IOVA space
589 struct iommu_dma_cookie *cookie = domain->iova_cookie; in iommu_dma_alloc_remap()
590 struct iova_domain *iovad = &cookie->iovad; in iommu_dma_alloc_remap()
593 unsigned int count, min_size, alloc_sizes = domain->pgsize_bitmap; in iommu_dma_alloc_remap()
604 min_size = alloc_sizes & -alloc_sizes; in iommu_dma_alloc_remap()
621 iova = iommu_dma_alloc_iova(domain, size, dev->coherent_dma_mask, dev); in iommu_dma_alloc_remap()
633 arch_dma_prep_coherent(sg_page(sg), sg->length); in iommu_dma_alloc_remap()
661 * __iommu_dma_mmap - Map a buffer into provided user VMA
710 arch_sync_dma_for_cpu(sg_phys(sg), sg->length, dir); in iommu_dma_sync_sg_for_cpu()
724 arch_sync_dma_for_device(sg_phys(sg), sg->length, dir); in iommu_dma_sync_sg_for_device()
752 * Prepare a successfully-mapped scatterlist to give back to the caller.
770 unsigned int s_iova_len = s->length; in __finalise_sg()
772 s->offset += s_iova_off; in __finalise_sg()
773 s->length = s_length; in __finalise_sg()
779 * - there is a valid output segment to append to in __finalise_sg()
780 * - and this segment starts on an IOVA page boundary in __finalise_sg()
781 * - but doesn't fall at a segment boundary in __finalise_sg()
782 * - and wouldn't make the resulting output segment too long in __finalise_sg()
785 (max_len - cur_len >= s_length)) { in __finalise_sg()
789 /* Otherwise start the next output segment */ in __finalise_sg()
818 s->offset += sg_dma_address(s); in __invalidate_sg()
820 s->length = sg_dma_len(s); in __invalidate_sg()
830 * impedance-matching, to be able to hand off a suitably-aligned list,
837 struct iommu_dma_cookie *cookie = domain->iova_cookie; in iommu_dma_map_sg()
838 struct iova_domain *iovad = &cookie->iovad; in iommu_dma_map_sg()
855 * trickery we can modify the list in-place, but reversibly, by in iommu_dma_map_sg()
856 * stashing the unaligned parts in the as-yet-unused DMA fields. in iommu_dma_map_sg()
859 size_t s_iova_off = iova_offset(iovad, s->offset); in iommu_dma_map_sg()
860 size_t s_length = s->length; in iommu_dma_map_sg()
861 size_t pad_len = (mask - iova_len + 1) & mask; in iommu_dma_map_sg()
865 s->offset -= s_iova_off; in iommu_dma_map_sg()
867 s->length = s_length; in iommu_dma_map_sg()
872 * - If mask size >= IOVA size, then the IOVA range cannot in iommu_dma_map_sg()
874 * - If mask size < IOVA size, then the IOVA range must start in iommu_dma_map_sg()
878 * - The mask must be a power of 2, so pad_len == 0 if in iommu_dma_map_sg()
882 if (pad_len && pad_len < s_length - 1) { in iommu_dma_map_sg()
883 prev->length += pad_len; in iommu_dma_map_sg()
897 * implementation - it knows better than we do. in iommu_dma_map_sg()
926 for_each_sg(sg_next(sg), tmp, nents - 1, i) { in iommu_dma_unmap_sg()
932 __iommu_dma_unmap(dev, start, end - start); in iommu_dma_unmap_sg()
955 /* Non-coherent atomic allocation? Easy */ in __iommu_dma_free()
962 * If it the address is remapped, then it's either non-coherent in __iommu_dma_free()
1050 dev->coherent_dma_mask); in iommu_dma_alloc()
1092 unsigned long pfn, off = vma->vm_pgoff; in iommu_dma_mmap()
1095 vma->vm_page_prot = dma_pgprot(dev, vma->vm_page_prot, attrs); in iommu_dma_mmap()
1100 if (off >= nr_pages || vma_pages(vma) > nr_pages - off) in iommu_dma_mmap()
1101 return -ENXIO; in iommu_dma_mmap()
1113 return remap_pfn_range(vma, vma->vm_start, pfn + off, in iommu_dma_mmap()
1114 vma->vm_end - vma->vm_start, in iommu_dma_mmap()
1115 vma->vm_page_prot); in iommu_dma_mmap()
1141 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0); in iommu_dma_get_sgtable()
1149 return (1UL << __ffs(domain->pgsize_bitmap)) - 1; in iommu_dma_get_merge_boundary()
1176 * IOMMU driver needs to support via the dma-iommu layer.
1187 * underlying IOMMU driver needs to support via the dma-iommu layer. in iommu_setup_dma_ops()
1189 if (domain->type == IOMMU_DOMAIN_DMA) { in iommu_setup_dma_ops()
1192 dev->dma_ops = &iommu_dma_ops; in iommu_setup_dma_ops()
1204 struct iommu_dma_cookie *cookie = domain->iova_cookie; in iommu_dma_get_msi_page()
1210 msi_addr &= ~(phys_addr_t)(size - 1); in iommu_dma_get_msi_page()
1211 list_for_each_entry(msi_page, &cookie->msi_page_list, list) in iommu_dma_get_msi_page()
1212 if (msi_page->phys == msi_addr) in iommu_dma_get_msi_page()
1226 INIT_LIST_HEAD(&msi_page->list); in iommu_dma_get_msi_page()
1227 msi_page->phys = msi_addr; in iommu_dma_get_msi_page()
1228 msi_page->iova = iova; in iommu_dma_get_msi_page()
1229 list_add(&msi_page->list, &cookie->msi_page_list); in iommu_dma_get_msi_page()
1246 if (!domain || !domain->iova_cookie) { in iommu_dma_prepare_msi()
1247 desc->iommu_cookie = NULL; in iommu_dma_prepare_msi()
1263 return -ENOMEM; in iommu_dma_prepare_msi()
1276 if (!domain || !domain->iova_cookie || WARN_ON(!msi_page)) in iommu_dma_compose_msi_msg()
1279 msg->address_hi = upper_32_bits(msi_page->iova); in iommu_dma_compose_msi_msg()
1280 msg->address_lo &= cookie_msi_granule(domain->iova_cookie) - 1; in iommu_dma_compose_msi_msg()
1281 msg->address_lo += lower_32_bits(msi_page->iova); in iommu_dma_compose_msi_msg()