27 #define   I2C_ADV7175        0xd4
28 #define   I2C_ADV7176        0x54
32 module_param(debug, int, 0);
33 MODULE_PARM_DESC(debug, "Debug level (0-1)");
86 			block_len = 0;  in adv7175_write_block()
87 			block_data[block_len++] = reg = data[0];  in adv7175_write_block()
93 			} while (len >= 2 && data[0] == reg && block_len < 32);  in adv7175_write_block()
95 			if (ret < 0)  in adv7175_write_block()
103 			if (ret < 0)  in adv7175_write_block()
117 		adv7175_write(sd, 0x02, 0x00);  in set_subcarrier_freq()
119 		adv7175_write(sd, 0x02, 0x55);  in set_subcarrier_freq()
121 	adv7175_write(sd, 0x03, 0x55);  in set_subcarrier_freq()
122 	adv7175_write(sd, 0x04, 0x55);  in set_subcarrier_freq()
123 	adv7175_write(sd, 0x05, 0x25);  in set_subcarrier_freq()
129 #define MR050       0x11	/* 0x09 */
130 #define MR060       0x14	/* 0x0c */
134 #define TR0MODE     0x46
135 #define TR0RST	    0x80
137 #define TR1CAPT	    0x80
138 #define TR1PLAY	    0x00
142 	0x00, MR050,		/* MR0, PAL enabled */
143 	0x01, 0x00,		/* MR1 */
144 	0x02, 0x0c,		/* subc. freq. */
145 	0x03, 0x8c,		/* subc. freq. */
146 	0x04, 0x79,		/* subc. freq. */
147 	0x05, 0x26,		/* subc. freq. */
148 	0x06, 0x40,		/* subc. phase */
150 	0x07, TR0MODE,		/* TR0, 16bit */
151 	0x08, 0x21,		/*  */
152 	0x09, 0x00,		/*  */
153 	0x0a, 0x00,		/*  */
154 	0x0b, 0x00,		/*  */
155 	0x0c, TR1CAPT,		/* TR1 */
156 	0x0d, 0x4f,		/* MR2 */
157 	0x0e, 0x00,		/*  */
158 	0x0f, 0x00,		/*  */
159 	0x10, 0x00,		/*  */
160 	0x11, 0x00,		/*  */
164 	0x00, MR050,		/* MR0, PAL enabled */
165 	0x01, 0x00,		/* MR1 */
166 	0x02, 0x0c,		/* subc. freq. */
167 	0x03, 0x8c,		/* subc. freq. */
168 	0x04, 0x79,		/* subc. freq. */
169 	0x05, 0x26,		/* subc. freq. */
170 	0x06, 0x40,		/* subc. phase */
174 	0x00, MR060,		/* MR0, NTSC enabled */
175 	0x01, 0x00,		/* MR1 */
176 	0x02, 0x55,		/* subc. freq. */
177 	0x03, 0x55,		/* subc. freq. */
178 	0x04, 0x55,		/* subc. freq. */
179 	0x05, 0x25,		/* subc. freq. */
180 	0x06, 0x1a,		/* subc. phase */
187 	adv7175_write(sd, 0x07, TR0MODE | TR0RST);  in adv7175_init()
188 	adv7175_write(sd, 0x07, TR0MODE);  in adv7175_init()
189 	return 0;  in adv7175_init()
198 		if (encoder->input == 0)  in adv7175_s_std_output()
199 			adv7175_write(sd, 0x0d, 0x4f);	/* Enable genlock */  in adv7175_s_std_output()
200 		adv7175_write(sd, 0x07, TR0MODE | TR0RST);  in adv7175_s_std_output()
201 		adv7175_write(sd, 0x07, TR0MODE);  in adv7175_s_std_output()
204 		if (encoder->input == 0)  in adv7175_s_std_output()
205 			adv7175_write(sd, 0x0d, 0x4f);	/* Enable genlock */  in adv7175_s_std_output()
206 		adv7175_write(sd, 0x07, TR0MODE | TR0RST);  in adv7175_s_std_output()
207 		adv7175_write(sd, 0x07, TR0MODE);  in adv7175_s_std_output()
216 		if (encoder->input == 0)  in adv7175_s_std_output()
217 			adv7175_write(sd, 0x0d, 0x49);	/* Disable genlock */  in adv7175_s_std_output()
218 		adv7175_write(sd, 0x07, TR0MODE | TR0RST);  in adv7175_s_std_output()
219 		adv7175_write(sd, 0x07, TR0MODE);  in adv7175_s_std_output()
227 	return 0;  in adv7175_s_std_output()
235 	/* RJ: input = 0: input is from decoder  in adv7175_s_routing()
240 	case 0:  in adv7175_s_routing()
241 		adv7175_write(sd, 0x01, 0x00);  in adv7175_s_routing()
246 		adv7175_write(sd, 0x0c, TR1CAPT);	/* TR1 */  in adv7175_s_routing()
248 			adv7175_write(sd, 0x0d, 0x49);	/* Disable genlock */  in adv7175_s_routing()
250 			adv7175_write(sd, 0x0d, 0x4f);	/* Enable genlock */  in adv7175_s_routing()
251 		adv7175_write(sd, 0x07, TR0MODE | TR0RST);  in adv7175_s_routing()
252 		adv7175_write(sd, 0x07, TR0MODE);  in adv7175_s_routing()
257 		adv7175_write(sd, 0x01, 0x00);  in adv7175_s_routing()
260 			set_subcarrier_freq(sd, 0);  in adv7175_s_routing()
262 		adv7175_write(sd, 0x0c, TR1PLAY);	/* TR1 */  in adv7175_s_routing()
263 		adv7175_write(sd, 0x0d, 0x49);  in adv7175_s_routing()
264 		adv7175_write(sd, 0x07, TR0MODE | TR0RST);  in adv7175_s_routing()
265 		adv7175_write(sd, 0x07, TR0MODE);  in adv7175_s_routing()
270 		adv7175_write(sd, 0x01, 0x80);  in adv7175_s_routing()
273 			set_subcarrier_freq(sd, 0);  in adv7175_s_routing()
275 		adv7175_write(sd, 0x0d, 0x49);  in adv7175_s_routing()
276 		adv7175_write(sd, 0x07, TR0MODE | TR0RST);  in adv7175_s_routing()
277 		adv7175_write(sd, 0x07, TR0MODE);  in adv7175_s_routing()
287 	return 0;  in adv7175_s_routing()
298 	return 0;  in adv7175_enum_mbus_code()
306 	u8 val = adv7175_read(sd, 0x7);  in adv7175_get_fmt()
311 	if ((val & 0x40) == (1 << 6))  in adv7175_get_fmt()
317 	mf->width       = 0;  in adv7175_get_fmt()
318 	mf->height      = 0;  in adv7175_get_fmt()
321 	return 0;  in adv7175_get_fmt()
329 	u8 val = adv7175_read(sd, 0x7);  in adv7175_set_fmt()
330 	int ret = 0;  in adv7175_set_fmt()
337 		val &= ~0x40;  in adv7175_set_fmt()
341 		val |= 0x40;  in adv7175_set_fmt()
351 		ret = adv7175_write(sd, 0x7, val);  in adv7175_set_fmt()
359 		adv7175_write(sd, 0x01, 0x00);  in adv7175_s_power()
361 		adv7175_write(sd, 0x01, 0x78);  in adv7175_s_power()
363 	return 0;  in adv7175_s_power()
403 	v4l_info(client, "chip found @ 0x%x (%s)\n",  in adv7175_probe()
412 	encoder->input = 0;  in adv7175_probe()
415 	if (i >= 0) {  in adv7175_probe()
416 		i = adv7175_write(sd, 0x07, TR0MODE | TR0RST);  in adv7175_probe()
417 		i = adv7175_write(sd, 0x07, TR0MODE);  in adv7175_probe()
418 		i = adv7175_read(sd, 0x12);  in adv7175_probe()
421 	if (i < 0)  in adv7175_probe()
422 		v4l2_dbg(1, debug, sd, "init error 0x%x\n", i);  in adv7175_probe()
423 	return 0;  in adv7175_probe()
431 	return 0;  in adv7175_remove()
437 	{ "adv7175", 0 },
438 	{ "adv7176", 0 },