Lines Matching +full:1 +full:- +full:5
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Driver for Realtek PCI-Express card reader
4 * Copyright(c) 2018-2019 Realtek Semiconductor Corp. All rights reserved.
27 #define RTS5261_FORCE_PRSNT_LOW (1 << 6)
28 #define RTS5261_AUX_CLK_16M_EN (1 << 5)
31 #define RTS5261_PWD_SUSPND_EN (1 << 4)
34 #define PAD_GPIO_H3L1 (1 << 3)
50 /* EFUSE_MODE: 0=READ 1=PROGRAM */
66 #define RTS5261_FW_EA_MODE_MASK (0x01<<5)
75 #define RTS5261_FAKE_MCU_CLOCK_GATING (0x01<<5)
76 /*MCU_bus_mode_sel: 0=real 8051 1=fake mcu*/
78 /*MCU_clock_sel:VerA 00=aux16M 01=aux400K 1x=REFCLK100M*/
82 #define RTS5261_MCU_CLOCK_GATING (0x01<<1)
91 #define RTS5261_INFORM_RTD3_COLD (0x01<<5)
96 #define RTS5261_LDO12_VO_TUNE_MASK (0x07<<1)
97 #define RTS5261_LDO12_115 (0x03<<1)
98 #define RTS5261_LDO12_120 (0x04<<1)
99 #define RTS5261_LDO12_125 (0x05<<1)
100 #define RTS5261_LDO12_130 (0x06<<1)
101 #define RTS5261_LDO12_135 (0x07<<1)
107 #define RTS5261_PUPDC (0x01<<5)
114 #define RTS5261_LDO2_POWERON (0x01<<1)
125 #define RTS5261_LDO1_OCP_THD_MASK (0x07<<5)
128 #define RTS5261_LDO1_OCP_LMT_EN (0x01<<1)
130 /* CRD6603-433 190319 request changed */
131 #define RTS5261_LDO1_OCP_THD_740 (0x00<<5)
132 #define RTS5261_LDO1_OCP_THD_800 (0x01<<5)
133 #define RTS5261_LDO1_OCP_THD_860 (0x02<<5)
134 #define RTS5261_LDO1_OCP_THD_920 (0x03<<5)
135 #define RTS5261_LDO1_OCP_THD_980 (0x04<<5)
136 #define RTS5261_LDO1_OCP_THD_1040 (0x05<<5)
137 #define RTS5261_LDO1_OCP_THD_1100 (0x06<<5)
138 #define RTS5261_LDO1_OCP_THD_1160 (0x07<<5)
146 #define RTS5261_LDO1_TUNE_MASK (0x07<<1)
147 #define RTS5261_LDO1_18 (0x05<<1)
148 #define RTS5261_LDO1_33 (0x07<<1)
152 #define RTS5261_LDO2_OCP_THD_MASK (0x07<<5)
155 #define RTS5261_LDO2_OCP_LMT_EN (0x01<<1)
157 #define RTS5261_LDO2_OCP_THD_620 (0x00<<5)
158 #define RTS5261_LDO2_OCP_THD_650 (0x01<<5)
159 #define RTS5261_LDO2_OCP_THD_680 (0x02<<5)
160 #define RTS5261_LDO2_OCP_THD_720 (0x03<<5)
161 #define RTS5261_LDO2_OCP_THD_750 (0x04<<5)
162 #define RTS5261_LDO2_OCP_THD_780 (0x05<<5)
163 #define RTS5261_LDO2_OCP_THD_810 (0x06<<5)
164 #define RTS5261_LDO2_OCP_THD_840 (0x07<<5)
167 #define RTS5261_LDO2_TUNE_MASK (0x07<<1)
168 #define RTS5261_LDO2_18 (0x05<<1)
169 #define RTS5261_LDO2_33 (0x07<<1)
173 #define RTS5261_LDO3_OCP_THD_MASK (0x07<<5)
176 #define RTS5261_LDO3_OCP_LMT_EN (0x01<<1)
178 #define RTS5261_LDO3_OCP_THD_620 (0x00<<5)
179 #define RTS5261_LDO3_OCP_THD_650 (0x01<<5)
180 #define RTS5261_LDO3_OCP_THD_680 (0x02<<5)
181 #define RTS5261_LDO3_OCP_THD_720 (0x03<<5)
182 #define RTS5261_LDO3_OCP_THD_750 (0x04<<5)
183 #define RTS5261_LDO3_OCP_THD_780 (0x05<<5)
184 #define RTS5261_LDO3_OCP_THD_810 (0x06<<5)
185 #define RTS5261_LDO3_OCP_THD_840 (0x07<<5)
188 #define RTS5261_LDO3_TUNE_MASK (0x07<<1)
189 #define RTS5261_LDO3_18 (0x05<<1)
190 #define RTS5261_LDO3_33 (0x07<<1)
205 #define SD_LUN 1