Lines Matching +full:a +full:- +full:c
1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * (c) Copyright 1998 Alan Cox <alan@lxorguk.ukuu.org.uk>
5 * (c) Copyright 2000, 2001 Red Hat Inc
15 * DMA now uses get_free_page as kmalloc buffers may span a 64K
24 * Non DMA you want a 486DX50 or better to do 64Kbits. 9600 baud
27 * 512Kbit->1Mbit depending on motherboard.
60 * z8530_read_port - Architecture specific interface function
64 * between accesses and uses PC I/O. Some drivers may need a 5uS delay
67 * section so that this can become a generic driver interface for all
84 * z8530_write_port - Architecture specific interface function
88 * Write a value to a port with delays if need be. Note that the
93 * section so that this can become a generic driver interface for all
108 static void z8530_rx_done(struct z8530_channel *c);
109 static void z8530_tx_done(struct z8530_channel *c);
113 * read_zsreg - Read a register from a Z85230
114 * @c: Z8530 channel to read from (2 per chip)
116 * FIXME: Use a spinlock.
119 * A read is done by writing to the control register and reading the
123 static inline u8 read_zsreg(struct z8530_channel *c, u8 reg) in read_zsreg() argument
126 z8530_write_port(c->ctrlio, reg); in read_zsreg()
127 return z8530_read_port(c->ctrlio); in read_zsreg()
131 * read_zsdata - Read the data port of a Z8530 channel
132 * @c: The Z8530 channel to read the data port from
138 static inline u8 read_zsdata(struct z8530_channel *c) in read_zsdata() argument
141 r=z8530_read_port(c->dataio); in read_zsdata()
146 * write_zsreg - Write to a Z8530 channel register
147 * @c: The Z8530 channel
151 * Write a value to an indexed register. The caller must hold the lock
155 * Assumes c->lock is held.
157 static inline void write_zsreg(struct z8530_channel *c, u8 reg, u8 val) in write_zsreg() argument
160 z8530_write_port(c->ctrlio, reg); in write_zsreg()
161 z8530_write_port(c->ctrlio, val); in write_zsreg()
166 * write_zsctrl - Write to a Z8530 control register
167 * @c: The Z8530 channel
173 static inline void write_zsctrl(struct z8530_channel *c, u8 val) in write_zsctrl() argument
175 z8530_write_port(c->ctrlio, val); in write_zsctrl()
179 * write_zsdata - Write to a Z8530 control register
180 * @c: The Z8530 channel
187 static inline void write_zsdata(struct z8530_channel *c, u8 val) in write_zsdata() argument
189 z8530_write_port(c->dataio, val); in write_zsdata()
193 * Register loading parameters for a dead port
262 * z8530_flush_fifo - Flush on chip RX FIFO
263 * @c: Channel to flush
267 * is harmless. The 8530 has a 4 byte FIFO, the 85230 has 8 bytes.
273 static void z8530_flush_fifo(struct z8530_channel *c) in z8530_flush_fifo() argument
275 read_zsreg(c, R1); in z8530_flush_fifo()
276 read_zsreg(c, R1); in z8530_flush_fifo()
277 read_zsreg(c, R1); in z8530_flush_fifo()
278 read_zsreg(c, R1); in z8530_flush_fifo()
279 if(c->dev->type==Z85230) in z8530_flush_fifo()
281 read_zsreg(c, R1); in z8530_flush_fifo()
282 read_zsreg(c, R1); in z8530_flush_fifo()
283 read_zsreg(c, R1); in z8530_flush_fifo()
284 read_zsreg(c, R1); in z8530_flush_fifo()
289 * z8530_rtsdtr - Control the outgoing DTS/RTS line
290 * @c: The Z8530 channel to control;
299 static void z8530_rtsdtr(struct z8530_channel *c, int set) in z8530_rtsdtr() argument
302 c->regs[5] |= (RTS | DTR); in z8530_rtsdtr()
304 c->regs[5] &= ~(RTS | DTR); in z8530_rtsdtr()
305 write_zsreg(c, R5, c->regs[5]); in z8530_rtsdtr()
309 * z8530_rx - Handle a PIO receive event
310 * @c: Z8530 channel to process
317 * (eg to ever clock 64kbits on a sparc ;)).
320 * by them as short as possible in all circumstances - clocks cost
322 * other code - this is true in the RT case too.
332 static void z8530_rx(struct z8530_channel *c) in z8530_rx() argument
339 if(!(read_zsreg(c, R0)&1)) in z8530_rx()
341 ch=read_zsdata(c); in z8530_rx()
342 stat=read_zsreg(c, R1); in z8530_rx()
347 if(c->count < c->max) in z8530_rx()
349 *c->dptr++=ch; in z8530_rx()
350 c->count++; in z8530_rx()
362 if(c->skb) in z8530_rx()
363 c->dptr=c->skb->data; in z8530_rx()
364 c->count=0; in z8530_rx()
367 pr_warn("%s: overrun\n", c->dev->name); in z8530_rx()
368 c->rx_overrun++; in z8530_rx()
372 c->rx_crc_err++; in z8530_rx()
383 z8530_rx_done(c); in z8530_rx()
384 write_zsctrl(c, RES_Rx_CRC); in z8530_rx()
391 write_zsctrl(c, ERR_RES); in z8530_rx()
392 write_zsctrl(c, RES_H_IUS); in z8530_rx()
397 * z8530_tx - Handle a PIO transmit event
398 * @c: Z8530 channel to process
406 static void z8530_tx(struct z8530_channel *c) in z8530_tx() argument
408 while(c->txcount) { in z8530_tx()
410 if(!(read_zsreg(c, R0)&4)) in z8530_tx()
412 c->txcount--; in z8530_tx()
416 write_zsreg(c, R8, *c->tx_ptr++); in z8530_tx()
417 write_zsctrl(c, RES_H_IUS); in z8530_tx()
419 if(c->txcount==0) in z8530_tx()
421 write_zsctrl(c, RES_EOM_L); in z8530_tx()
422 write_zsreg(c, R10, c->regs[10]&~ABUNDER); in z8530_tx()
428 * End of frame TX - fire another one in z8530_tx()
431 write_zsctrl(c, RES_Tx_P); in z8530_tx()
433 z8530_tx_done(c); in z8530_tx()
434 write_zsctrl(c, RES_H_IUS); in z8530_tx()
438 * z8530_status - Handle a PIO status exception
441 * A status event occurred in PIO synchronous mode. There are several
442 * reasons the chip will bother us here. A transmit underrun means we
443 * failed to feed the chip fast enough and just broke a packet. A DCD
444 * change is a line up or down.
452 altered = chan->status ^ status; in z8530_status()
454 chan->status = status; in z8530_status()
457 /* printk("%s: Tx underrun.\n", chan->dev->name); */ in z8530_status()
458 chan->netdevice->stats.tx_fifo_errors++; in z8530_status()
463 if (altered & chan->dcdcheck) in z8530_status()
465 if (status & chan->dcdcheck) { in z8530_status()
466 pr_info("%s: DCD raised\n", chan->dev->name); in z8530_status()
467 write_zsreg(chan, R3, chan->regs[3] | RxENABLE); in z8530_status()
468 if (chan->netdevice) in z8530_status()
469 netif_carrier_on(chan->netdevice); in z8530_status()
471 pr_info("%s: DCD lost\n", chan->dev->name); in z8530_status()
472 write_zsreg(chan, R3, chan->regs[3] & ~RxENABLE); in z8530_status()
474 if (chan->netdevice) in z8530_status()
475 netif_carrier_off(chan->netdevice); in z8530_status()
492 * z8530_dma_rx - Handle a DMA RX event
497 * events are handled by the DMA hardware. We get a kick here only if
498 * a frame ended.
503 if(chan->rxdma_on) in z8530_dma_rx()
528 * z8530_dma_tx - Handle a DMA TX event
537 if(!chan->dma_tx) in z8530_dma_tx()
544 pr_err("DMA tx - bogus event!\n"); in z8530_dma_tx()
549 * z8530_dma_status - Handle a DMA status exception
552 * A status event occurred on the Z8530. We receive these for two reasons
553 * when in DMA mode. Firstly if we finished a packet transfer we get one
554 * and kick the next packet out. Secondly we may see a DCD change.
563 altered=chan->status^status; in z8530_dma_status()
565 chan->status=status; in z8530_dma_status()
568 if(chan->dma_tx) in z8530_dma_status()
575 disable_dma(chan->txdma); in z8530_dma_status()
576 clear_dma_ff(chan->txdma); in z8530_dma_status()
577 chan->txdma_on=0; in z8530_dma_status()
583 if (altered & chan->dcdcheck) in z8530_dma_status()
585 if (status & chan->dcdcheck) { in z8530_dma_status()
586 pr_info("%s: DCD raised\n", chan->dev->name); in z8530_dma_status()
587 write_zsreg(chan, R3, chan->regs[3] | RxENABLE); in z8530_dma_status()
588 if (chan->netdevice) in z8530_dma_status()
589 netif_carrier_on(chan->netdevice); in z8530_dma_status()
591 pr_info("%s: DCD lost\n", chan->dev->name); in z8530_dma_status()
592 write_zsreg(chan, R3, chan->regs[3] & ~RxENABLE); in z8530_dma_status()
594 if (chan->netdevice) in z8530_dma_status()
595 netif_carrier_off(chan->netdevice); in z8530_dma_status()
616 * z8530_rx_clear - Handle RX events from a stopped chip
617 * @c: Z8530 channel to shut up
619 * Receive interrupt vectors for a Z8530 that is in 'parked' mode.
625 static void z8530_rx_clear(struct z8530_channel *c) in z8530_rx_clear() argument
632 read_zsdata(c); in z8530_rx_clear()
633 stat=read_zsreg(c, R1); in z8530_rx_clear()
636 write_zsctrl(c, RES_Rx_CRC); in z8530_rx_clear()
640 write_zsctrl(c, ERR_RES); in z8530_rx_clear()
641 write_zsctrl(c, RES_H_IUS); in z8530_rx_clear()
645 * z8530_tx_clear - Handle TX events from a stopped chip
646 * @c: Z8530 channel to shut up
648 * Transmit interrupt vectors for a Z8530 that is in 'parked' mode.
653 static void z8530_tx_clear(struct z8530_channel *c) in z8530_tx_clear() argument
655 write_zsctrl(c, RES_Tx_P); in z8530_tx_clear()
656 write_zsctrl(c, RES_H_IUS); in z8530_tx_clear()
660 * z8530_status_clear - Handle status events from a stopped chip
663 * Status interrupt vectors for a Z8530 that is in 'parked' mode.
687 * z8530_interrupt - Handle an interrupt from a Z8530
691 * A Z85[2]30 device has stuck its hand in the air for attention.
699 * channel). c->lock for both channels points to dev->lock
712 pr_err("IRQ re-enter\n"); in z8530_interrupt()
717 spin_lock(&dev->lock); in z8530_interrupt()
722 intr = read_zsreg(&dev->chanA, R3); in z8530_interrupt()
727 A even though it applies to the whole chip */ in z8530_interrupt()
729 /* Now walk the chip and see what it is wanting - it may be in z8530_interrupt()
732 irqs=dev->chanA.irqs; in z8530_interrupt()
737 irqs->rx(&dev->chanA); in z8530_interrupt()
739 irqs->tx(&dev->chanA); in z8530_interrupt()
741 irqs->status(&dev->chanA); in z8530_interrupt()
744 irqs=dev->chanB.irqs; in z8530_interrupt()
749 irqs->rx(&dev->chanB); in z8530_interrupt()
751 irqs->tx(&dev->chanB); in z8530_interrupt()
753 irqs->status(&dev->chanB); in z8530_interrupt()
756 spin_unlock(&dev->lock); in z8530_interrupt()
758 pr_err("%s: interrupt jammed - abort(0x%X)!\n", in z8530_interrupt()
759 dev->name, intr); in z8530_interrupt()
777 * z8530_sync_open - Open a Z8530 channel for PIO
779 * @c: The Z8530 channel to open in synchronous PIO mode
781 * Switch a Z8530 into synchronous mode without DMA assist. We
785 int z8530_sync_open(struct net_device *dev, struct z8530_channel *c) in z8530_sync_open() argument
789 spin_lock_irqsave(c->lock, flags); in z8530_sync_open()
791 c->sync = 1; in z8530_sync_open()
792 c->mtu = dev->mtu+64; in z8530_sync_open()
793 c->count = 0; in z8530_sync_open()
794 c->skb = NULL; in z8530_sync_open()
795 c->skb2 = NULL; in z8530_sync_open()
796 c->irqs = &z8530_sync; in z8530_sync_open()
799 z8530_rx_done(c); /* Load the frame ring */ in z8530_sync_open()
800 z8530_rx_done(c); /* Load the backup frame */ in z8530_sync_open()
801 z8530_rtsdtr(c,1); in z8530_sync_open()
802 c->dma_tx = 0; in z8530_sync_open()
803 c->regs[R1]|=TxINT_ENAB; in z8530_sync_open()
804 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_open()
805 write_zsreg(c, R3, c->regs[R3]|RxENABLE); in z8530_sync_open()
807 spin_unlock_irqrestore(c->lock, flags); in z8530_sync_open()
815 * z8530_sync_close - Close a PIO Z8530 channel
817 * @c: Z8530 channel to disassociate and move to idle
819 * Close down a Z8530 interface and switch its interrupt handlers
823 int z8530_sync_close(struct net_device *dev, struct z8530_channel *c) in z8530_sync_close() argument
828 spin_lock_irqsave(c->lock, flags); in z8530_sync_close()
829 c->irqs = &z8530_nop; in z8530_sync_close()
830 c->max = 0; in z8530_sync_close()
831 c->sync = 0; in z8530_sync_close()
833 chk=read_zsreg(c,R0); in z8530_sync_close()
834 write_zsreg(c, R3, c->regs[R3]); in z8530_sync_close()
835 z8530_rtsdtr(c,0); in z8530_sync_close()
837 spin_unlock_irqrestore(c->lock, flags); in z8530_sync_close()
844 * z8530_sync_dma_open - Open a Z8530 for DMA I/O
846 * @c: The Z8530 channel to configure in sync DMA mode.
848 * Set up a Z85x30 device for synchronous DMA in both directions. Two
853 int z8530_sync_dma_open(struct net_device *dev, struct z8530_channel *c) in z8530_sync_dma_open() argument
857 c->sync = 1; in z8530_sync_dma_open()
858 c->mtu = dev->mtu+64; in z8530_sync_dma_open()
859 c->count = 0; in z8530_sync_dma_open()
860 c->skb = NULL; in z8530_sync_dma_open()
861 c->skb2 = NULL; in z8530_sync_dma_open()
865 c->rxdma_on = 0; in z8530_sync_dma_open()
866 c->txdma_on = 0; in z8530_sync_dma_open()
874 if(c->mtu > PAGE_SIZE/2) in z8530_sync_dma_open()
875 return -EMSGSIZE; in z8530_sync_dma_open()
877 c->rx_buf[0]=(void *)get_zeroed_page(GFP_KERNEL|GFP_DMA); in z8530_sync_dma_open()
878 if(c->rx_buf[0]==NULL) in z8530_sync_dma_open()
879 return -ENOBUFS; in z8530_sync_dma_open()
880 c->rx_buf[1]=c->rx_buf[0]+PAGE_SIZE/2; in z8530_sync_dma_open()
882 c->tx_dma_buf[0]=(void *)get_zeroed_page(GFP_KERNEL|GFP_DMA); in z8530_sync_dma_open()
883 if(c->tx_dma_buf[0]==NULL) in z8530_sync_dma_open()
885 free_page((unsigned long)c->rx_buf[0]); in z8530_sync_dma_open()
886 c->rx_buf[0]=NULL; in z8530_sync_dma_open()
887 return -ENOBUFS; in z8530_sync_dma_open()
889 c->tx_dma_buf[1]=c->tx_dma_buf[0]+PAGE_SIZE/2; in z8530_sync_dma_open()
891 c->tx_dma_used=0; in z8530_sync_dma_open()
892 c->dma_tx = 1; in z8530_sync_dma_open()
893 c->dma_num=0; in z8530_sync_dma_open()
894 c->dma_ready=1; in z8530_sync_dma_open()
900 spin_lock_irqsave(c->lock, cflags); in z8530_sync_dma_open()
906 c->regs[R14]|= DTRREQ; in z8530_sync_dma_open()
907 write_zsreg(c, R14, c->regs[R14]); in z8530_sync_dma_open()
909 c->regs[R1]&= ~TxINT_ENAB; in z8530_sync_dma_open()
910 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_dma_open()
916 c->regs[R1]|= WT_FN_RDYFN; in z8530_sync_dma_open()
917 c->regs[R1]|= WT_RDY_RT; in z8530_sync_dma_open()
918 c->regs[R1]|= INT_ERR_Rx; in z8530_sync_dma_open()
919 c->regs[R1]&= ~TxINT_ENAB; in z8530_sync_dma_open()
920 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_dma_open()
921 c->regs[R1]|= WT_RDY_ENAB; in z8530_sync_dma_open()
922 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_dma_open()
934 disable_dma(c->rxdma); in z8530_sync_dma_open()
935 clear_dma_ff(c->rxdma); in z8530_sync_dma_open()
936 set_dma_mode(c->rxdma, DMA_MODE_READ|0x10); in z8530_sync_dma_open()
937 set_dma_addr(c->rxdma, virt_to_bus(c->rx_buf[0])); in z8530_sync_dma_open()
938 set_dma_count(c->rxdma, c->mtu); in z8530_sync_dma_open()
939 enable_dma(c->rxdma); in z8530_sync_dma_open()
941 disable_dma(c->txdma); in z8530_sync_dma_open()
942 clear_dma_ff(c->txdma); in z8530_sync_dma_open()
943 set_dma_mode(c->txdma, DMA_MODE_WRITE); in z8530_sync_dma_open()
944 disable_dma(c->txdma); in z8530_sync_dma_open()
952 c->rxdma_on = 1; in z8530_sync_dma_open()
953 c->txdma_on = 1; in z8530_sync_dma_open()
954 c->tx_dma_used = 1; in z8530_sync_dma_open()
956 c->irqs = &z8530_dma_sync; in z8530_sync_dma_open()
957 z8530_rtsdtr(c,1); in z8530_sync_dma_open()
958 write_zsreg(c, R3, c->regs[R3]|RxENABLE); in z8530_sync_dma_open()
960 spin_unlock_irqrestore(c->lock, cflags); in z8530_sync_dma_open()
968 * z8530_sync_dma_close - Close down DMA I/O
970 * @c: Z8530 channel to move into discard mode
972 * Shut down a DMA mode synchronous interface. Halt the DMA, and
976 int z8530_sync_dma_close(struct net_device *dev, struct z8530_channel *c) in z8530_sync_dma_close() argument
981 c->irqs = &z8530_nop; in z8530_sync_dma_close()
982 c->max = 0; in z8530_sync_dma_close()
983 c->sync = 0; in z8530_sync_dma_close()
990 disable_dma(c->rxdma); in z8530_sync_dma_close()
991 clear_dma_ff(c->rxdma); in z8530_sync_dma_close()
993 c->rxdma_on = 0; in z8530_sync_dma_close()
995 disable_dma(c->txdma); in z8530_sync_dma_close()
996 clear_dma_ff(c->txdma); in z8530_sync_dma_close()
999 c->txdma_on = 0; in z8530_sync_dma_close()
1000 c->tx_dma_used = 0; in z8530_sync_dma_close()
1002 spin_lock_irqsave(c->lock, flags); in z8530_sync_dma_close()
1008 c->regs[R1]&= ~WT_RDY_ENAB; in z8530_sync_dma_close()
1009 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_dma_close()
1010 c->regs[R1]&= ~(WT_RDY_RT|WT_FN_RDYFN|INT_ERR_Rx); in z8530_sync_dma_close()
1011 c->regs[R1]|= INT_ALL_Rx; in z8530_sync_dma_close()
1012 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_dma_close()
1013 c->regs[R14]&= ~DTRREQ; in z8530_sync_dma_close()
1014 write_zsreg(c, R14, c->regs[R14]); in z8530_sync_dma_close()
1016 if(c->rx_buf[0]) in z8530_sync_dma_close()
1018 free_page((unsigned long)c->rx_buf[0]); in z8530_sync_dma_close()
1019 c->rx_buf[0]=NULL; in z8530_sync_dma_close()
1021 if(c->tx_dma_buf[0]) in z8530_sync_dma_close()
1023 free_page((unsigned long)c->tx_dma_buf[0]); in z8530_sync_dma_close()
1024 c->tx_dma_buf[0]=NULL; in z8530_sync_dma_close()
1026 chk=read_zsreg(c,R0); in z8530_sync_dma_close()
1027 write_zsreg(c, R3, c->regs[R3]); in z8530_sync_dma_close()
1028 z8530_rtsdtr(c,0); in z8530_sync_dma_close()
1030 spin_unlock_irqrestore(c->lock, flags); in z8530_sync_dma_close()
1038 * z8530_sync_txdma_open - Open a Z8530 for TX driven DMA
1040 * @c: The Z8530 channel to configure in sync DMA mode.
1042 * Set up a Z85x30 device for synchronous DMA transmission. One
1047 int z8530_sync_txdma_open(struct net_device *dev, struct z8530_channel *c) in z8530_sync_txdma_open() argument
1051 printk("Opening sync interface for TX-DMA\n"); in z8530_sync_txdma_open()
1052 c->sync = 1; in z8530_sync_txdma_open()
1053 c->mtu = dev->mtu+64; in z8530_sync_txdma_open()
1054 c->count = 0; in z8530_sync_txdma_open()
1055 c->skb = NULL; in z8530_sync_txdma_open()
1056 c->skb2 = NULL; in z8530_sync_txdma_open()
1064 if(c->mtu > PAGE_SIZE/2) in z8530_sync_txdma_open()
1065 return -EMSGSIZE; in z8530_sync_txdma_open()
1067 c->tx_dma_buf[0]=(void *)get_zeroed_page(GFP_KERNEL|GFP_DMA); in z8530_sync_txdma_open()
1068 if(c->tx_dma_buf[0]==NULL) in z8530_sync_txdma_open()
1069 return -ENOBUFS; in z8530_sync_txdma_open()
1071 c->tx_dma_buf[1] = c->tx_dma_buf[0] + PAGE_SIZE/2; in z8530_sync_txdma_open()
1074 spin_lock_irqsave(c->lock, cflags); in z8530_sync_txdma_open()
1080 z8530_rx_done(c); in z8530_sync_txdma_open()
1081 z8530_rx_done(c); in z8530_sync_txdma_open()
1087 c->rxdma_on = 0; in z8530_sync_txdma_open()
1088 c->txdma_on = 0; in z8530_sync_txdma_open()
1090 c->tx_dma_used=0; in z8530_sync_txdma_open()
1091 c->dma_num=0; in z8530_sync_txdma_open()
1092 c->dma_ready=1; in z8530_sync_txdma_open()
1093 c->dma_tx = 1; in z8530_sync_txdma_open()
1102 c->regs[R14]|= DTRREQ; in z8530_sync_txdma_open()
1103 write_zsreg(c, R14, c->regs[R14]); in z8530_sync_txdma_open()
1105 c->regs[R1]&= ~TxINT_ENAB; in z8530_sync_txdma_open()
1106 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_txdma_open()
1114 disable_dma(c->txdma); in z8530_sync_txdma_open()
1115 clear_dma_ff(c->txdma); in z8530_sync_txdma_open()
1116 set_dma_mode(c->txdma, DMA_MODE_WRITE); in z8530_sync_txdma_open()
1117 disable_dma(c->txdma); in z8530_sync_txdma_open()
1125 c->rxdma_on = 0; in z8530_sync_txdma_open()
1126 c->txdma_on = 1; in z8530_sync_txdma_open()
1127 c->tx_dma_used = 1; in z8530_sync_txdma_open()
1129 c->irqs = &z8530_txdma_sync; in z8530_sync_txdma_open()
1130 z8530_rtsdtr(c,1); in z8530_sync_txdma_open()
1131 write_zsreg(c, R3, c->regs[R3]|RxENABLE); in z8530_sync_txdma_open()
1132 spin_unlock_irqrestore(c->lock, cflags); in z8530_sync_txdma_open()
1140 * z8530_sync_txdma_close - Close down a TX driven DMA channel
1142 * @c: Z8530 channel to move into discard mode
1144 * Shut down a DMA/PIO split mode synchronous interface. Halt the DMA,
1148 int z8530_sync_txdma_close(struct net_device *dev, struct z8530_channel *c) in z8530_sync_txdma_close() argument
1154 spin_lock_irqsave(c->lock, cflags); in z8530_sync_txdma_close()
1156 c->irqs = &z8530_nop; in z8530_sync_txdma_close()
1157 c->max = 0; in z8530_sync_txdma_close()
1158 c->sync = 0; in z8530_sync_txdma_close()
1166 disable_dma(c->txdma); in z8530_sync_txdma_close()
1167 clear_dma_ff(c->txdma); in z8530_sync_txdma_close()
1168 c->txdma_on = 0; in z8530_sync_txdma_close()
1169 c->tx_dma_used = 0; in z8530_sync_txdma_close()
1177 c->regs[R1]&= ~WT_RDY_ENAB; in z8530_sync_txdma_close()
1178 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_txdma_close()
1179 c->regs[R1]&= ~(WT_RDY_RT|WT_FN_RDYFN|INT_ERR_Rx); in z8530_sync_txdma_close()
1180 c->regs[R1]|= INT_ALL_Rx; in z8530_sync_txdma_close()
1181 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_txdma_close()
1182 c->regs[R14]&= ~DTRREQ; in z8530_sync_txdma_close()
1183 write_zsreg(c, R14, c->regs[R14]); in z8530_sync_txdma_close()
1185 if(c->tx_dma_buf[0]) in z8530_sync_txdma_close()
1187 free_page((unsigned long)c->tx_dma_buf[0]); in z8530_sync_txdma_close()
1188 c->tx_dma_buf[0]=NULL; in z8530_sync_txdma_close()
1190 chk=read_zsreg(c,R0); in z8530_sync_txdma_close()
1191 write_zsreg(c, R3, c->regs[R3]); in z8530_sync_txdma_close()
1192 z8530_rtsdtr(c,0); in z8530_sync_txdma_close()
1194 spin_unlock_irqrestore(c->lock, cflags); in z8530_sync_txdma_close()
1203 * Name strings for Z8530 chips. SGI claim to have a 130, Zilog deny
1214 * z8530_describe - Uniformly describe a Z8530 port
1219 * Describe a Z8530 in a standard format. We must pass the I/O as
1221 * is to try and get a common format of report.
1227 dev->name, in z8530_describe()
1228 z8530_type_name[dev->type], in z8530_describe()
1231 dev->irq); in z8530_describe()
1242 /* NOP the interrupt handlers first - we might get a in do_z8530_init()
1244 dev->chanA.irqs=&z8530_nop; in do_z8530_init()
1245 dev->chanB.irqs=&z8530_nop; in do_z8530_init()
1246 dev->chanA.dcdcheck=DCD; in do_z8530_init()
1247 dev->chanB.dcdcheck=DCD; in do_z8530_init()
1250 write_zsreg(&dev->chanA, R9, 0xC0); in do_z8530_init()
1253 write_zsreg(&dev->chanA, R12, 0xAA); in do_z8530_init()
1254 if(read_zsreg(&dev->chanA, R12)!=0xAA) in do_z8530_init()
1255 return -ENODEV; in do_z8530_init()
1256 write_zsreg(&dev->chanA, R12, 0x55); in do_z8530_init()
1257 if(read_zsreg(&dev->chanA, R12)!=0x55) in do_z8530_init()
1258 return -ENODEV; in do_z8530_init()
1260 dev->type=Z8530; in do_z8530_init()
1266 write_zsreg(&dev->chanA, R15, 0x01); in do_z8530_init()
1273 if(read_zsreg(&dev->chanA, R15)==0x01) in do_z8530_init()
1276 /* Put a char in the fifo */ in do_z8530_init()
1277 write_zsreg(&dev->chanA, R8, 0); in do_z8530_init()
1278 if(read_zsreg(&dev->chanA, R0)&Tx_BUF_EMP) in do_z8530_init()
1279 dev->type = Z85230; /* Has a FIFO */ in do_z8530_init()
1281 dev->type = Z85C30; /* Z85C30, 1 byte FIFO */ in do_z8530_init()
1290 write_zsreg(&dev->chanA, R15, 0); in do_z8530_init()
1296 memcpy(dev->chanA.regs, reg_init, 16); in do_z8530_init()
1297 memcpy(dev->chanB.regs, reg_init ,16); in do_z8530_init()
1303 * z8530_init - Initialise a Z8530 device
1306 * Configure up a Z8530/Z85C30 or Z85230 chip. We check the device
1308 * keep quite and behave. This matters a lot, a Z8530 in the wrong
1315 * Return 0 for success, or a negative value indicating the problem
1325 spin_lock_init(&dev->lock); in z8530_init()
1326 dev->chanA.lock = &dev->lock; in z8530_init()
1327 dev->chanB.lock = &dev->lock; in z8530_init()
1329 spin_lock_irqsave(&dev->lock, flags); in z8530_init()
1331 spin_unlock_irqrestore(&dev->lock, flags); in z8530_init()
1340 * z8530_shutdown - Shutdown a Z8530 device
1355 spin_lock_irqsave(&dev->lock, flags); in z8530_shutdown()
1356 dev->chanA.irqs=&z8530_nop; in z8530_shutdown()
1357 dev->chanB.irqs=&z8530_nop; in z8530_shutdown()
1358 write_zsreg(&dev->chanA, R9, 0xC0); in z8530_shutdown()
1361 spin_unlock_irqrestore(&dev->lock, flags); in z8530_shutdown()
1368 * z8530_channel_load - Load channel data
1369 * @c: Z8530 channel to configure
1373 * Load a Z8530 channel up from the system data. We use +16 to
1378 int z8530_channel_load(struct z8530_channel *c, u8 *rtable) in z8530_channel_load() argument
1382 spin_lock_irqsave(c->lock, flags); in z8530_channel_load()
1388 write_zsreg(c, R15, c->regs[15]|1); in z8530_channel_load()
1389 write_zsreg(c, reg&0x0F, *rtable); in z8530_channel_load()
1391 write_zsreg(c, R15, c->regs[15]&~1); in z8530_channel_load()
1392 c->regs[reg]=*rtable++; in z8530_channel_load()
1394 c->rx_function=z8530_null_rx; in z8530_channel_load()
1395 c->skb=NULL; in z8530_channel_load()
1396 c->tx_skb=NULL; in z8530_channel_load()
1397 c->tx_next_skb=NULL; in z8530_channel_load()
1398 c->mtu=1500; in z8530_channel_load()
1399 c->max=0; in z8530_channel_load()
1400 c->count=0; in z8530_channel_load()
1401 c->status=read_zsreg(c, R0); in z8530_channel_load()
1402 c->sync=1; in z8530_channel_load()
1403 write_zsreg(c, R3, c->regs[R3]|RxENABLE); in z8530_channel_load()
1405 spin_unlock_irqrestore(c->lock, flags); in z8530_channel_load()
1413 * z8530_tx_begin - Begin packet transmission
1414 * @c: The Z8530 channel to kick
1426 static void z8530_tx_begin(struct z8530_channel *c) in z8530_tx_begin() argument
1429 if(c->tx_skb) in z8530_tx_begin()
1432 c->tx_skb=c->tx_next_skb; in z8530_tx_begin()
1433 c->tx_next_skb=NULL; in z8530_tx_begin()
1434 c->tx_ptr=c->tx_next_ptr; in z8530_tx_begin()
1436 if(c->tx_skb==NULL) in z8530_tx_begin()
1439 if(c->dma_tx) in z8530_tx_begin()
1442 disable_dma(c->txdma); in z8530_tx_begin()
1446 if (get_dma_residue(c->txdma)) in z8530_tx_begin()
1448 c->netdevice->stats.tx_dropped++; in z8530_tx_begin()
1449 c->netdevice->stats.tx_fifo_errors++; in z8530_tx_begin()
1453 c->txcount=0; in z8530_tx_begin()
1457 c->txcount=c->tx_skb->len; in z8530_tx_begin()
1460 if(c->dma_tx) in z8530_tx_begin()
1464 * on the older parts we need to set a flag and in z8530_tx_begin()
1465 * wait for a further TX interrupt to fire this in z8530_tx_begin()
1470 disable_dma(c->txdma); in z8530_tx_begin()
1477 if(c->dev->type!=Z85230) in z8530_tx_begin()
1479 write_zsctrl(c, RES_Tx_CRC); in z8530_tx_begin()
1480 write_zsctrl(c, RES_EOM_L); in z8530_tx_begin()
1482 write_zsreg(c, R10, c->regs[10]&~ABUNDER); in z8530_tx_begin()
1483 clear_dma_ff(c->txdma); in z8530_tx_begin()
1484 set_dma_addr(c->txdma, virt_to_bus(c->tx_ptr)); in z8530_tx_begin()
1485 set_dma_count(c->txdma, c->txcount); in z8530_tx_begin()
1486 enable_dma(c->txdma); in z8530_tx_begin()
1488 write_zsctrl(c, RES_EOM_L); in z8530_tx_begin()
1489 write_zsreg(c, R5, c->regs[R5]|TxENAB); in z8530_tx_begin()
1495 write_zsreg(c, R10, c->regs[10]); in z8530_tx_begin()
1496 write_zsctrl(c, RES_Tx_CRC); in z8530_tx_begin()
1498 while(c->txcount && (read_zsreg(c,R0)&Tx_BUF_EMP)) in z8530_tx_begin()
1500 write_zsreg(c, R8, *c->tx_ptr++); in z8530_tx_begin()
1501 c->txcount--; in z8530_tx_begin()
1509 netif_wake_queue(c->netdevice); in z8530_tx_begin()
1513 * z8530_tx_done - TX complete callback
1514 * @c: The channel that completed a transmit.
1516 * This is called when we complete a packet send. We wake the queue,
1523 static void z8530_tx_done(struct z8530_channel *c) in z8530_tx_done() argument
1528 if (c->tx_skb == NULL) in z8530_tx_done()
1531 skb = c->tx_skb; in z8530_tx_done()
1532 c->tx_skb = NULL; in z8530_tx_done()
1533 z8530_tx_begin(c); in z8530_tx_done()
1534 c->netdevice->stats.tx_packets++; in z8530_tx_done()
1535 c->netdevice->stats.tx_bytes += skb->len; in z8530_tx_done()
1540 * z8530_null_rx - Discard a packet
1541 * @c: The channel the packet arrived on
1548 void z8530_null_rx(struct z8530_channel *c, struct sk_buff *skb) in z8530_null_rx() argument
1556 * z8530_rx_done - Receive completion callback
1557 * @c: The channel that completed a receive
1559 * A new packet is complete. Our goal here is to get back into receive
1568 static void z8530_rx_done(struct z8530_channel *c) in z8530_rx_done() argument
1577 if(c->rxdma_on) in z8530_rx_done()
1584 int ready=c->dma_ready; in z8530_rx_done()
1585 unsigned char *rxb=c->rx_buf[c->dma_num]; in z8530_rx_done()
1594 disable_dma(c->rxdma); in z8530_rx_done()
1595 clear_dma_ff(c->rxdma); in z8530_rx_done()
1596 c->rxdma_on=0; in z8530_rx_done()
1597 ct=c->mtu-get_dma_residue(c->rxdma); in z8530_rx_done()
1600 c->dma_ready=0; in z8530_rx_done()
1609 c->dma_num^=1; in z8530_rx_done()
1610 set_dma_mode(c->rxdma, DMA_MODE_READ|0x10); in z8530_rx_done()
1611 set_dma_addr(c->rxdma, virt_to_bus(c->rx_buf[c->dma_num])); in z8530_rx_done()
1612 set_dma_count(c->rxdma, c->mtu); in z8530_rx_done()
1613 c->rxdma_on = 1; in z8530_rx_done()
1614 enable_dma(c->rxdma); in z8530_rx_done()
1617 write_zsreg(c, R0, RES_Rx_CRC); in z8530_rx_done()
1622 netdev_warn(c->netdevice, "DMA flip overrun!\n"); in z8530_rx_done()
1628 * directly into one on a PC - it might be above the 16Mb in z8530_rx_done()
1629 * boundary. Optimisation - we could check to see if we in z8530_rx_done()
1630 * can avoid the copy. Optimisation 2 - make the memcpy in z8530_rx_done()
1631 * a copychecksum. in z8530_rx_done()
1636 c->netdevice->stats.rx_dropped++; in z8530_rx_done()
1637 netdev_warn(c->netdevice, "Memory squeeze\n"); in z8530_rx_done()
1641 c->netdevice->stats.rx_packets++; in z8530_rx_done()
1642 c->netdevice->stats.rx_bytes += ct; in z8530_rx_done()
1644 c->dma_ready = 1; in z8530_rx_done()
1647 skb = c->skb; in z8530_rx_done()
1656 * if you build a system where the sync irq isn't blocked in z8530_rx_done()
1661 ct=c->count; in z8530_rx_done()
1663 c->skb = c->skb2; in z8530_rx_done()
1664 c->count = 0; in z8530_rx_done()
1665 c->max = c->mtu; in z8530_rx_done()
1666 if (c->skb) { in z8530_rx_done()
1667 c->dptr = c->skb->data; in z8530_rx_done()
1668 c->max = c->mtu; in z8530_rx_done()
1670 c->count = 0; in z8530_rx_done()
1671 c->max = 0; in z8530_rx_done()
1675 c->skb2 = dev_alloc_skb(c->mtu); in z8530_rx_done()
1676 if (c->skb2 == NULL) in z8530_rx_done()
1677 netdev_warn(c->netdevice, "memory squeeze\n"); in z8530_rx_done()
1679 skb_put(c->skb2, c->mtu); in z8530_rx_done()
1680 c->netdevice->stats.rx_packets++; in z8530_rx_done()
1681 c->netdevice->stats.rx_bytes += ct; in z8530_rx_done()
1684 * If we received a frame we must now process it. in z8530_rx_done()
1688 c->rx_function(c, skb); in z8530_rx_done()
1690 c->netdevice->stats.rx_dropped++; in z8530_rx_done()
1691 netdev_err(c->netdevice, "Lost a frame\n"); in z8530_rx_done()
1696 * spans_boundary - Check a packet can be ISA DMA'd
1699 * Returns true if the buffer cross a DMA boundary on a PC. The poor
1700 * thing can only DMA within a 64K block not across the edges of it.
1705 unsigned long a=(unsigned long)skb->data; in spans_boundary() local
1706 a^=(a+skb->len); in spans_boundary()
1707 if(a&0x00010000) /* If the 64K bit is different.. */ in spans_boundary()
1713 * z8530_queue_xmit - Queue a packet
1714 * @c: The channel to use
1717 * Queue a packet for transmission. Because we have rather
1726 netdev_tx_t z8530_queue_xmit(struct z8530_channel *c, struct sk_buff *skb) in z8530_queue_xmit() argument
1730 netif_stop_queue(c->netdevice); in z8530_queue_xmit()
1731 if(c->tx_next_skb) in z8530_queue_xmit()
1735 /* PC SPECIFIC - DMA limits */ in z8530_queue_xmit()
1742 …if(c->dma_tx && ((unsigned long)(virt_to_bus(skb->data+skb->len))>=16*1024*1024 || spans_boundary(… in z8530_queue_xmit()
1747 * we never use the same buffer twice in a row. Since in z8530_queue_xmit()
1748 * only one buffer can be going out at a time the other in z8530_queue_xmit()
1751 c->tx_next_ptr=c->tx_dma_buf[c->tx_dma_used]; in z8530_queue_xmit()
1752 c->tx_dma_used^=1; /* Flip temp buffer */ in z8530_queue_xmit()
1753 skb_copy_from_linear_data(skb, c->tx_next_ptr, skb->len); in z8530_queue_xmit()
1756 c->tx_next_ptr=skb->data; in z8530_queue_xmit()
1758 c->tx_next_skb=skb; in z8530_queue_xmit()
1761 spin_lock_irqsave(c->lock, flags); in z8530_queue_xmit()
1762 z8530_tx_begin(c); in z8530_queue_xmit()
1763 spin_unlock_irqrestore(c->lock, flags); in z8530_queue_xmit()